Struct cc13x2_cc26x2_hal::prcm::secdmaclkgr::W

pub struct W { /* fields omitted */ }

Value to write to the register

Methods

impl W

pub fn reset_value() -> W

Reset value of the register

pub unsafe fn bits(&mut self, bits: u32) -> &mut Self

Writes raw bits to the register

pub fn reserved25(&mut self) -> _RESERVED25W

Bits 25:31 - 31:25] Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.

pub fn dma_am_clk_en(&mut self) -> _DMA_AM_CLK_ENW

Bit 24 - 24:24] 0: No force 1: Force clock on for all modes (Run, Sleep and Deep Sleep) Overrides DMA_CLK_EN, SECDMACLKGS.DMA_CLK_EN and SECDMACLKGDS.DMA_CLK_EN when enabled. SYSBUS clock will always run when enabled For changes to take effect, CLKLOADCTL.LOAD needs to be written

pub fn reserved20(&mut self) -> _RESERVED20W

Bits 20:23 - 23:20] Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.

pub fn pka_zerioze_reset_n(&mut self) -> _PKA_ZERIOZE_RESET_NW

Bit 19 - 19:19] Zeroization logic hardware reset. 0: pka_zeroize logic inactive. 1: pka_zeroize of memory is enabled. This register must remain active until the memory are completely zeroized which requires 256 periods on systembus clock.

pub fn pka_am_clk_en(&mut self) -> _PKA_AM_CLK_ENW

Bit 18 - 18:18] 0: No force 1: Force clock on for all modes (Run, Sleep and Deep Sleep) Overrides PKA_CLK_EN, SECDMACLKGS.PKA_CLK_EN and SECDMACLKGDS.PKA_CLK_EN when enabled. For changes to take effect, CLKLOADCTL.LOAD needs to be written

pub fn trng_am_clk_en(&mut self) -> _TRNG_AM_CLK_ENW

Bit 17 - 17:17] 0: No force 1: Force clock on for all modes (Run, Sleep and Deep Sleep) Overrides TRNG_CLK_EN, SECDMACLKGS.TRNG_CLK_EN and SECDMACLKGDS.TRNG_CLK_EN when enabled. For changes to take effect, CLKLOADCTL.LOAD needs to be written

pub fn crypto_am_clk_en(&mut self) -> _CRYPTO_AM_CLK_ENW

Bit 16 - 16:16] 0: No force 1: Force clock on for all modes (Run, Sleep and Deep Sleep) Overrides CRYPTO_CLK_EN, SECDMACLKGS.CRYPTO_CLK_EN and SECDMACLKGDS.CRYPTO_CLK_EN when enabled. SYSBUS clock will always run when enabled For changes to take effect, CLKLOADCTL.LOAD needs to be written

pub fn reserved9(&mut self) -> _RESERVED9W

Bits 9:15 - 15:9] Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.

pub fn dma_clk_en(&mut self) -> _DMA_CLK_ENW

Bit 8 - 8:8] 0: Disable clock 1: Enable clock Can be forced on by DMA_AM_CLK_EN For changes to take effect, CLKLOADCTL.LOAD needs to be written

pub fn reserved3(&mut self) -> _RESERVED3W

Bits 3:7 - 7:3] Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.

pub fn pka_clk_en(&mut self) -> _PKA_CLK_ENW

Bit 2 - 2:2] 0: Disable clock 1: Enable clock Can be forced on by PKA_AM_CLK_EN For changes to take effect, CLKLOADCTL.LOAD needs to be written

pub fn trng_clk_en(&mut self) -> _TRNG_CLK_ENW

Bit 1 - 1:1] 0: Disable clock 1: Enable clock Can be forced on by TRNG_AM_CLK_EN For changes to take effect, CLKLOADCTL.LOAD needs to be written

pub fn crypto_clk_en(&mut self) -> _CRYPTO_CLK_ENW

Bit 0 - 0:0] 0: Disable clock 1: Enable clock Can be forced on by CRYPTO_AM_CLK_EN For changes to take effect, CLKLOADCTL.LOAD needs to be written