Struct cc13x2_cc26x2_hal::gpt3::ctl::W

pub struct W { /* fields omitted */ }

Value to write to the register

Methods

impl W

pub fn reset_value() -> W

Reset value of the register

pub unsafe fn bits(&mut self, bits: u32) -> &mut Self

Writes raw bits to the register

pub fn reserved15(&mut self) -> _RESERVED15W

Bits 15:31 - 31:15] Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.

pub fn tbpwml(&mut self) -> _TBPWMLW

Bit 14 - 14:14] GPT Timer B PWM Output Level 0: Output is unaffected. 1: Output is inverted.

pub fn reserved12(&mut self) -> _RESERVED12W

Bits 12:13 - 13:12] Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.

pub fn tbevent(&mut self) -> _TBEVENTW

Bits 10:11 - 11:10] GPT Timer B Event Mode The values in this register are defined as follows: Value Description 0x0 Positive edge 0x1 Negative edge 0x2 Reserved 0x3 Both edges Note: If PWM output inversion is enabled, edge detection interrupt behavior is reversed. Thus, if a positive-edge interrupt trigger has been set and the PWM inversion generates a postive edge, no event-trigger interrupt asserts. Instead, the interrupt is generated on the negative edge of the PWM signal.

pub fn tbstall(&mut self) -> _TBSTALLW

Bit 9 - 9:9] GPT Timer B Stall Enable

pub fn tben(&mut self) -> _TBENW

Bit 8 - 8:8] GPT Timer B Enable

pub fn reserved7(&mut self) -> _RESERVED7W

Bit 7 - 7:7] Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.

pub fn tapwml(&mut self) -> _TAPWMLW

Bit 6 - 6:6] GPT Timer A PWM Output Level

pub fn reserved4(&mut self) -> _RESERVED4W

Bits 4:5 - 5:4] Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.

pub fn taevent(&mut self) -> _TAEVENTW

Bits 2:3 - 3:2] GPT Timer A Event Mode The values in this register are defined as follows: Value Description 0x0 Positive edge 0x1 Negative edge 0x2 Reserved 0x3 Both edges Note: If PWM output inversion is enabled, edge detection interrupt behavior is reversed. Thus, if a positive-edge interrupt trigger has been set and the PWM inversion generates a postive edge, no event-trigger interrupt asserts. Instead, the interrupt is generated on the negative edge of the PWM signal.

pub fn tastall(&mut self) -> _TASTALLW

Bit 1 - 1:1] GPT Timer A Stall Enable

pub fn taen(&mut self) -> _TAENW

Bit 0 - 0:0] GPT Timer A Enable