[−][src]Enum cc13x2_cc26x2_hal::event::udmach14bsel::EVW

pub enum EVW {
    ALWAYS_ACTIVE,
    CPU_HALTED,
    AON_RTC_UPD,
    AUX_DMABREQ,
    AUX_DMASREQ,
    AUX_SW_DMABREQ,
    AUX_ADC_IRQ,
    AUX_OBSMUX0,
    AUX_ADC_FIFO_ALMOST_FULL,
    AUX_ADC_DONE,
    AUX_SMPH_AUTOTAKE_DONE,
    AUX_TIMER1_EV,
    AUX_TIMER0_EV,
    AUX_TDC_DONE,
    AUX_COMPB,
    AUX_COMPA,
    AUX_AON_WU_EV,
    TRNG_IRQ,
    SWEV3,
    SWEV2,
    SWEV1,
    SWEV0,
    WDT_NMI,
    CRYPTO_DMA_DONE_IRQ,
    CRYPTO_RESULT_AVAIL_IRQ,
    PORT_EVENT7,
    PORT_EVENT6,
    PORT_EVENT5,
    PORT_EVENT4,
    PORT_EVENT3,
    PORT_EVENT2,
    PORT_EVENT1,
    PORT_EVENT0,
    GPT3B_DMABREQ,
    GPT3A_DMABREQ,
    GPT2B_DMABREQ,
    GPT2A_DMABREQ,
    GPT1B_DMABREQ,
    GPT1A_DMABREQ,
    GPT0B_DMABREQ,
    GPT0A_DMABREQ,
    GPT3B_CMP,
    GPT3A_CMP,
    GPT2B_CMP,
    GPT2A_CMP,
    GPT1B_CMP,
    GPT1A_CMP,
    GPT0B_CMP,
    GPT0A_CMP,
    AUX_TIMER2_PULSE,
    AUX_TIMER2_EV3,
    AUX_TIMER2_EV2,
    AUX_TIMER2_EV1,
    AUX_TIMER2_EV0,
    UART1_TX_DMASREQ,
    UART1_TX_DMABREQ,
    UART1_RX_DMASREQ,
    UART1_RX_DMABREQ,
    UART0_TX_DMASREQ,
    UART0_TX_DMABREQ,
    UART0_RX_DMASREQ,
    UART0_RX_DMABREQ,
    SSI1_TX_DMASREQ,
    SSI1_TX_DMABREQ,
    SSI1_RX_DMASREQ,
    SSI1_RX_DMABREQ,
    SSI0_TX_DMASREQ,
    SSI0_TX_DMABREQ,
    SSI0_RX_DMASREQ,
    SSI0_RX_DMABREQ,
    DMA_DONE_COMB,
    DMA_ERR,
    UART1_COMB,
    UART0_COMB,
    SSI1_COMB,
    SSI0_COMB,
    PKA_IRQ,
    RFC_CPE_1,
    AUX_SWEV1,
    RFC_CPE_0,
    RFC_HW_COMB,
    RFC_CMD_ACK,
    WDT_IRQ,
    DMA_CH18_DONE,
    FLASH,
    DMA_CH0_DONE,
    GPT1B,
    GPT1A,
    GPT0B,
    GPT0A,
    GPT3B,
    GPT3A,
    GPT2B,
    GPT2A,
    AUX_COMB,
    AON_AUX_SWEV0,
    I2C_IRQ,
    I2S_IRQ,
    AON_RTC_COMB,
    OSC_COMB,
    BATMON_COMB,
    AON_GPIO_EDGE,
    AON_PROG2,
    AON_PROG1,
    AON_PROG0,
    NONE,
}

Values that can be written to the field EV

Variants

ALWAYS_ACTIVE

Always asserted

CPU_HALTED

CPU halted

AON_RTC_UPD

RTC periodic event controlled by AON_RTC:CTL.RTC_UPD_EN

AUX_DMABREQ

DMA burst request event from AUX, configured by AUX_EVCTL:DMACTL

AUX_DMASREQ

DMA single request event from AUX, configured by AUX_EVCTL:DMACTL

AUX_SW_DMABREQ

DMA sofware trigger from AUX, triggered by AUX_EVCTL:DMASWREQ.START

AUX_ADC_IRQ

AUX ADC interrupt event, corresponds to AUX_EVCTL:EVTOMCUFLAGS.AUX_ADC_IRQ. Status flags are found here AUX_EVCTL:EVTOMCUFLAGS

AUX_OBSMUX0

Loopback of OBSMUX0 through AUX, corresponds to AUX_EVCTL:EVTOMCUFLAGS.MCU_OBSMUX0

AUX_ADC_FIFO_ALMOST_FULL

AUX ADC FIFO watermark event, corresponds to AUX_EVCTL:EVTOMCUFLAGS.AUX_ADC_FIFO_ALMOST_FULL

AUX_ADC_DONE

AUX ADC done, corresponds to AUX_EVCTL:EVTOMCUFLAGS.AUX_ADC_DONE

AUX_SMPH_AUTOTAKE_DONE

Autotake event from AUX semaphore, configured by AUX_SMPH:AUTOTAKE

AUX_TIMER1_EV

AUX timer 1 event, corresponds to AUX_EVCTL:EVTOMCUFLAGS.AUX_TIMER1_EV

AUX_TIMER0_EV

AUX timer 0 event, corresponds to AUX_EVCTL:EVTOMCUFLAGS.AUX_TIMER0_EV

AUX_TDC_DONE

AUX TDC measurement done event, corresponds to the flag AUX_EVCTL:EVTOMCUFLAGS.AUX_TDC_DONE and the AUX_TDC status AUX_TDC:STAT.DONE

AUX_COMPB

AUX Compare B event, corresponds to AUX_EVCTL:EVTOMCUFLAGS.AUX_COMPB

AUX_COMPA

AUX Compare A event, corresponds to AUX_EVCTL:EVTOMCUFLAGS.AUX_COMPA

AUX_AON_WU_EV

AON wakeup event, the corresponding flag is here AUX_EVCTL:EVTOMCUFLAGS.AUX_WU_EV

TRNG_IRQ

TRNG Interrupt event, controlled by TRNG:IRQEN.EN

SWEV3

Software event 3, triggered by SWEV.SWEV3

SWEV2

Software event 2, triggered by SWEV.SWEV2

SWEV1

Software event 1, triggered by SWEV.SWEV1

SWEV0

Software event 0, triggered by SWEV.SWEV0

WDT_NMI

Watchdog non maskable interrupt event, controlled by WDT:CTL.INTTYPE

CRYPTO_DMA_DONE_IRQ

CRYPTO DMA input done event, the correspondingg flag is CRYPTO:IRQSTAT.DMA_IN_DONE. Controlled by CRYPTO:IRQEN.DMA_IN_DONE

CRYPTO_RESULT_AVAIL_IRQ

CRYPTO result available interupt event, the corresponding flag is found here CRYPTO:IRQSTAT.RESULT_AVAIL. Controlled by CRYPTO:IRQSTAT.RESULT_AVAIL

PORT_EVENT7

Port capture event from IOC, configured by IOC:IOCFGn.PORT_ID. Events on ports configured with ENUM PORT_EVENT7 wil be routed here.

PORT_EVENT6

Port capture event from IOC, configured by IOC:IOCFGn.PORT_ID. Events on ports configured with ENUM PORT_EVENT6 wil be routed here.

PORT_EVENT5

Port capture event from IOC, configured by IOC:IOCFGn.PORT_ID. Events on ports configured with ENUM PORT_EVENT4 wil be routed here.

PORT_EVENT4

Port capture event from IOC, configured by IOC:IOCFGn.PORT_ID. Events on ports configured with ENUM PORT_EVENT4 wil be routed here.

PORT_EVENT3

Port capture event from IOC, configured by IOC:IOCFGn.PORT_ID. Events on ports configured with ENUM PORT_EVENT3 wil be routed here.

PORT_EVENT2

Port capture event from IOC, configured by IOC:IOCFGn.PORT_ID. Events on ports configured with ENUM PORT_EVENT2 wil be routed here.

PORT_EVENT1

Port capture event from IOC, configured by IOC:IOCFGn.PORT_ID. Events on ports configured with ENUM PORT_EVENT1 wil be routed here.

PORT_EVENT0

Port capture event from IOC, configured by IOC:IOCFGn.PORT_ID. Events on ports configured with ENUM PORT_EVENT0 wil be routed here.

GPT3B_DMABREQ

GPT3B DMA trigger event. Configured by GPT3:DMAEV

GPT3A_DMABREQ

GPT3A DMA trigger event. Configured by GPT3:DMAEV

GPT2B_DMABREQ

GPT2B DMA trigger event. Configured by GPT2:DMAEV

GPT2A_DMABREQ

GPT2A DMA trigger event. Configured by GPT2:DMAEV

GPT1B_DMABREQ

GPT1B DMA trigger event. Configured by GPT1:DMAEV

GPT1A_DMABREQ

GPT1A DMA trigger event. Configured by GPT1:DMAEV

GPT0B_DMABREQ

GPT0B DMA trigger event. Configured by GPT0:DMAEV

GPT0A_DMABREQ

GPT0A DMA trigger event. Configured by GPT0:DMAEV

GPT3B_CMP

GPT3B compare event. Configured by GPT3:TBMR.TCACT

GPT3A_CMP

GPT3A compare event. Configured by GPT3:TAMR.TCACT

GPT2B_CMP

GPT2B compare event. Configured by GPT2:TBMR.TCACT

GPT2A_CMP

GPT2A compare event. Configured by GPT2:TAMR.TCACT

GPT1B_CMP

GPT1B compare event. Configured by GPT1:TBMR.TCACT

GPT1A_CMP

GPT1A compare event. Configured by GPT1:TAMR.TCACT

GPT0B_CMP

GPT0B compare event. Configured by GPT0:TBMR.TCACT

GPT0A_CMP

GPT0A compare event. Configured by GPT0:TAMR.TCACT

AUX_TIMER2_PULSE

AUX Timer2 pulse, corresponding to flag AUX_EVCTL:EVTOMCUFLAGS.AUX_TIMER2_PULSE

AUX_TIMER2_EV3

AUX Timer2 event 3, corresponding to flag AUX_EVCTL:EVTOMCUFLAGS.AUX_TIMER2_EV3

AUX_TIMER2_EV2

AUX Timer2 event 2, corresponding to flag AUX_EVCTL:EVTOMCUFLAGS.AUX_TIMER2_EV2

AUX_TIMER2_EV1

AUX Timer2 event 1, corresponding to flag AUX_EVCTL:EVTOMCUFLAGS.AUX_TIMER2_EV1

AUX_TIMER2_EV0

AUX Timer2 event 0, corresponding to flag AUX_EVCTL:EVTOMCUFLAGS.AUX_TIMER2_EV0

UART1_TX_DMASREQ

UART1 TX DMA single request, controlled by UART1:DMACTL.TXDMAE

UART1_TX_DMABREQ

UART1 TX DMA burst request, controlled by UART1:DMACTL.TXDMAE

UART1_RX_DMASREQ

UART1 RX DMA single request, controlled by UART1:DMACTL.RXDMAE

UART1_RX_DMABREQ

UART1 RX DMA burst request, controlled by UART1:DMACTL.RXDMAE

UART0_TX_DMASREQ

UART0 TX DMA single request, controlled by UART0:DMACTL.TXDMAE

UART0_TX_DMABREQ

UART0 TX DMA burst request, controlled by UART0:DMACTL.TXDMAE

UART0_RX_DMASREQ

UART0 RX DMA single request, controlled by UART0:DMACTL.RXDMAE

UART0_RX_DMABREQ

UART0 RX DMA burst request, controlled by UART0:DMACTL.RXDMAE

SSI1_TX_DMASREQ

SSI1 TX DMA single request, controlled by SSI0:DMACR.TXDMAE

SSI1_TX_DMABREQ

SSI1 TX DMA burst request , controlled by SSI0:DMACR.TXDMAE

SSI1_RX_DMASREQ

SSI1 RX DMA single request, controlled by SSI0:DMACR.RXDMAE

SSI1_RX_DMABREQ

SSI1 RX DMA burst request , controlled by SSI0:DMACR.RXDMAE

SSI0_TX_DMASREQ

SSI0 TX DMA single request, controlled by SSI0:DMACR.TXDMAE

SSI0_TX_DMABREQ

SSI0 TX DMA burst request , controlled by SSI0:DMACR.TXDMAE

SSI0_RX_DMASREQ

SSI0 RX DMA single request, controlled by SSI0:DMACR.RXDMAE

SSI0_RX_DMABREQ

SSI0 RX DMA burst request , controlled by SSI0:DMACR.RXDMAE

DMA_DONE_COMB

Combined DMA done, corresponding flags are here UDMA0:REQDONE

DMA_ERR

DMA bus error, corresponds to UDMA0:ERROR.STATUS

UART1_COMB

UART1 combined interrupt, interrupt flags are found here UART1:MIS

UART0_COMB

UART0 combined interrupt, interrupt flags are found here UART0:MIS

SSI1_COMB

SSI1 combined interrupt, interrupt flags are found here SSI1:MIS

SSI0_COMB

SSI0 combined interrupt, interrupt flags are found here SSI0:MIS

PKA_IRQ

PKA Interrupt event

RFC_CPE_1

Combined Interrupt for CPE Generated events. Corresponding flags are here RFC_DBELL:RFCPEIFG. Only interrupts selected with CPE1 in RFC_DBELL:RFCPEIFG can trigger a RFC_CPE_1 event

AUX_SWEV1

AUX software event 1, triggered by AUX_EVCTL:SWEVSET.SWEV1, also available as AUX_EVENT2 AON wake up event. MCU domain wakeup control AON_EVENT:MCUWUSEL

RFC_CPE_0

Combined Interrupt for CPE Generated events. Corresponding flags are here RFC_DBELL:RFCPEIFG. Only interrupts selected with CPE0 in RFC_DBELL:RFCPEIFG can trigger a RFC_CPE_0 event

RFC_HW_COMB

Combined RFC hardware interrupt, corresponding flag is here RFC_DBELL:RFHWIFG

RFC_CMD_ACK

RFC Doorbell Command Acknowledgement Interrupt, equvialent to RFC_DBELL:RFACKIFG.ACKFLAG

WDT_IRQ

Watchdog interrupt event, controlled by WDT:CTL.INTEN

DMA_CH18_DONE

DMA done for software tiggered UDMA channel 18, see UDMA0:SOFTREQ

FLASH

FLASH controller error event, the status flags are FLASH:FEDACSTAT.FSM_DONE and FLASH:FEDACSTAT.RVF_INT

DMA_CH0_DONE

DMA done for software tiggered UDMA channel 0, see UDMA0:SOFTREQ

GPT1B

GPT1B interrupt event, controlled by GPT1:TBMR

GPT1A

GPT1A interrupt event, controlled by GPT1:TAMR

GPT0B

GPT0B interrupt event, controlled by GPT0:TBMR

GPT0A

GPT0A interrupt event, controlled by GPT0:TAMR

GPT3B

GPT3B interrupt event, controlled by GPT3:TBMR

GPT3A

GPT3A interrupt event, controlled by GPT3:TAMR

GPT2B

GPT2B interrupt event, controlled by GPT2:TBMR

GPT2A

GPT2A interrupt event, controlled by GPT2:TAMR

AUX_COMB

AUX combined event, the corresponding flag register is here AUX_EVCTL:EVTOMCUFLAGS

AON_AUX_SWEV0

AUX Software event 0, AUX_EVCTL:SWEVSET.SWEV0

I2C_IRQ

Interrupt event from I2C

I2S_IRQ

Interrupt event from I2S

AON_RTC_COMB

Event from AON_RTC, controlled by the AON_RTC:CTL.COMB_EV_MASK setting

OSC_COMB

Combined event from Oscillator control

BATMON_COMB

Combined event from battery monitor

AON_GPIO_EDGE

Edge detect event from IOC. Configureded by the IOC:IOCFGn.EDGE_IRQ_EN and IOC:IOCFGn.EDGE_DET settings

AON_PROG2

AON programmable event 2. Event selected by AON_EVENT MCU event selector, AON_EVENT:EVTOMCUSEL.AON_PROG2_EV

AON_PROG1

AON programmable event 1. Event selected by AON_EVENT MCU event selector, AON_EVENT:EVTOMCUSEL.AON_PROG1_EV

AON_PROG0

AON programmable event 0. Event selected by AON_EVENT MCU event selector, AON_EVENT:EVTOMCUSEL.AON_PROG0_EV

NONE

Always inactive

Auto Trait Implementations

`impl Send for EVW`

`impl Sync for EVW`

Blanket Implementations

`impl<T, U> TryFrom for T where U: Into<T>,` [src]

`type Error = Infallible`

The type returned in the event of a conversion error.

`fn try_from(value: U) -> Result<T, <T as TryFrom<U>>::Error>`[src]

`impl<T> From for T`[src]

`fn from(t: T) -> T`[src]

`impl<T, U> TryInto for T where U: TryFrom<T>,` [src]

`type Error = <U as TryFrom<T>>::Error`

The type returned in the event of a conversion error.

`fn try_into(self) -> Result<U, <U as TryFrom<T>>::Error>`[src]

`impl<T, U> Into for T where U: From<T>,` [src]

`fn into(self) -> U`[src]

`impl<T> Borrow for T where T: ?Sized,` [src]

`fn borrow(&self) -> &T`[src]

`impl<T> BorrowMut for T where T: ?Sized,` [src]

`fn borrow_mut(&mut self) -> &mut T`[src]

`impl<T> Any for T where T: 'static + ?Sized,` [src]

`fn type_id(&self) -> TypeId`[src]

`impl<T> Same for T`

`type Output = T`

Should always be Self

[−][src]Enum cc13x2_cc26x2_hal::event::udmach14bsel::EVW

Variants

Auto Trait Implementations

impl Send for EVW

impl Sync for EVW

Blanket Implementations

impl<T, U> TryFrom for T where U: Into<T>, [src]

type Error = Infallible

fn try_from(value: U) -> Result<T, <T as TryFrom<U>>::Error>[src]

impl<T> From for T[src]

fn from(t: T) -> T[src]

impl<T, U> TryInto for T where U: TryFrom<T>, [src]

type Error = <U as TryFrom<T>>::Error

fn try_into(self) -> Result<U, <U as TryFrom<T>>::Error>[src]

impl<T, U> Into for T where U: From<T>, [src]

fn into(self) -> U[src]

impl<T> Borrow for T where T: ?Sized, [src]

fn borrow(&self) -> &T[src]

impl<T> BorrowMut for T where T: ?Sized, [src]

fn borrow_mut(&mut self) -> &mut T[src]

impl<T> Any for T where T: 'static + ?Sized, [src]

fn type_id(&self) -> TypeId[src]

impl<T> Same for T

type Output = T