Struct cc13x2_cc26x2_hal::cpu_scs::actlr::R

pub struct R { /* fields omitted */ }

Value read from the register

Methods

impl R

pub fn bits(&self) -> u32

Value of the register as raw bits

pub fn reserved10(&self) -> RESERVED10R

Bits 10:31 - 31:10] Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.

pub fn disoofp(&self) -> DISOOFPR

Bit 9 - 9:9] Disables floating point instructions completing out of order with respect to integer instructions.

pub fn disfpca(&self) -> DISFPCAR

Bit 8 - 8:8] Disable automatic update of CONTROL.FPCA

pub fn reserved3(&self) -> RESERVED3R

Bits 3:7 - 7:3] Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.

pub fn disfold(&self) -> DISFOLDR

Bit 2 - 2:2] Disables folding of IT instruction.

pub fn disdefwbuf(&self) -> DISDEFWBUFR

Bit 1 - 1:1] Disables write buffer use during default memory map accesses. This causes all bus faults to be precise bus faults but decreases the performance of the processor because the stores to memory have to complete before the next instruction can be executed.

pub fn dismcycint(&self) -> DISMCYCINTR

Bit 0 - 0:0] Disables interruption of multi-cycle instructions. This increases the interrupt latency of the processor becuase LDM/STM completes before interrupt stacking occurs.