Struct cc13x2_cc26x2_hal::aux_ddi0_osc::stat1::W

pub struct W { /* fields omitted */ }

Value to write to the register

Methods

impl W

pub fn reset_value() -> W

Reset value of the register

pub unsafe fn bits(&mut self, bits: u32) -> &mut Self

Writes raw bits to the register

pub fn rampstate(&mut self) -> _RAMPSTATEW

Bits 28:31 - 31:28] AMPCOMP FSM State

pub fn hpm_update_amp(&mut self) -> _HPM_UPDATE_AMPW

Bits 22:27 - 27:22] XOSC_HF amplitude during HPM_UPDATE state. When amplitude compensation of XOSC_HF is enabled in high performance mode, this value is the amplitude of the crystal oscillations measured by the on-chip oscillator ADC, divided by 15 mV. For example, a value of 0x20 would indicate that the amplitude of the crystal is approximately 480 mV. To enable amplitude compensation, AON_WUC OSCCFG must be set to a non-zero value.

pub fn lpm_update_amp(&mut self) -> _LPM_UPDATE_AMPW

Bits 16:21 - 21:16] XOSC_HF amplitude during LPM_UPDATE state When amplitude compensation of XOSC_HF is enabled in low power mode, this value is the amplitude of the crystal oscillations measured by the on-chip oscillator ADC, divided by 15 mV. For example, a value of 0x20 would indicate that the amplitude of the crystal is approximately 480 mV. To enable amplitude compensation, AON_WUC OSCCFG must be set to a non-zero value.

pub fn force_rcosc_hf(&mut self) -> _FORCE_RCOSC_HFW

Bit 15 - 15:15] force_rcosc_hf

pub fn sclk_hf_en(&mut self) -> _SCLK_HF_ENW

Bit 14 - 14:14] SCLK_HF_EN

pub fn sclk_mf_en(&mut self) -> _SCLK_MF_ENW

Bit 13 - 13:13] SCLK_MF_EN

pub fn aclk_adc_en(&mut self) -> _ACLK_ADC_ENW

Bit 12 - 12:12] ACLK_ADC_EN

pub fn aclk_tdc_en(&mut self) -> _ACLK_TDC_ENW

Bit 11 - 11:11] ACLK_TDC_EN

pub fn aclk_ref_en(&mut self) -> _ACLK_REF_ENW

Bit 10 - 10:10] ACLK_REF_EN

pub fn clk_chp_en(&mut self) -> _CLK_CHP_ENW

Bit 9 - 9:9] CLK_CHP_EN

pub fn clk_dcdc_en(&mut self) -> _CLK_DCDC_ENW

Bit 8 - 8:8] CLK_DCDC_EN

pub fn sclk_hf_good(&mut self) -> _SCLK_HF_GOODW

Bit 7 - 7:7] SCLK_HF_GOOD

pub fn sclk_mf_good(&mut self) -> _SCLK_MF_GOODW

Bit 6 - 6:6] SCLK_MF_GOOD

pub fn sclk_lf_good(&mut self) -> _SCLK_LF_GOODW

Bit 5 - 5:5] SCLK_LF_GOOD

pub fn aclk_adc_good(&mut self) -> _ACLK_ADC_GOODW

Bit 4 - 4:4] ACLK_ADC_GOOD

pub fn aclk_tdc_good(&mut self) -> _ACLK_TDC_GOODW

Bit 3 - 3:3] ACLK_TDC_GOOD

pub fn aclk_ref_good(&mut self) -> _ACLK_REF_GOODW

Bit 2 - 2:2] ACLK_REF_GOOD.

pub fn clk_chp_good(&mut self) -> _CLK_CHP_GOODW

Bit 1 - 1:1] CLK_CHP_GOOD

pub fn clk_dcdc_good(&mut self) -> _CLK_DCDC_GOODW

Bit 0 - 0:0] CLK_DCDC_GOOD