Struct cc13x2_cc26x2_hal::aux_ddi0_osc::stat1::R

pub struct R { /* fields omitted */ }

Value read from the register

Methods

impl R

pub fn bits(&self) -> u32

Value of the register as raw bits

pub fn rampstate(&self) -> RAMPSTATER

Bits 28:31 - 31:28] AMPCOMP FSM State

pub fn hpm_update_amp(&self) -> HPM_UPDATE_AMPR

Bits 22:27 - 27:22] XOSC_HF amplitude during HPM_UPDATE state. When amplitude compensation of XOSC_HF is enabled in high performance mode, this value is the amplitude of the crystal oscillations measured by the on-chip oscillator ADC, divided by 15 mV. For example, a value of 0x20 would indicate that the amplitude of the crystal is approximately 480 mV. To enable amplitude compensation, AON_WUC OSCCFG must be set to a non-zero value.

pub fn lpm_update_amp(&self) -> LPM_UPDATE_AMPR

Bits 16:21 - 21:16] XOSC_HF amplitude during LPM_UPDATE state When amplitude compensation of XOSC_HF is enabled in low power mode, this value is the amplitude of the crystal oscillations measured by the on-chip oscillator ADC, divided by 15 mV. For example, a value of 0x20 would indicate that the amplitude of the crystal is approximately 480 mV. To enable amplitude compensation, AON_WUC OSCCFG must be set to a non-zero value.

pub fn force_rcosc_hf(&self) -> FORCE_RCOSC_HFR

Bit 15 - 15:15] force_rcosc_hf

pub fn sclk_hf_en(&self) -> SCLK_HF_ENR

Bit 14 - 14:14] SCLK_HF_EN

pub fn sclk_mf_en(&self) -> SCLK_MF_ENR

Bit 13 - 13:13] SCLK_MF_EN

pub fn aclk_adc_en(&self) -> ACLK_ADC_ENR

Bit 12 - 12:12] ACLK_ADC_EN

pub fn aclk_tdc_en(&self) -> ACLK_TDC_ENR

Bit 11 - 11:11] ACLK_TDC_EN

pub fn aclk_ref_en(&self) -> ACLK_REF_ENR

Bit 10 - 10:10] ACLK_REF_EN

pub fn clk_chp_en(&self) -> CLK_CHP_ENR

Bit 9 - 9:9] CLK_CHP_EN

pub fn clk_dcdc_en(&self) -> CLK_DCDC_ENR

Bit 8 - 8:8] CLK_DCDC_EN

pub fn sclk_hf_good(&self) -> SCLK_HF_GOODR

Bit 7 - 7:7] SCLK_HF_GOOD

pub fn sclk_mf_good(&self) -> SCLK_MF_GOODR

Bit 6 - 6:6] SCLK_MF_GOOD

pub fn sclk_lf_good(&self) -> SCLK_LF_GOODR

Bit 5 - 5:5] SCLK_LF_GOOD

pub fn aclk_adc_good(&self) -> ACLK_ADC_GOODR

Bit 4 - 4:4] ACLK_ADC_GOOD

pub fn aclk_tdc_good(&self) -> ACLK_TDC_GOODR

Bit 3 - 3:3] ACLK_TDC_GOOD

pub fn aclk_ref_good(&self) -> ACLK_REF_GOODR

Bit 2 - 2:2] ACLK_REF_GOOD.

pub fn clk_chp_good(&self) -> CLK_CHP_GOODR

Bit 1 - 1:1] CLK_CHP_GOOD

pub fn clk_dcdc_good(&self) -> CLK_DCDC_GOODR

Bit 0 - 0:0] CLK_DCDC_GOOD