Enum capstone::Mode [−][src]
pub enum Mode {}Show 30 variants
Arm, Mode16, Mode32, Mode64, Thumb, Mips2, Mips3, Mips32R6, Mips32, Mips64, V9, Qpx, M68k000, M68k010, M68k020, M68k030, M68k040, M680x6301, M680x6309, M680x6800, M680x6801, M680x6805, M680x6808, M680x6809, M680x6811, M680xCpu12, M680xHcs08, RiscV32, RiscV64, Default,
Expand description
Disassembler modes
Variants
32-bit ARM
16-bit mode (X86)
32-bit mode (X86)
64-bit mode (X86, PPC)
ARM’s Thumb mode, including Thumb-2
Mips II ISA
Mips III ISA
Mips32r6 ISA
Mips32 ISA (Mips)
Mips64 ISA (Mips)
SparcV9 mode (Sparc)
Quad Processing eXtensions mode (PPC)
M68K 68000 mode
M68K 68010 mode
M68K 68020 mode
M68K 68030 mode
M68K 68040 mode
M680X Hitachi 6301,6303 mode
M680X Hitachi 6309 mode
M680X Motorola 6800,6802 mode
M680X Motorola 6801,6803 mode
M680X Motorola/Freescale 6805 mode
M680X Motorola/Freescale/NXP 68HC08 mode
M680X Motorola 6809 mode
M680X Motorola/Freescale/NXP 68HC11 mode
M680X Motorola/Freescale/NXP CPU12
M680X Freescale/NXP HCS08 mode
RISC-V 32-bit mode
RISC-V 64-bit mode
Default mode for little-endian
Trait Implementations
Auto Trait Implementations
impl RefUnwindSafe for Mode
impl UnwindSafe for Mode
Blanket Implementations
Mutably borrows from an owned value. Read more