Crate capstone_sys [−] [src]
libcapstone.so.3 bindings
If you want to compile this for another target, wasm32-unknown-emscripten
, for example,
it is currently recommended to pass the feature flag use_bundled_capstone_cmake
to
build capstone using the cmake build system (which requires cmake to be installed).
This has seen some (limited) testing and has been seen to work on the
wasm32-unknown-emscripten
target at least.
Compiling on windows has not been tested, although this should be easy to setup.
The following architectures are supported:
arm
: ARMarm64
: ARM64 (also known as AArch64)mips
: MIPSppc
: PowerPCsparc
: SPARCsysz
: System zx86
: x86 family (includes 16, 32, and 64 bit modes)xcore
: XCore
For each architecture, at least the following types are defined (replace ARCH
with
architecture names shown above):
enum ARCH_insn
: instruction idsenum ARCH_insn_group
: architecture-specific group idsenum ARCH_op_type
: instruction operand types idsenum ARCH_reg
1: register idsstruct ARCH_op_mem
: operand referring to memorystruct cs_ARCH_op
: instruction operandstruct cs_ARCH
: instruction
Note: documentation for functions/types was taken directly from Capstone C headers.
1: Defined as a "constified" enum modules because discriminant values are not unique. Rust requires discriminant values to be unique.
Modules
arm64_insn_group | |
arm64_reg | |
arm_insn_group | |
arm_reg | |
cs_err | |
cs_group_type |
Common instruction groups - to be consistent across all architectures. |
cs_opt_value |
Runtime option value (associated with option type above) |
mips_insn_group | |
mips_reg | |
ppc_insn_group | |
ppc_reg | |
sparc_insn_group | |
sparc_reg | |
sysz_insn_group | |
sysz_reg | |
x86_insn_group | |
x86_reg | |
xcore_insn_group | |
xcore_reg |
Structs
CapstoneArchInfo |
Information specific to architecture |
__va_list_tag | |
arm64_op_mem | |
arm_op_mem | |
cs_arm | |
cs_arm64 | |
cs_arm64_op | |
cs_arm64_op__bindgen_ty_1 | |
cs_arm_op | |
cs_arm_op__bindgen_ty_1 | |
cs_detail |
NOTE: All information in cs_detail is only available when CS_OPT_DETAIL = CS_OPT_ON |
cs_insn |
Detail information of disassembled instruction |
cs_mips | |
cs_mips_op | |
cs_mode |
Mode type |
cs_opt_mem |
User-defined dynamic memory related functions: malloc/calloc/realloc/free/vsnprintf() |
cs_opt_skipdata |
User-customized setup for SKIPDATA option |
cs_ppc | |
cs_ppc_op | |
cs_sparc | |
cs_sparc_op | |
cs_sysz | |
cs_sysz_op | |
cs_x86 | |
cs_x86_op | |
cs_xcore | |
cs_xcore_op | |
mips_op_mem | |
ppc_op_crx | |
ppc_op_mem | |
sparc_op_mem | |
sysz_op_mem | |
x86_op_mem | |
xcore_op_mem |
Enums
arm64_at_op | |
arm64_barrier_op | |
arm64_cc | |
arm64_dc_op | |
arm64_extender | |
arm64_ic_op | |
arm64_insn | |
arm64_msr_reg | |
arm64_op_type | |
arm64_prefetch_op | |
arm64_pstate | |
arm64_shifter | |
arm64_sysreg | |
arm64_tlbi_op | |
arm64_vas | |
arm64_vess | |
arm_cc | |
arm_cpsflag_type | |
arm_cpsmode_type | |
arm_insn | |
arm_mem_barrier | |
arm_op_type | |
arm_setend_type | |
arm_shifter | |
arm_sysreg | |
arm_vectordata_type | |
cs_arch |
Architecture type |
cs_op_type |
Common instruction operand types - to be consistent across all architectures. |
cs_opt_type |
Runtime option for the disassembled engine |
mips_insn | |
mips_op_type | |
ppc_bc | |
ppc_bh | |
ppc_insn | |
ppc_op_type | |
sparc_cc | |
sparc_hint | |
sparc_insn | |
sparc_op_type | |
sysz_cc | |
sysz_insn | |
sysz_op_type | |
x86_avx_bcast | |
x86_avx_cc | |
x86_avx_rm | |
x86_insn | |
x86_op_type | |
x86_prefix | |
x86_sse_cc | |
xcore_insn | |
xcore_op_type |
Constants
CS_MODE_16 |
16-bit mode (X86) |
CS_MODE_32 |
32-bit mode (X86) |
CS_MODE_64 |
64-bit mode (X86, PPC) |
CS_MODE_ARM |
32-bit ARM |
CS_MODE_BIG_ENDIAN |
big-endian mode |
CS_MODE_LITTLE_ENDIAN |
little-endian mode (default mode) |
CS_MODE_MCLASS |
ARM's Cortex-M series |
CS_MODE_MICRO |
MicroMips mode (MIPS) |
CS_MODE_MIPS3 |
Mips III ISA |
CS_MODE_MIPS32 |
Mips32 ISA (Mips) |
CS_MODE_MIPS64 |
Mips64 ISA (Mips) |
CS_MODE_MIPS32R6 |
Mips32r6 ISA |
CS_MODE_MIPSGP64 |
MicroMips mode (MIPS) |
CS_MODE_THUMB |
ARM's Thumb mode, including Thumb-2 |
CS_MODE_V8 |
ARMv8 A32 encodings for ARM |
CS_MODE_V9 |
SparcV9 mode (Sparc) |
CS_SUPPORT_DIET | |
CS_SUPPORT_X86_REDUCE |
Statics
ARCH_INCLUDES | |
BINDINGS_FILE |
Functions
cs_close⚠ |
Close CS handle: MUST do to release the handle when it is not used anymore. NOTE: this must be only called when there is no longer usage of Capstone, not even access to cs_insn array. The reason is the this API releases some cached memory, thus access to any Capstone API after cs_close() might crash your application. |
cs_disasm⚠ |
Disassemble binary code, given the code buffer, size, address and number
of instructions to be decoded.
This API dynamically allocate memory to contain disassembled instruction.
Resulted instructions will be put into * |
cs_disasm_ex⚠ |
Deprecated function - to be retired in the next version! |
cs_disasm_iter⚠ |
Fast API to disassemble binary code, given the code buffer, size, address and number of instructions to be decoded. This API put the resulted instruction into a given cache in @insn. See tests/test_iter.c for sample code demonstrating this API. |
cs_errno⚠ |
Report the last error number when some API function fail. Like glibc's errno, cs_errno might not retain its old value once accessed. |
cs_free⚠ |
Free memory allocated by cs_malloc() or cs_disasm() (argument @insn) |
cs_group_name⚠ |
Return friendly name of a group id (that an instruction can belong to) Find the group id from header file of corresponding architecture (arm.h for ARM, x86.h for X86, ...) |
cs_insn_group⚠ |
Check if a disassembled instruction belong to a particular group.
Find the group id from header file of corresponding architecture (arm.h for ARM, x86.h for X86, ...)
Internally, this simply verifies if |
cs_insn_name⚠ |
Return friendly name of an instruction in a string. Find the instruction id from header file of corresponding architecture (arm.h for ARM, x86.h for X86, ...) |
cs_malloc⚠ |
Allocate memory for 1 instruction to be used by cs_disasm_iter(). |
cs_op_count⚠ |
Count the number of operands of a given type. Find the operand type in header file of corresponding architecture (arm.h for ARM, x86.h for X86, ...) |
cs_op_index⚠ |
Retrieve the position of operand of given type in |
cs_open⚠ |
Initialize CS handle: this must be done before any usage of CS. |
cs_option⚠ |
Set option for disassembling engine at runtime |
cs_reg_name⚠ |
Return friendly name of register in a string. Find the instruction id from header file of corresponding architecture (arm.h for ARM, x86.h for X86, ...) |
cs_reg_read⚠ |
Check if a disassembled instruction IMPLICITLY used a particular register.
Find the register id from header file of corresponding architecture (arm.h for ARM, x86.h for X86, ...)
Internally, this simply verifies if |
cs_reg_write⚠ |
Check if a disassembled instruction IMPLICITLY modified a particular register. Find the register id from header file of corresponding architecture (arm.h for ARM, x86.h for X86, ...) Internally, this simply verifies if @reg_id matches any member of insn->regs_write array. |
cs_strerror⚠ |
Return a string describing given error code. |
cs_support⚠ |
This API can be used to either ask for archs supported by this library, or check to see if the library was compile with 'diet' option (or called in 'diet' mode). |
cs_version⚠ |
Return combined API version & major and minor version numbers. |
Type Definitions
__builtin_va_list | |
cs_calloc_t | |
cs_free_t | |
cs_malloc_t | |
cs_realloc_t | |
cs_skipdata_cb_t |
User-defined callback function for SKIPDATA option. See tests/test_skipdata.c for sample code demonstrating this API. |
cs_vsnprintf_t | |
csh |
Handle using with all API |
va_list |