calyx_ir/context.rs
1//! An IR context. This is the top-level object for an IR and contains all information
2//! need to transform, lower, an emit a program.
3//! Passes usually have transform/analyze the components in the IR.
4use super::{Component, Id};
5use calyx_frontend::LibrarySignatures;
6
7/// Configuration information for the backends.
8#[derive(Default)]
9pub struct BackendConf {
10 /// Enables synthesis mode.
11 pub synthesis_mode: bool,
12 /// Enables verification checks.
13 pub enable_verification: bool,
14 /// Use flat (ANF) assignments for guards instead of deep expression trees.
15 pub flat_assign: bool,
16 /// [FIRRTL backend only] Emit extmodule declarations for primtives
17 /// for use with SystemVerilog implementations
18 pub emit_primitive_extmodules: bool,
19}
20
21/// The IR Context that represents an entire Calyx program with all of its
22/// imports and dependencies resolved.
23pub struct Context {
24 /// The components for this program.
25 pub components: Vec<Component>,
26 /// Library definitions imported by the program.
27 pub lib: LibrarySignatures,
28 /// Entrypoint for the program
29 pub entrypoint: Id,
30 /// Configuration flags for backends.
31 pub bc: BackendConf,
32 /// Extra options provided to the command line.
33 /// Interpreted by individual passes
34 pub extra_opts: Vec<String>,
35 /// An optional opaque metadata string which is used by Cider
36 pub metadata: Option<String>,
37}
38
39impl Context {
40 // Return the index to the entrypoint component.
41 fn entrypoint_idx(&self) -> usize {
42 self.components
43 .iter()
44 .position(|c| c.name == self.entrypoint)
45 .unwrap_or_else(|| panic!("No entrypoint in the program"))
46 }
47
48 /// Return the entrypoint component.
49 pub fn entrypoint(&self) -> &Component {
50 &self.components[self.entrypoint_idx()]
51 }
52
53 /// Return the entrypoint component with mutable access.
54 pub fn entrypoint_mut(&mut self) -> &mut Component {
55 let idx = self.entrypoint_idx();
56 &mut self.components[idx]
57 }
58}