Expand description
In-process L1 cache with per-entry TTL, backed by quick_cache.
Structs§
- L1Cache
- In-process cache with per-entry TTL, backed by
quick_cache.
Enums§
- L1Swr
Read - Outcome of an SWR-aware L1 read — see
L1Cache::get_with_swr.
In-process L1 cache with per-entry TTL, backed by quick_cache.
quick_cache.L1Cache::get_with_swr.