codegen_opcodes/
codegen_opcodes.rs

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use c64_assembler_6502::{
    isa_6502,
    opcodes::{OpCode, NO_IMPLIED},
};

fn main() {
    fn format_opcode(result: &mut Vec<String>, instruction: &str, opcode: OpCode, post: &str) {
        if opcode != NO_IMPLIED {
            result.push(format!(
                "/// OpCode for the {} instruction in addressing mode {}
pub const {}_{}:OpCode = 0x{:02x};",
                instruction,
                post.to_lowercase(),
                instruction.to_string().to_uppercase(),
                post,
                opcode
            ));
        }
    }

    let mut lines = Vec::<String>::default();
    for def in isa_6502() {
        format_opcode(&mut lines, def.instruction, def.implied, "IMPLIED");
        format_opcode(&mut lines, def.instruction, def.immediate, "IMMEDIATE");
        format_opcode(&mut lines, def.instruction, def.accumulator, "ACCUMULATOR");
        format_opcode(&mut lines, def.instruction, def.absolute, "ABSOLUTE");
        format_opcode(&mut lines, def.instruction, def.absolute_x, "ABSOLUTE_X");
        format_opcode(&mut lines, def.instruction, def.absolute_y, "ABSOLUTE_Y");
        format_opcode(&mut lines, def.instruction, def.zeropage, "ZEROPAGE");
        format_opcode(&mut lines, def.instruction, def.zeropage_x, "ZEROPAGE_X");
        format_opcode(&mut lines, def.instruction, def.zeropage_y, "ZEROPAGE_Y");
        format_opcode(&mut lines, def.instruction, def.relative, "RELATIVE");
        format_opcode(&mut lines, def.instruction, def.indirect, "INDIRECT");
        format_opcode(&mut lines, def.instruction, def.indexed_indirect, "INDEXED_INDIRECT");
        format_opcode(&mut lines, def.instruction, def.indirect_indexed, "INDIRECT_INDEXED");
    }

    println!("{}", lines.join("\n"));
}