Enum burst::x86::OperandType
source · [−]#[repr(i32)]
pub enum OperandType {
Show 158 variants
NONE,
IMM,
MEM,
REG_AL,
REG_CL,
REG_DL,
REG_BL,
REG_AH,
REG_CH,
REG_DH,
REG_BH,
REG_SPL,
REG_BPL,
REG_SIL,
REG_DIL,
REG_R8B,
REG_R9B,
REG_R10B,
REG_R11B,
REG_R12B,
REG_R13B,
REG_R14B,
REG_R15B,
REG_AX,
REG_CX,
REG_DX,
REG_BX,
REG_SP,
REG_BP,
REG_SI,
REG_DI,
REG_R8W,
REG_R9W,
REG_R10W,
REG_R11W,
REG_R12W,
REG_R13W,
REG_R14W,
REG_R15W,
REG_EAX,
REG_ECX,
REG_EDX,
REG_EBX,
REG_ESP,
REG_EBP,
REG_ESI,
REG_EDI,
REG_R8D,
REG_R9D,
REG_R10D,
REG_R11D,
REG_R12D,
REG_R13D,
REG_R14D,
REG_R15D,
REG_RAX,
REG_RCX,
REG_RDX,
REG_RBX,
REG_RSP,
REG_RBP,
REG_RSI,
REG_RDI,
REG_R8,
REG_R9,
REG_R10,
REG_R11,
REG_R12,
REG_R13,
REG_R14,
REG_R15,
REG_ST0,
REG_ST1,
REG_ST2,
REG_ST3,
REG_ST4,
REG_ST5,
REG_ST6,
REG_ST7,
REG_MM0,
REG_MM1,
REG_MM2,
REG_MM3,
REG_MM4,
REG_MM5,
REG_MM6,
REG_MM7,
REG_XMM0,
REG_XMM1,
REG_XMM2,
REG_XMM3,
REG_XMM4,
REG_XMM5,
REG_XMM6,
REG_XMM7,
REG_XMM8,
REG_XMM9,
REG_XMM10,
REG_XMM11,
REG_XMM12,
REG_XMM13,
REG_XMM14,
REG_XMM15,
REG_CR0,
REG_CR1,
REG_CR2,
REG_CR3,
REG_CR4,
REG_CR5,
REG_CR6,
REG_CR7,
REG_CR8,
REG_CR9,
REG_CR10,
REG_CR11,
REG_CR12,
REG_CR13,
REG_CR14,
REG_CR15,
REG_DR0,
REG_DR1,
REG_DR2,
REG_DR3,
REG_DR4,
REG_DR5,
REG_DR6,
REG_DR7,
REG_DR8,
REG_DR9,
REG_DR10,
REG_DR11,
REG_DR12,
REG_DR13,
REG_DR14,
REG_DR15,
REG_TR0,
REG_TR1,
REG_TR2,
REG_TR3,
REG_TR4,
REG_TR5,
REG_TR6,
REG_TR7,
REG_TR8,
REG_TR9,
REG_TR10,
REG_TR11,
REG_TR12,
REG_TR13,
REG_TR14,
REG_TR15,
REG_ES,
REG_CS,
REG_SS,
REG_DS,
REG_FS,
REG_GS,
REG_RIP,
}
Expand description
The location used by an operand.
Variants
NONE
Invalid / no operand.
IMM
An immediate operand.
MEM
A memory operand.
REG_AL
GPR. Accumulator register. 8 LSB bits of 16.
REG_CL
GPR. Counter register. 8 LSB bits of 16.
REG_DL
GPR. Data register. 8 LSB bits of 16.
REG_BL
GPR. Base register. 8 LSB bits of 16.
REG_AH
GPR. Accumulator register. 8 MSB bits of 16.
REG_CH
GPR. Counter register. 8 MSB bits of 16.
REG_DH
GPR. Data register. 8 MSB bits of 16.
REG_BH
GPR. Base register. 8 MSB bits of 16.
REG_SPL
REG_BPL
REG_SIL
REG_DIL
REG_R8B
x86_64 GPR. Lowermost 8 bits of 64.
REG_R9B
x86_64 GPR. Lowermost 8 bits of 64.
REG_R10B
x86_64 GPR. Lowermost 8 bits of 64.
REG_R11B
x86_64 GPR. Lowermost 8 bits of 64.
REG_R12B
x86_64 GPR. Lowermost 8 bits of 64.
REG_R13B
x86_64 GPR. Lowermost 8 bits of 64.
REG_R14B
x86_64 GPR. Lowermost 8 bits of 64.
REG_R15B
x86_64 GPR. Lowermost 8 bits of 64.
REG_AX
GPR. Accumulator register. 16 bits.
REG_CX
GPR. Counter register. 16 bits.
REG_DX
GPR. Data register. 16 bits.
REG_BX
GPR. Base register. 16 bits.
REG_SP
GPR. Stack pointer register. 16 bits.
REG_BP
GPR. Stack base pointer register. 16 bits.
REG_SI
GPR. Source index register. 16 bits.
REG_DI
GPR. Destination index register. 16 bits.
REG_R8W
x86_64 GPR. Lowermost 16 bits of 64.
REG_R9W
x86_64 GPR. Lowermost 16 bits of 64.
REG_R10W
x86_64 GPR. Lowermost 16 bits of 64.
REG_R11W
x86_64 GPR. Lowermost 16 bits of 64.
REG_R12W
x86_64 GPR. Lowermost 16 bits of 64.
REG_R13W
x86_64 GPR. Lowermost 16 bits of 64.
REG_R14W
x86_64 GPR. Lowermost 16 bits of 64.
REG_R15W
x86_64 GPR. Lowermost 16 bits of 64.
REG_EAX
GPR. Accumulator register. 32 bits.
REG_ECX
GPR. Counter register. 32 bits.
REG_EDX
GPR. Data register. 32 bits.
REG_EBX
GPR. Base register. 32 bits.
REG_ESP
GPR. Stack pointer register. 32 bits.
REG_EBP
GPR. Stack base pointer register. 32 bits.
REG_ESI
GPR. Source index register. 32 bits.
REG_EDI
GPR. Destination index register. 32 bits.
REG_R8D
x86_64 GPR. Lowermost 32 bits of 64.
REG_R9D
x86_64 GPR. Lowermost 32 bits of 64.
REG_R10D
x86_64 GPR. Lowermost 32 bits of 64.
REG_R11D
x86_64 GPR. Lowermost 32 bits of 64.
REG_R12D
x86_64 GPR. Lowermost 32 bits of 64.
REG_R13D
x86_64 GPR. Lowermost 32 bits of 64.
REG_R14D
x86_64 GPR. Lowermost 32 bits of 64.
REG_R15D
x86_64 GPR. Lowermost 32 bits of 64.
REG_RAX
GPR. Accumulator register. 64 bits.
REG_RCX
GPR. Counter register. 64 bits.
REG_RDX
GPR. Data register. 64 bits.
REG_RBX
GPR. Base register. 64 bits.
REG_RSP
GPR. Stack pointer register. 64 bits.
REG_RBP
GPR. Stack base pointer register. 64 bits.
REG_RSI
GPR. Source index register. 64 bits.
REG_RDI
GPR. Destination index register. 64 bits.
REG_R8
x86_64 GPR. 64 bits.
REG_R9
x86_64 GPR. 64 bits.
REG_R10
x86_64 GPR. 64 bits.
REG_R11
x86_64 GPR. 64 bits.
REG_R12
x86_64 GPR. 64 bits.
REG_R13
x86_64 GPR. 64 bits.
REG_R14
x86_64 GPR. 64 bits.
REG_R15
x86_64 GPR. 64 bits.
REG_ST0
FPU register.
REG_ST1
FPU register.
REG_ST2
FPU register.
REG_ST3
FPU register.
REG_ST4
FPU register.
REG_ST5
FPU register.
REG_ST6
FPU register.
REG_ST7
FPU register.
REG_MM0
MMX register.
REG_MM1
MMX register.
REG_MM2
MMX register.
REG_MM3
MMX register.
REG_MM4
MMX register.
REG_MM5
MMX register.
REG_MM6
MMX register.
REG_MM7
MMX register.
REG_XMM0
SSE register. 128 bits.
REG_XMM1
SSE register. 128 bits.
REG_XMM2
SSE register. 128 bits.
REG_XMM3
SSE register. 128 bits.
REG_XMM4
SSE register. 128 bits.
REG_XMM5
SSE register. 128 bits.
REG_XMM6
SSE register. 128 bits.
REG_XMM7
SSE register. 128 bits.
REG_XMM8
SSE register. 128 bits.
REG_XMM9
SSE register. 128 bits.
REG_XMM10
SSE register. 128 bits.
REG_XMM11
SSE register. 128 bits.
REG_XMM12
SSE register. 128 bits.
REG_XMM13
SSE register. 128 bits.
REG_XMM14
SSE register. 128 bits.
REG_XMM15
SSE register. 128 bits.
REG_CR0
Control register.
REG_CR1
Control register.
REG_CR2
Control register.
REG_CR3
Control register.
REG_CR4
Control register.
REG_CR5
Control register.
REG_CR6
Control register.
REG_CR7
Control register.
REG_CR8
Control register.
REG_CR9
Control register.
REG_CR10
Control register.
REG_CR11
Control register.
REG_CR12
Control register.
REG_CR13
Control register.
REG_CR14
Control register.
REG_CR15
Control register.
REG_DR0
Debug register.
REG_DR1
Debug register.
REG_DR2
Debug register.
REG_DR3
Debug register.
REG_DR4
Debug register.
REG_DR5
Debug register.
REG_DR6
Debug register.
REG_DR7
Debug register.
REG_DR8
Debug register.
REG_DR9
Debug register.
REG_DR10
Debug register.
REG_DR11
Debug register.
REG_DR12
Debug register.
REG_DR13
Debug register.
REG_DR14
Debug register.
REG_DR15
Debug register.
REG_TR0
Task register.
REG_TR1
Task register.
REG_TR2
Task register.
REG_TR3
Task register.
REG_TR4
Task register.
REG_TR5
Task register.
REG_TR6
Task register.
REG_TR7
Task register.
REG_TR8
Task register.
REG_TR9
Task register.
REG_TR10
Task register.
REG_TR11
Task register.
REG_TR12
Task register.
REG_TR13
Task register.
REG_TR14
Task register.
REG_TR15
Task register.
REG_ES
Segment register. Pointer to extra data.
REG_CS
Segment register. Pointer to the code.
REG_SS
Segment register. Pointer to the stack.
REG_DS
Segment register. Pointer to the data.
REG_FS
Segment register. Pointer to extra data. Used as a thread register on some platforms.
REG_GS
Segment register. Pointer to extra data. Used as a thread register on some platforms.
REG_RIP
Instruction pointer. 64 bits.
Implementations
sourceimpl OperandType
impl OperandType
Trait Implementations
sourceimpl Clone for OperandType
impl Clone for OperandType
sourcefn clone(&self) -> OperandType
fn clone(&self) -> OperandType
1.0.0 · sourcefn clone_from(&mut self, source: &Self)
fn clone_from(&mut self, source: &Self)
source
. Read moresourceimpl Debug for OperandType
impl Debug for OperandType
sourceimpl Default for OperandType
impl Default for OperandType
sourceimpl PartialEq<OperandType> for OperandType
impl PartialEq<OperandType> for OperandType
sourcefn eq(&self, other: &OperandType) -> bool
fn eq(&self, other: &OperandType) -> bool
sourceimpl PartialOrd<OperandType> for OperandType
impl PartialOrd<OperandType> for OperandType
sourcefn partial_cmp(&self, other: &OperandType) -> Option<Ordering>
fn partial_cmp(&self, other: &OperandType) -> Option<Ordering>
1.0.0 · sourcefn le(&self, other: &Rhs) -> bool
fn le(&self, other: &Rhs) -> bool
self
and other
) and is used by the <=
operator. Read more