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Module timer

Module timer 

Source
Expand description

Timer module with 3 independent 32-bit timers (v150)

Modules§

abnor_imsk
Abnormal interrupt mask
abnor_intr_raw
Abnormal interrupt raw status
abnor_intr_stat
Abnormal interrupt status
eoi_ren
End-of-interrupt register
intr_stat
Interrupt status (masked)
raw_intr_stat
Raw interrupt status
timer_control
Timer %s [dim=3] control register
timer_current_value
Timer %s [dim=3] current value
timer_eoi
Timer %s [dim=3] end-of-interrupt
timer_load_count
Timer %s [dim=3] load count
timer_raw_intr
Timer %s [dim=3] raw interrupt status

Structs§

RegisterBlock
Register block

Type Aliases§

AbnorImsk
ABNOR_IMSK (rw) register accessor: Abnormal interrupt mask
AbnorIntrRaw
ABNOR_INTR_RAW (rw) register accessor: Abnormal interrupt raw status
AbnorIntrStat
ABNOR_INTR_STAT (rw) register accessor: Abnormal interrupt status
EoiRen
EOI_REN (rw) register accessor: End-of-interrupt register
IntrStat
INTR_STAT (rw) register accessor: Interrupt status (masked)
RawIntrStat
RAW_INTR_STAT (rw) register accessor: Raw interrupt status
TimerControl
TIMER_CONTROL (rw) register accessor: Timer %s [dim=3] control register
TimerCurrentValue
TIMER_CURRENT_VALUE (rw) register accessor: Timer %s [dim=3] current value
TimerEoi
TIMER_EOI (rw) register accessor: Timer %s [dim=3] end-of-interrupt
TimerLoadCount
TIMER_LOAD_COUNT (rw) register accessor: Timer %s [dim=3] load count
TimerRawIntr
TIMER_RAW_INTR (rw) register accessor: Timer %s [dim=3] raw interrupt status