bl808_pac/uart/
bus_state.rs

1#[doc = "Register `bus_state` reader"]
2pub struct R(crate::R<BUS_STATE_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<BUS_STATE_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<BUS_STATE_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<BUS_STATE_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Field `transmit_busy` reader - Indicates that UART transmit bus is busy"]
17pub use RECEIVE_BUSY_R as TRANSMIT_BUSY_R;
18#[doc = "Field `receive_busy` reader - Indicates that UART receive bus is busy"]
19pub type RECEIVE_BUSY_R = crate::BitReader<BUS_BUSY_A>;
20#[doc = "Indicates that UART receive bus is busy\n\nValue on reset: 0"]
21#[derive(Clone, Copy, Debug, PartialEq, Eq)]
22pub enum BUS_BUSY_A {
23    #[doc = "1: Bus is busy"]
24    BUSY = 1,
25    #[doc = "0: Bus is not busy"]
26    IDLE = 0,
27}
28impl From<BUS_BUSY_A> for bool {
29    #[inline(always)]
30    fn from(variant: BUS_BUSY_A) -> Self {
31        variant as u8 != 0
32    }
33}
34impl RECEIVE_BUSY_R {
35    #[doc = "Get enumerated values variant"]
36    #[inline(always)]
37    pub fn variant(&self) -> BUS_BUSY_A {
38        match self.bits {
39            true => BUS_BUSY_A::BUSY,
40            false => BUS_BUSY_A::IDLE,
41        }
42    }
43    #[doc = "Checks if the value of the field is `BUSY`"]
44    #[inline(always)]
45    pub fn is_busy(&self) -> bool {
46        *self == BUS_BUSY_A::BUSY
47    }
48    #[doc = "Checks if the value of the field is `IDLE`"]
49    #[inline(always)]
50    pub fn is_idle(&self) -> bool {
51        *self == BUS_BUSY_A::IDLE
52    }
53}
54impl R {
55    #[doc = "Bit 0 - Indicates that UART transmit bus is busy"]
56    #[inline(always)]
57    pub fn transmit_busy(&self) -> TRANSMIT_BUSY_R {
58        TRANSMIT_BUSY_R::new((self.bits & 1) != 0)
59    }
60    #[doc = "Bit 1 - Indicates that UART receive bus is busy"]
61    #[inline(always)]
62    pub fn receive_busy(&self) -> RECEIVE_BUSY_R {
63        RECEIVE_BUSY_R::new(((self.bits >> 1) & 1) != 0)
64    }
65}
66#[doc = "Bus state register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [bus_state](index.html) module"]
67pub struct BUS_STATE_SPEC;
68impl crate::RegisterSpec for BUS_STATE_SPEC {
69    type Ux = u32;
70}
71#[doc = "`read()` method returns [bus_state::R](R) reader structure"]
72impl crate::Readable for BUS_STATE_SPEC {
73    type Reader = R;
74}
75#[doc = "`reset()` method sets bus_state to value 0"]
76impl crate::Resettable for BUS_STATE_SPEC {
77    #[inline(always)]
78    fn reset_value() -> Self::Ux {
79        0
80    }
81}
bl808_pac/uart/bus_state.rs

bl808_pac/uart/
bus_state.rs
