bl808_pac/i2s/
base_clock.rs

1#[doc = "Register `base_clock` reader"]
2pub struct R(crate::R<BASE_CLOCK_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<BASE_CLOCK_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<BASE_CLOCK_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<BASE_CLOCK_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `base_clock` writer"]
17pub struct W(crate::W<BASE_CLOCK_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<BASE_CLOCK_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<BASE_CLOCK_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<BASE_CLOCK_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `divide_low` reader - Lower half of base clock dividing factor"]
38pub type DIVIDE_LOW_R = crate::FieldReader<u16, u16>;
39#[doc = "Field `divide_low` writer - Lower half of base clock dividing factor"]
40pub type DIVIDE_LOW_W<'a, const O: u8> =
41    crate::FieldWriter<'a, u32, BASE_CLOCK_SPEC, u16, u16, 12, O>;
42#[doc = "Field `divide_high` reader - Higher half of base clock dividing factor"]
43pub type DIVIDE_HIGH_R = crate::FieldReader<u16, u16>;
44#[doc = "Field `divide_high` writer - Higher half of base clock dividing factor"]
45pub type DIVIDE_HIGH_W<'a, const O: u8> =
46    crate::FieldWriter<'a, u32, BASE_CLOCK_SPEC, u16, u16, 12, O>;
47impl R {
48    #[doc = "Bits 0:11 - Lower half of base clock dividing factor"]
49    #[inline(always)]
50    pub fn divide_low(&self) -> DIVIDE_LOW_R {
51        DIVIDE_LOW_R::new((self.bits & 0x0fff) as u16)
52    }
53    #[doc = "Bits 16:27 - Higher half of base clock dividing factor"]
54    #[inline(always)]
55    pub fn divide_high(&self) -> DIVIDE_HIGH_R {
56        DIVIDE_HIGH_R::new(((self.bits >> 16) & 0x0fff) as u16)
57    }
58}
59impl W {
60    #[doc = "Bits 0:11 - Lower half of base clock dividing factor"]
61    #[inline(always)]
62    pub fn divide_low(&mut self) -> DIVIDE_LOW_W<0> {
63        DIVIDE_LOW_W::new(self)
64    }
65    #[doc = "Bits 16:27 - Higher half of base clock dividing factor"]
66    #[inline(always)]
67    pub fn divide_high(&mut self) -> DIVIDE_HIGH_W<16> {
68        DIVIDE_HIGH_W::new(self)
69    }
70    #[doc = "Writes raw bits to the register."]
71    #[inline(always)]
72    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
73        self.0.bits(bits);
74        self
75    }
76}
77#[doc = "Base clock divider\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [base_clock](index.html) module"]
78pub struct BASE_CLOCK_SPEC;
79impl crate::RegisterSpec for BASE_CLOCK_SPEC {
80    type Ux = u32;
81}
82#[doc = "`read()` method returns [base_clock::R](R) reader structure"]
83impl crate::Readable for BASE_CLOCK_SPEC {
84    type Reader = R;
85}
86#[doc = "`write(|w| ..)` method takes [base_clock::W](W) writer structure"]
87impl crate::Writable for BASE_CLOCK_SPEC {
88    type Writer = W;
89}
90#[doc = "`reset()` method sets base_clock to value 0x0001_0001"]
91impl crate::Resettable for BASE_CLOCK_SPEC {
92    #[inline(always)]
93    fn reset_value() -> Self::Ux {
94        0x0001_0001
95    }
96}
bl808_pac/i2s/base_clock.rs

bl808_pac/i2s/
base_clock.rs
