1#[doc = "Register `gpio_config[%s]` reader"]
2pub struct R(crate::R<GPIO_CONFIG_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<GPIO_CONFIG_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<GPIO_CONFIG_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<GPIO_CONFIG_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `gpio_config[%s]` writer"]
17pub struct W(crate::W<GPIO_CONFIG_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<GPIO_CONFIG_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<GPIO_CONFIG_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<GPIO_CONFIG_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Field `input_function` reader - Enable input signal"]
38pub type INPUT_FUNCTION_R = crate::BitReader<bool>;
39#[doc = "Field `input_function` writer - Enable input signal"]
40pub type INPUT_FUNCTION_W<'a, const O: u8> = crate::BitWriter<'a, u32, GPIO_CONFIG_SPEC, bool, O>;
41#[doc = "Field `schmitt` reader - Enable schmitt trigger"]
42pub type SCHMITT_R = crate::BitReader<bool>;
43#[doc = "Field `schmitt` writer - Enable schmitt trigger"]
44pub type SCHMITT_W<'a, const O: u8> = crate::BitWriter<'a, u32, GPIO_CONFIG_SPEC, bool, O>;
45#[doc = "Field `drive` reader - Drive strength"]
46pub type DRIVE_R = crate::FieldReader<u8, u8>;
47#[doc = "Field `drive` writer - Drive strength"]
48pub type DRIVE_W<'a, const O: u8> = crate::FieldWriter<'a, u32, GPIO_CONFIG_SPEC, u8, u8, 2, O>;
49#[doc = "Field `pull_up` reader - Enable internal pull-up"]
50pub type PULL_UP_R = crate::BitReader<bool>;
51#[doc = "Field `pull_up` writer - Enable internal pull-up"]
52pub type PULL_UP_W<'a, const O: u8> = crate::BitWriter<'a, u32, GPIO_CONFIG_SPEC, bool, O>;
53#[doc = "Field `pull_down` reader - Enable internal pull-down"]
54pub type PULL_DOWN_R = crate::BitReader<bool>;
55#[doc = "Field `pull_down` writer - Enable internal pull-down"]
56pub type PULL_DOWN_W<'a, const O: u8> = crate::BitWriter<'a, u32, GPIO_CONFIG_SPEC, bool, O>;
57#[doc = "Field `output_function` reader - Enable output signal"]
58pub type OUTPUT_FUNCTION_R = crate::BitReader<bool>;
59#[doc = "Field `output_function` writer - Enable output signal"]
60pub type OUTPUT_FUNCTION_W<'a, const O: u8> = crate::BitWriter<'a, u32, GPIO_CONFIG_SPEC, bool, O>;
61#[doc = "Field `alternate` reader - Pin alternate function switch"]
62pub type ALTERNATE_R = crate::FieldReader<u8, ALTERNATE_A>;
63#[doc = "Pin alternate function switch\n\nValue on reset: 0"]
64#[derive(Clone, Copy, Debug, PartialEq, Eq)]
65#[repr(u8)]
66pub enum ALTERNATE_A {
67 #[doc = "0: Secure Digital host"]
68 SDH = 0,
69 #[doc = "1: Serial Peripheral Interface 0"]
70 SPI0 = 1,
71 #[doc = "2: Flash control"]
72 FLASH = 2,
73 #[doc = "3: Inter-IC Sound"]
74 I2S = 3,
75 #[doc = "4: Pulse Density Modulation"]
76 PDM = 4,
77 #[doc = "5: Inter-Integrated Circuit bus 0"]
78 I2C0 = 5,
79 #[doc = "6: Inter-Integrated Circuit bus 1"]
80 I2C1 = 6,
81 #[doc = "7: Universal Asynchronous Receiver/Transmitter"]
82 UART = 7,
83 #[doc = "8: Ethernet Media Access Control"]
84 EMAC = 8,
85 #[doc = "9: ??"]
86 CAM = 9,
87 #[doc = "10: ??"]
88 ANALOG = 10,
89 #[doc = "11: Generic Purpose Input/Output"]
90 GPIO = 11,
91 #[doc = "16: Pulse-Width Modulation module 0"]
92 PWM0 = 16,
93 #[doc = "17: Pulse-Width Modulation module 1"]
94 PWM1 = 17,
95 #[doc = "18: Serial Peripheral Interface 1"]
96 SPI1 = 18,
97 #[doc = "19: Inter-Integrated Circuit bus 2"]
98 I2C2 = 19,
99 #[doc = "20: Inter-Integrated Circuit bus 3"]
100 I2C3 = 20,
101 #[doc = "21: Multimedia subsystem Universal Asynchronous Receiver/Transmitter"]
102 MM_UART = 21,
103 #[doc = "22: ??"]
104 DBI_B = 22,
105 #[doc = "23: ??"]
106 DBI_C = 23,
107 #[doc = "24: ??"]
108 DPI = 24,
109 #[doc = "25: Low power core JTAG interface"]
110 JTAG_LP = 25,
111 #[doc = "26: M0 core JTAG interface"]
112 JTAG_M0 = 26,
113 #[doc = "27: D0 core JTAG interface"]
114 JTAG_D0 = 27,
115 #[doc = "31: Clock output"]
116 CLOCK_OUT = 31,
117}
118impl From<ALTERNATE_A> for u8 {
119 #[inline(always)]
120 fn from(variant: ALTERNATE_A) -> Self {
121 variant as _
122 }
123}
124impl ALTERNATE_R {
125 #[doc = "Get enumerated values variant"]
126 #[inline(always)]
127 pub fn variant(&self) -> Option<ALTERNATE_A> {
128 match self.bits {
129 0 => Some(ALTERNATE_A::SDH),
130 1 => Some(ALTERNATE_A::SPI0),
131 2 => Some(ALTERNATE_A::FLASH),
132 3 => Some(ALTERNATE_A::I2S),
133 4 => Some(ALTERNATE_A::PDM),
134 5 => Some(ALTERNATE_A::I2C0),
135 6 => Some(ALTERNATE_A::I2C1),
136 7 => Some(ALTERNATE_A::UART),
137 8 => Some(ALTERNATE_A::EMAC),
138 9 => Some(ALTERNATE_A::CAM),
139 10 => Some(ALTERNATE_A::ANALOG),
140 11 => Some(ALTERNATE_A::GPIO),
141 16 => Some(ALTERNATE_A::PWM0),
142 17 => Some(ALTERNATE_A::PWM1),
143 18 => Some(ALTERNATE_A::SPI1),
144 19 => Some(ALTERNATE_A::I2C2),
145 20 => Some(ALTERNATE_A::I2C3),
146 21 => Some(ALTERNATE_A::MM_UART),
147 22 => Some(ALTERNATE_A::DBI_B),
148 23 => Some(ALTERNATE_A::DBI_C),
149 24 => Some(ALTERNATE_A::DPI),
150 25 => Some(ALTERNATE_A::JTAG_LP),
151 26 => Some(ALTERNATE_A::JTAG_M0),
152 27 => Some(ALTERNATE_A::JTAG_D0),
153 31 => Some(ALTERNATE_A::CLOCK_OUT),
154 _ => None,
155 }
156 }
157 #[doc = "Checks if the value of the field is `SDH`"]
158 #[inline(always)]
159 pub fn is_sdh(&self) -> bool {
160 *self == ALTERNATE_A::SDH
161 }
162 #[doc = "Checks if the value of the field is `SPI0`"]
163 #[inline(always)]
164 pub fn is_spi0(&self) -> bool {
165 *self == ALTERNATE_A::SPI0
166 }
167 #[doc = "Checks if the value of the field is `FLASH`"]
168 #[inline(always)]
169 pub fn is_flash(&self) -> bool {
170 *self == ALTERNATE_A::FLASH
171 }
172 #[doc = "Checks if the value of the field is `I2S`"]
173 #[inline(always)]
174 pub fn is_i2s(&self) -> bool {
175 *self == ALTERNATE_A::I2S
176 }
177 #[doc = "Checks if the value of the field is `PDM`"]
178 #[inline(always)]
179 pub fn is_pdm(&self) -> bool {
180 *self == ALTERNATE_A::PDM
181 }
182 #[doc = "Checks if the value of the field is `I2C0`"]
183 #[inline(always)]
184 pub fn is_i2c0(&self) -> bool {
185 *self == ALTERNATE_A::I2C0
186 }
187 #[doc = "Checks if the value of the field is `I2C1`"]
188 #[inline(always)]
189 pub fn is_i2c1(&self) -> bool {
190 *self == ALTERNATE_A::I2C1
191 }
192 #[doc = "Checks if the value of the field is `UART`"]
193 #[inline(always)]
194 pub fn is_uart(&self) -> bool {
195 *self == ALTERNATE_A::UART
196 }
197 #[doc = "Checks if the value of the field is `EMAC`"]
198 #[inline(always)]
199 pub fn is_emac(&self) -> bool {
200 *self == ALTERNATE_A::EMAC
201 }
202 #[doc = "Checks if the value of the field is `CAM`"]
203 #[inline(always)]
204 pub fn is_cam(&self) -> bool {
205 *self == ALTERNATE_A::CAM
206 }
207 #[doc = "Checks if the value of the field is `ANALOG`"]
208 #[inline(always)]
209 pub fn is_analog(&self) -> bool {
210 *self == ALTERNATE_A::ANALOG
211 }
212 #[doc = "Checks if the value of the field is `GPIO`"]
213 #[inline(always)]
214 pub fn is_gpio(&self) -> bool {
215 *self == ALTERNATE_A::GPIO
216 }
217 #[doc = "Checks if the value of the field is `PWM0`"]
218 #[inline(always)]
219 pub fn is_pwm0(&self) -> bool {
220 *self == ALTERNATE_A::PWM0
221 }
222 #[doc = "Checks if the value of the field is `PWM1`"]
223 #[inline(always)]
224 pub fn is_pwm1(&self) -> bool {
225 *self == ALTERNATE_A::PWM1
226 }
227 #[doc = "Checks if the value of the field is `SPI1`"]
228 #[inline(always)]
229 pub fn is_spi1(&self) -> bool {
230 *self == ALTERNATE_A::SPI1
231 }
232 #[doc = "Checks if the value of the field is `I2C2`"]
233 #[inline(always)]
234 pub fn is_i2c2(&self) -> bool {
235 *self == ALTERNATE_A::I2C2
236 }
237 #[doc = "Checks if the value of the field is `I2C3`"]
238 #[inline(always)]
239 pub fn is_i2c3(&self) -> bool {
240 *self == ALTERNATE_A::I2C3
241 }
242 #[doc = "Checks if the value of the field is `MM_UART`"]
243 #[inline(always)]
244 pub fn is_mm_uart(&self) -> bool {
245 *self == ALTERNATE_A::MM_UART
246 }
247 #[doc = "Checks if the value of the field is `DBI_B`"]
248 #[inline(always)]
249 pub fn is_dbi_b(&self) -> bool {
250 *self == ALTERNATE_A::DBI_B
251 }
252 #[doc = "Checks if the value of the field is `DBI_C`"]
253 #[inline(always)]
254 pub fn is_dbi_c(&self) -> bool {
255 *self == ALTERNATE_A::DBI_C
256 }
257 #[doc = "Checks if the value of the field is `DPI`"]
258 #[inline(always)]
259 pub fn is_dpi(&self) -> bool {
260 *self == ALTERNATE_A::DPI
261 }
262 #[doc = "Checks if the value of the field is `JTAG_LP`"]
263 #[inline(always)]
264 pub fn is_jtag_lp(&self) -> bool {
265 *self == ALTERNATE_A::JTAG_LP
266 }
267 #[doc = "Checks if the value of the field is `JTAG_M0`"]
268 #[inline(always)]
269 pub fn is_jtag_m0(&self) -> bool {
270 *self == ALTERNATE_A::JTAG_M0
271 }
272 #[doc = "Checks if the value of the field is `JTAG_D0`"]
273 #[inline(always)]
274 pub fn is_jtag_d0(&self) -> bool {
275 *self == ALTERNATE_A::JTAG_D0
276 }
277 #[doc = "Checks if the value of the field is `CLOCK_OUT`"]
278 #[inline(always)]
279 pub fn is_clock_out(&self) -> bool {
280 *self == ALTERNATE_A::CLOCK_OUT
281 }
282}
283#[doc = "Field `alternate` writer - Pin alternate function switch"]
284pub type ALTERNATE_W<'a, const O: u8> =
285 crate::FieldWriter<'a, u32, GPIO_CONFIG_SPEC, u8, ALTERNATE_A, 5, O>;
286impl<'a, const O: u8> ALTERNATE_W<'a, O> {
287 #[doc = "Secure Digital host"]
288 #[inline(always)]
289 pub fn sdh(self) -> &'a mut W {
290 self.variant(ALTERNATE_A::SDH)
291 }
292 #[doc = "Serial Peripheral Interface 0"]
293 #[inline(always)]
294 pub fn spi0(self) -> &'a mut W {
295 self.variant(ALTERNATE_A::SPI0)
296 }
297 #[doc = "Flash control"]
298 #[inline(always)]
299 pub fn flash(self) -> &'a mut W {
300 self.variant(ALTERNATE_A::FLASH)
301 }
302 #[doc = "Inter-IC Sound"]
303 #[inline(always)]
304 pub fn i2s(self) -> &'a mut W {
305 self.variant(ALTERNATE_A::I2S)
306 }
307 #[doc = "Pulse Density Modulation"]
308 #[inline(always)]
309 pub fn pdm(self) -> &'a mut W {
310 self.variant(ALTERNATE_A::PDM)
311 }
312 #[doc = "Inter-Integrated Circuit bus 0"]
313 #[inline(always)]
314 pub fn i2c0(self) -> &'a mut W {
315 self.variant(ALTERNATE_A::I2C0)
316 }
317 #[doc = "Inter-Integrated Circuit bus 1"]
318 #[inline(always)]
319 pub fn i2c1(self) -> &'a mut W {
320 self.variant(ALTERNATE_A::I2C1)
321 }
322 #[doc = "Universal Asynchronous Receiver/Transmitter"]
323 #[inline(always)]
324 pub fn uart(self) -> &'a mut W {
325 self.variant(ALTERNATE_A::UART)
326 }
327 #[doc = "Ethernet Media Access Control"]
328 #[inline(always)]
329 pub fn emac(self) -> &'a mut W {
330 self.variant(ALTERNATE_A::EMAC)
331 }
332 #[doc = "??"]
333 #[inline(always)]
334 pub fn cam(self) -> &'a mut W {
335 self.variant(ALTERNATE_A::CAM)
336 }
337 #[doc = "??"]
338 #[inline(always)]
339 pub fn analog(self) -> &'a mut W {
340 self.variant(ALTERNATE_A::ANALOG)
341 }
342 #[doc = "Generic Purpose Input/Output"]
343 #[inline(always)]
344 pub fn gpio(self) -> &'a mut W {
345 self.variant(ALTERNATE_A::GPIO)
346 }
347 #[doc = "Pulse-Width Modulation module 0"]
348 #[inline(always)]
349 pub fn pwm0(self) -> &'a mut W {
350 self.variant(ALTERNATE_A::PWM0)
351 }
352 #[doc = "Pulse-Width Modulation module 1"]
353 #[inline(always)]
354 pub fn pwm1(self) -> &'a mut W {
355 self.variant(ALTERNATE_A::PWM1)
356 }
357 #[doc = "Serial Peripheral Interface 1"]
358 #[inline(always)]
359 pub fn spi1(self) -> &'a mut W {
360 self.variant(ALTERNATE_A::SPI1)
361 }
362 #[doc = "Inter-Integrated Circuit bus 2"]
363 #[inline(always)]
364 pub fn i2c2(self) -> &'a mut W {
365 self.variant(ALTERNATE_A::I2C2)
366 }
367 #[doc = "Inter-Integrated Circuit bus 3"]
368 #[inline(always)]
369 pub fn i2c3(self) -> &'a mut W {
370 self.variant(ALTERNATE_A::I2C3)
371 }
372 #[doc = "Multimedia subsystem Universal Asynchronous Receiver/Transmitter"]
373 #[inline(always)]
374 pub fn mm_uart(self) -> &'a mut W {
375 self.variant(ALTERNATE_A::MM_UART)
376 }
377 #[doc = "??"]
378 #[inline(always)]
379 pub fn dbi_b(self) -> &'a mut W {
380 self.variant(ALTERNATE_A::DBI_B)
381 }
382 #[doc = "??"]
383 #[inline(always)]
384 pub fn dbi_c(self) -> &'a mut W {
385 self.variant(ALTERNATE_A::DBI_C)
386 }
387 #[doc = "??"]
388 #[inline(always)]
389 pub fn dpi(self) -> &'a mut W {
390 self.variant(ALTERNATE_A::DPI)
391 }
392 #[doc = "Low power core JTAG interface"]
393 #[inline(always)]
394 pub fn jtag_lp(self) -> &'a mut W {
395 self.variant(ALTERNATE_A::JTAG_LP)
396 }
397 #[doc = "M0 core JTAG interface"]
398 #[inline(always)]
399 pub fn jtag_m0(self) -> &'a mut W {
400 self.variant(ALTERNATE_A::JTAG_M0)
401 }
402 #[doc = "D0 core JTAG interface"]
403 #[inline(always)]
404 pub fn jtag_d0(self) -> &'a mut W {
405 self.variant(ALTERNATE_A::JTAG_D0)
406 }
407 #[doc = "Clock output"]
408 #[inline(always)]
409 pub fn clock_out(self) -> &'a mut W {
410 self.variant(ALTERNATE_A::CLOCK_OUT)
411 }
412}
413#[doc = "Field `interrupt_mode` reader - Select pin interrupt mode"]
414pub type INTERRUPT_MODE_R = crate::FieldReader<u8, u8>;
415#[doc = "Field `interrupt_mode` writer - Select pin interrupt mode"]
416pub type INTERRUPT_MODE_W<'a, const O: u8> =
417 crate::FieldWriter<'a, u32, GPIO_CONFIG_SPEC, u8, u8, 4, O>;
418#[doc = "Field `interrupt_clear` reader - Clear pin interrupt flag"]
419pub type INTERRUPT_CLEAR_R = crate::BitReader<bool>;
420#[doc = "Field `interrupt_clear` writer - Clear pin interrupt flag"]
421pub type INTERRUPT_CLEAR_W<'a, const O: u8> = crate::BitWriter<'a, u32, GPIO_CONFIG_SPEC, bool, O>;
422#[doc = "Field `interrupt_state` reader - Pin interrupt state"]
423pub type INTERRUPT_STATE_R = crate::BitReader<bool>;
424#[doc = "Field `interrupt_state` writer - Pin interrupt state"]
425pub type INTERRUPT_STATE_W<'a, const O: u8> = crate::BitWriter<'a, u32, GPIO_CONFIG_SPEC, bool, O>;
426#[doc = "Field `interrupt_mask` reader - Pin interrupt mask"]
427pub type INTERRUPT_MASK_R = crate::BitReader<bool>;
428#[doc = "Field `interrupt_mask` writer - Pin interrupt mask"]
429pub type INTERRUPT_MASK_W<'a, const O: u8> = crate::BitWriter<'a, u32, GPIO_CONFIG_SPEC, bool, O>;
430#[doc = "Field `output_value` reader - Output value"]
431pub type OUTPUT_VALUE_R = crate::BitReader<bool>;
432#[doc = "Field `output_value` writer - Output value"]
433pub type OUTPUT_VALUE_W<'a, const O: u8> = crate::BitWriter<'a, u32, GPIO_CONFIG_SPEC, bool, O>;
434#[doc = "Field `output_set` reader - Set output value to 1"]
435pub type OUTPUT_SET_R = crate::BitReader<bool>;
436#[doc = "Field `output_set` writer - Set output value to 1"]
437pub type OUTPUT_SET_W<'a, const O: u8> = crate::BitWriter<'a, u32, GPIO_CONFIG_SPEC, bool, O>;
438#[doc = "Field `output_clear` reader - Clear output value to 0"]
439pub type OUTPUT_CLEAR_R = crate::BitReader<bool>;
440#[doc = "Field `output_clear` writer - Clear output value to 0"]
441pub type OUTPUT_CLEAR_W<'a, const O: u8> = crate::BitWriter<'a, u32, GPIO_CONFIG_SPEC, bool, O>;
442#[doc = "Field `input_value` reader - Input value"]
443pub type INPUT_VALUE_R = crate::BitReader<bool>;
444#[doc = "Field `input_value` writer - Input value"]
445pub type INPUT_VALUE_W<'a, const O: u8> = crate::BitWriter<'a, u32, GPIO_CONFIG_SPEC, bool, O>;
446#[doc = "Field `pin_mode` reader - Pin input/output mode switch"]
447pub type PIN_MODE_R = crate::FieldReader<u8, PIN_MODE_A>;
448#[doc = "Pin input/output mode switch\n\nValue on reset: 0"]
449#[derive(Clone, Copy, Debug, PartialEq, Eq)]
450#[repr(u8)]
451pub enum PIN_MODE_A {
452 #[doc = "0: Digital input mode"]
453 INPUT = 0,
454 #[doc = "1: Digital output mode"]
455 OUTPUT = 1,
456 #[doc = "2: Alternate function mode"]
457 ALTERNATE = 2,
458 #[doc = "3: Analog mode"]
459 ANALOG = 3,
460}
461impl From<PIN_MODE_A> for u8 {
462 #[inline(always)]
463 fn from(variant: PIN_MODE_A) -> Self {
464 variant as _
465 }
466}
467impl PIN_MODE_R {
468 #[doc = "Get enumerated values variant"]
469 #[inline(always)]
470 pub fn variant(&self) -> PIN_MODE_A {
471 match self.bits {
472 0 => PIN_MODE_A::INPUT,
473 1 => PIN_MODE_A::OUTPUT,
474 2 => PIN_MODE_A::ALTERNATE,
475 3 => PIN_MODE_A::ANALOG,
476 _ => unreachable!(),
477 }
478 }
479 #[doc = "Checks if the value of the field is `INPUT`"]
480 #[inline(always)]
481 pub fn is_input(&self) -> bool {
482 *self == PIN_MODE_A::INPUT
483 }
484 #[doc = "Checks if the value of the field is `OUTPUT`"]
485 #[inline(always)]
486 pub fn is_output(&self) -> bool {
487 *self == PIN_MODE_A::OUTPUT
488 }
489 #[doc = "Checks if the value of the field is `ALTERNATE`"]
490 #[inline(always)]
491 pub fn is_alternate(&self) -> bool {
492 *self == PIN_MODE_A::ALTERNATE
493 }
494 #[doc = "Checks if the value of the field is `ANALOG`"]
495 #[inline(always)]
496 pub fn is_analog(&self) -> bool {
497 *self == PIN_MODE_A::ANALOG
498 }
499}
500#[doc = "Field `pin_mode` writer - Pin input/output mode switch"]
501pub type PIN_MODE_W<'a, const O: u8> =
502 crate::FieldWriterSafe<'a, u32, GPIO_CONFIG_SPEC, u8, PIN_MODE_A, 2, O>;
503impl<'a, const O: u8> PIN_MODE_W<'a, O> {
504 #[doc = "Digital input mode"]
505 #[inline(always)]
506 pub fn input(self) -> &'a mut W {
507 self.variant(PIN_MODE_A::INPUT)
508 }
509 #[doc = "Digital output mode"]
510 #[inline(always)]
511 pub fn output(self) -> &'a mut W {
512 self.variant(PIN_MODE_A::OUTPUT)
513 }
514 #[doc = "Alternate function mode"]
515 #[inline(always)]
516 pub fn alternate(self) -> &'a mut W {
517 self.variant(PIN_MODE_A::ALTERNATE)
518 }
519 #[doc = "Analog mode"]
520 #[inline(always)]
521 pub fn analog(self) -> &'a mut W {
522 self.variant(PIN_MODE_A::ANALOG)
523 }
524}
525impl R {
526 #[doc = "Bit 0 - Enable input signal"]
527 #[inline(always)]
528 pub fn input_function(&self) -> INPUT_FUNCTION_R {
529 INPUT_FUNCTION_R::new((self.bits & 1) != 0)
530 }
531 #[doc = "Bit 1 - Enable schmitt trigger"]
532 #[inline(always)]
533 pub fn schmitt(&self) -> SCHMITT_R {
534 SCHMITT_R::new(((self.bits >> 1) & 1) != 0)
535 }
536 #[doc = "Bits 2:3 - Drive strength"]
537 #[inline(always)]
538 pub fn drive(&self) -> DRIVE_R {
539 DRIVE_R::new(((self.bits >> 2) & 3) as u8)
540 }
541 #[doc = "Bit 4 - Enable internal pull-up"]
542 #[inline(always)]
543 pub fn pull_up(&self) -> PULL_UP_R {
544 PULL_UP_R::new(((self.bits >> 4) & 1) != 0)
545 }
546 #[doc = "Bit 5 - Enable internal pull-down"]
547 #[inline(always)]
548 pub fn pull_down(&self) -> PULL_DOWN_R {
549 PULL_DOWN_R::new(((self.bits >> 5) & 1) != 0)
550 }
551 #[doc = "Bit 6 - Enable output signal"]
552 #[inline(always)]
553 pub fn output_function(&self) -> OUTPUT_FUNCTION_R {
554 OUTPUT_FUNCTION_R::new(((self.bits >> 6) & 1) != 0)
555 }
556 #[doc = "Bits 8:12 - Pin alternate function switch"]
557 #[inline(always)]
558 pub fn alternate(&self) -> ALTERNATE_R {
559 ALTERNATE_R::new(((self.bits >> 8) & 0x1f) as u8)
560 }
561 #[doc = "Bits 16:19 - Select pin interrupt mode"]
562 #[inline(always)]
563 pub fn interrupt_mode(&self) -> INTERRUPT_MODE_R {
564 INTERRUPT_MODE_R::new(((self.bits >> 16) & 0x0f) as u8)
565 }
566 #[doc = "Bit 20 - Clear pin interrupt flag"]
567 #[inline(always)]
568 pub fn interrupt_clear(&self) -> INTERRUPT_CLEAR_R {
569 INTERRUPT_CLEAR_R::new(((self.bits >> 20) & 1) != 0)
570 }
571 #[doc = "Bit 21 - Pin interrupt state"]
572 #[inline(always)]
573 pub fn interrupt_state(&self) -> INTERRUPT_STATE_R {
574 INTERRUPT_STATE_R::new(((self.bits >> 21) & 1) != 0)
575 }
576 #[doc = "Bit 22 - Pin interrupt mask"]
577 #[inline(always)]
578 pub fn interrupt_mask(&self) -> INTERRUPT_MASK_R {
579 INTERRUPT_MASK_R::new(((self.bits >> 22) & 1) != 0)
580 }
581 #[doc = "Bit 24 - Output value"]
582 #[inline(always)]
583 pub fn output_value(&self) -> OUTPUT_VALUE_R {
584 OUTPUT_VALUE_R::new(((self.bits >> 24) & 1) != 0)
585 }
586 #[doc = "Bit 25 - Set output value to 1"]
587 #[inline(always)]
588 pub fn output_set(&self) -> OUTPUT_SET_R {
589 OUTPUT_SET_R::new(((self.bits >> 25) & 1) != 0)
590 }
591 #[doc = "Bit 26 - Clear output value to 0"]
592 #[inline(always)]
593 pub fn output_clear(&self) -> OUTPUT_CLEAR_R {
594 OUTPUT_CLEAR_R::new(((self.bits >> 26) & 1) != 0)
595 }
596 #[doc = "Bit 28 - Input value"]
597 #[inline(always)]
598 pub fn input_value(&self) -> INPUT_VALUE_R {
599 INPUT_VALUE_R::new(((self.bits >> 28) & 1) != 0)
600 }
601 #[doc = "Bits 30:31 - Pin input/output mode switch"]
602 #[inline(always)]
603 pub fn pin_mode(&self) -> PIN_MODE_R {
604 PIN_MODE_R::new(((self.bits >> 30) & 3) as u8)
605 }
606}
607impl W {
608 #[doc = "Bit 0 - Enable input signal"]
609 #[inline(always)]
610 pub fn input_function(&mut self) -> INPUT_FUNCTION_W<0> {
611 INPUT_FUNCTION_W::new(self)
612 }
613 #[doc = "Bit 1 - Enable schmitt trigger"]
614 #[inline(always)]
615 pub fn schmitt(&mut self) -> SCHMITT_W<1> {
616 SCHMITT_W::new(self)
617 }
618 #[doc = "Bits 2:3 - Drive strength"]
619 #[inline(always)]
620 pub fn drive(&mut self) -> DRIVE_W<2> {
621 DRIVE_W::new(self)
622 }
623 #[doc = "Bit 4 - Enable internal pull-up"]
624 #[inline(always)]
625 pub fn pull_up(&mut self) -> PULL_UP_W<4> {
626 PULL_UP_W::new(self)
627 }
628 #[doc = "Bit 5 - Enable internal pull-down"]
629 #[inline(always)]
630 pub fn pull_down(&mut self) -> PULL_DOWN_W<5> {
631 PULL_DOWN_W::new(self)
632 }
633 #[doc = "Bit 6 - Enable output signal"]
634 #[inline(always)]
635 pub fn output_function(&mut self) -> OUTPUT_FUNCTION_W<6> {
636 OUTPUT_FUNCTION_W::new(self)
637 }
638 #[doc = "Bits 8:12 - Pin alternate function switch"]
639 #[inline(always)]
640 pub fn alternate(&mut self) -> ALTERNATE_W<8> {
641 ALTERNATE_W::new(self)
642 }
643 #[doc = "Bits 16:19 - Select pin interrupt mode"]
644 #[inline(always)]
645 pub fn interrupt_mode(&mut self) -> INTERRUPT_MODE_W<16> {
646 INTERRUPT_MODE_W::new(self)
647 }
648 #[doc = "Bit 20 - Clear pin interrupt flag"]
649 #[inline(always)]
650 pub fn interrupt_clear(&mut self) -> INTERRUPT_CLEAR_W<20> {
651 INTERRUPT_CLEAR_W::new(self)
652 }
653 #[doc = "Bit 21 - Pin interrupt state"]
654 #[inline(always)]
655 pub fn interrupt_state(&mut self) -> INTERRUPT_STATE_W<21> {
656 INTERRUPT_STATE_W::new(self)
657 }
658 #[doc = "Bit 22 - Pin interrupt mask"]
659 #[inline(always)]
660 pub fn interrupt_mask(&mut self) -> INTERRUPT_MASK_W<22> {
661 INTERRUPT_MASK_W::new(self)
662 }
663 #[doc = "Bit 24 - Output value"]
664 #[inline(always)]
665 pub fn output_value(&mut self) -> OUTPUT_VALUE_W<24> {
666 OUTPUT_VALUE_W::new(self)
667 }
668 #[doc = "Bit 25 - Set output value to 1"]
669 #[inline(always)]
670 pub fn output_set(&mut self) -> OUTPUT_SET_W<25> {
671 OUTPUT_SET_W::new(self)
672 }
673 #[doc = "Bit 26 - Clear output value to 0"]
674 #[inline(always)]
675 pub fn output_clear(&mut self) -> OUTPUT_CLEAR_W<26> {
676 OUTPUT_CLEAR_W::new(self)
677 }
678 #[doc = "Bit 28 - Input value"]
679 #[inline(always)]
680 pub fn input_value(&mut self) -> INPUT_VALUE_W<28> {
681 INPUT_VALUE_W::new(self)
682 }
683 #[doc = "Bits 30:31 - Pin input/output mode switch"]
684 #[inline(always)]
685 pub fn pin_mode(&mut self) -> PIN_MODE_W<30> {
686 PIN_MODE_W::new(self)
687 }
688 #[doc = "Writes raw bits to the register."]
689 #[inline(always)]
690 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
691 self.0.bits(bits);
692 self
693 }
694}
695#[doc = "Generic Purpose Input/Output config\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [gpio_config](index.html) module"]
696pub struct GPIO_CONFIG_SPEC;
697impl crate::RegisterSpec for GPIO_CONFIG_SPEC {
698 type Ux = u32;
699}
700#[doc = "`read()` method returns [gpio_config::R](R) reader structure"]
701impl crate::Readable for GPIO_CONFIG_SPEC {
702 type Reader = R;
703}
704#[doc = "`write(|w| ..)` method takes [gpio_config::W](W) writer structure"]
705impl crate::Writable for GPIO_CONFIG_SPEC {
706 type Writer = W;
707}
708#[doc = "`reset()` method sets gpio_config[%s]
709to value 0"]
710impl crate::Resettable for GPIO_CONFIG_SPEC {
711 #[inline(always)]
712 fn reset_value() -> Self::Ux {
713 0
714 }
715}