bl702_pac/usb/
xcvr_if_config.rs1#[doc = "Register `xcvr_if_config` reader"]
2pub struct R(crate::R<XCVR_IF_CONFIG_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<XCVR_IF_CONFIG_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<XCVR_IF_CONFIG_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<XCVR_IF_CONFIG_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `xcvr_if_config` writer"]
17pub struct W(crate::W<XCVR_IF_CONFIG_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<XCVR_IF_CONFIG_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<XCVR_IF_CONFIG_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<XCVR_IF_CONFIG_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Field `cr_xcvr_force_tx_en` reader - "]
38pub type CR_XCVR_FORCE_TX_EN_R = crate::BitReader<bool>;
39#[doc = "Field `cr_xcvr_force_tx_en` writer - "]
40pub type CR_XCVR_FORCE_TX_EN_W<'a, const O: u8> =
41 crate::BitWriter<'a, u32, XCVR_IF_CONFIG_SPEC, bool, O>;
42#[doc = "Field `cr_xcvr_force_tx_oe` reader - "]
43pub type CR_XCVR_FORCE_TX_OE_R = crate::BitReader<bool>;
44#[doc = "Field `cr_xcvr_force_tx_oe` writer - "]
45pub type CR_XCVR_FORCE_TX_OE_W<'a, const O: u8> =
46 crate::BitWriter<'a, u32, XCVR_IF_CONFIG_SPEC, bool, O>;
47#[doc = "Field `cr_xcvr_force_tx_dp` reader - "]
48pub type CR_XCVR_FORCE_TX_DP_R = crate::BitReader<bool>;
49#[doc = "Field `cr_xcvr_force_tx_dp` writer - "]
50pub type CR_XCVR_FORCE_TX_DP_W<'a, const O: u8> =
51 crate::BitWriter<'a, u32, XCVR_IF_CONFIG_SPEC, bool, O>;
52#[doc = "Field `cr_xcvr_force_tx_dn` reader - "]
53pub type CR_XCVR_FORCE_TX_DN_R = crate::BitReader<bool>;
54#[doc = "Field `cr_xcvr_force_tx_dn` writer - "]
55pub type CR_XCVR_FORCE_TX_DN_W<'a, const O: u8> =
56 crate::BitWriter<'a, u32, XCVR_IF_CONFIG_SPEC, bool, O>;
57#[doc = "Field `cr_xcvr_force_rx_en` reader - "]
58pub type CR_XCVR_FORCE_RX_EN_R = crate::BitReader<bool>;
59#[doc = "Field `cr_xcvr_force_rx_en` writer - "]
60pub type CR_XCVR_FORCE_RX_EN_W<'a, const O: u8> =
61 crate::BitWriter<'a, u32, XCVR_IF_CONFIG_SPEC, bool, O>;
62#[doc = "Field `cr_xcvr_force_rx_d` reader - "]
63pub type CR_XCVR_FORCE_RX_D_R = crate::BitReader<bool>;
64#[doc = "Field `cr_xcvr_force_rx_d` writer - "]
65pub type CR_XCVR_FORCE_RX_D_W<'a, const O: u8> =
66 crate::BitWriter<'a, u32, XCVR_IF_CONFIG_SPEC, bool, O>;
67#[doc = "Field `cr_xcvr_force_rx_dp` reader - "]
68pub type CR_XCVR_FORCE_RX_DP_R = crate::BitReader<bool>;
69#[doc = "Field `cr_xcvr_force_rx_dp` writer - "]
70pub type CR_XCVR_FORCE_RX_DP_W<'a, const O: u8> =
71 crate::BitWriter<'a, u32, XCVR_IF_CONFIG_SPEC, bool, O>;
72#[doc = "Field `cr_xcvr_force_rx_dn` reader - "]
73pub type CR_XCVR_FORCE_RX_DN_R = crate::BitReader<bool>;
74#[doc = "Field `cr_xcvr_force_rx_dn` writer - "]
75pub type CR_XCVR_FORCE_RX_DN_W<'a, const O: u8> =
76 crate::BitWriter<'a, u32, XCVR_IF_CONFIG_SPEC, bool, O>;
77#[doc = "Field `cr_xcvr_om_rx_sel` reader - "]
78pub type CR_XCVR_OM_RX_SEL_R = crate::BitReader<bool>;
79#[doc = "Field `cr_xcvr_om_rx_sel` writer - "]
80pub type CR_XCVR_OM_RX_SEL_W<'a, const O: u8> =
81 crate::BitWriter<'a, u32, XCVR_IF_CONFIG_SPEC, bool, O>;
82#[doc = "Field `cr_xcvr_om_rx_d` reader - "]
83pub type CR_XCVR_OM_RX_D_R = crate::BitReader<bool>;
84#[doc = "Field `cr_xcvr_om_rx_d` writer - "]
85pub type CR_XCVR_OM_RX_D_W<'a, const O: u8> =
86 crate::BitWriter<'a, u32, XCVR_IF_CONFIG_SPEC, bool, O>;
87#[doc = "Field `cr_xcvr_om_rx_dp` reader - "]
88pub type CR_XCVR_OM_RX_DP_R = crate::BitReader<bool>;
89#[doc = "Field `cr_xcvr_om_rx_dp` writer - "]
90pub type CR_XCVR_OM_RX_DP_W<'a, const O: u8> =
91 crate::BitWriter<'a, u32, XCVR_IF_CONFIG_SPEC, bool, O>;
92#[doc = "Field `cr_xcvr_om_rx_dn` reader - "]
93pub type CR_XCVR_OM_RX_DN_R = crate::BitReader<bool>;
94#[doc = "Field `cr_xcvr_om_rx_dn` writer - "]
95pub type CR_XCVR_OM_RX_DN_W<'a, const O: u8> =
96 crate::BitWriter<'a, u32, XCVR_IF_CONFIG_SPEC, bool, O>;
97#[doc = "Field `sts_vbus_det` reader - "]
98pub type STS_VBUS_DET_R = crate::BitReader<bool>;
99#[doc = "Field `sts_vbus_det` writer - "]
100pub type STS_VBUS_DET_W<'a, const O: u8> = crate::BitWriter<'a, u32, XCVR_IF_CONFIG_SPEC, bool, O>;
101impl R {
102 #[doc = "Bit 0"]
103 #[inline(always)]
104 pub fn cr_xcvr_force_tx_en(&self) -> CR_XCVR_FORCE_TX_EN_R {
105 CR_XCVR_FORCE_TX_EN_R::new((self.bits & 1) != 0)
106 }
107 #[doc = "Bit 1"]
108 #[inline(always)]
109 pub fn cr_xcvr_force_tx_oe(&self) -> CR_XCVR_FORCE_TX_OE_R {
110 CR_XCVR_FORCE_TX_OE_R::new(((self.bits >> 1) & 1) != 0)
111 }
112 #[doc = "Bit 2"]
113 #[inline(always)]
114 pub fn cr_xcvr_force_tx_dp(&self) -> CR_XCVR_FORCE_TX_DP_R {
115 CR_XCVR_FORCE_TX_DP_R::new(((self.bits >> 2) & 1) != 0)
116 }
117 #[doc = "Bit 3"]
118 #[inline(always)]
119 pub fn cr_xcvr_force_tx_dn(&self) -> CR_XCVR_FORCE_TX_DN_R {
120 CR_XCVR_FORCE_TX_DN_R::new(((self.bits >> 3) & 1) != 0)
121 }
122 #[doc = "Bit 4"]
123 #[inline(always)]
124 pub fn cr_xcvr_force_rx_en(&self) -> CR_XCVR_FORCE_RX_EN_R {
125 CR_XCVR_FORCE_RX_EN_R::new(((self.bits >> 4) & 1) != 0)
126 }
127 #[doc = "Bit 5"]
128 #[inline(always)]
129 pub fn cr_xcvr_force_rx_d(&self) -> CR_XCVR_FORCE_RX_D_R {
130 CR_XCVR_FORCE_RX_D_R::new(((self.bits >> 5) & 1) != 0)
131 }
132 #[doc = "Bit 6"]
133 #[inline(always)]
134 pub fn cr_xcvr_force_rx_dp(&self) -> CR_XCVR_FORCE_RX_DP_R {
135 CR_XCVR_FORCE_RX_DP_R::new(((self.bits >> 6) & 1) != 0)
136 }
137 #[doc = "Bit 7"]
138 #[inline(always)]
139 pub fn cr_xcvr_force_rx_dn(&self) -> CR_XCVR_FORCE_RX_DN_R {
140 CR_XCVR_FORCE_RX_DN_R::new(((self.bits >> 7) & 1) != 0)
141 }
142 #[doc = "Bit 8"]
143 #[inline(always)]
144 pub fn cr_xcvr_om_rx_sel(&self) -> CR_XCVR_OM_RX_SEL_R {
145 CR_XCVR_OM_RX_SEL_R::new(((self.bits >> 8) & 1) != 0)
146 }
147 #[doc = "Bit 9"]
148 #[inline(always)]
149 pub fn cr_xcvr_om_rx_d(&self) -> CR_XCVR_OM_RX_D_R {
150 CR_XCVR_OM_RX_D_R::new(((self.bits >> 9) & 1) != 0)
151 }
152 #[doc = "Bit 10"]
153 #[inline(always)]
154 pub fn cr_xcvr_om_rx_dp(&self) -> CR_XCVR_OM_RX_DP_R {
155 CR_XCVR_OM_RX_DP_R::new(((self.bits >> 10) & 1) != 0)
156 }
157 #[doc = "Bit 11"]
158 #[inline(always)]
159 pub fn cr_xcvr_om_rx_dn(&self) -> CR_XCVR_OM_RX_DN_R {
160 CR_XCVR_OM_RX_DN_R::new(((self.bits >> 11) & 1) != 0)
161 }
162 #[doc = "Bit 31"]
163 #[inline(always)]
164 pub fn sts_vbus_det(&self) -> STS_VBUS_DET_R {
165 STS_VBUS_DET_R::new(((self.bits >> 31) & 1) != 0)
166 }
167}
168impl W {
169 #[doc = "Bit 0"]
170 #[inline(always)]
171 #[must_use]
172 pub fn cr_xcvr_force_tx_en(&mut self) -> CR_XCVR_FORCE_TX_EN_W<0> {
173 CR_XCVR_FORCE_TX_EN_W::new(self)
174 }
175 #[doc = "Bit 1"]
176 #[inline(always)]
177 #[must_use]
178 pub fn cr_xcvr_force_tx_oe(&mut self) -> CR_XCVR_FORCE_TX_OE_W<1> {
179 CR_XCVR_FORCE_TX_OE_W::new(self)
180 }
181 #[doc = "Bit 2"]
182 #[inline(always)]
183 #[must_use]
184 pub fn cr_xcvr_force_tx_dp(&mut self) -> CR_XCVR_FORCE_TX_DP_W<2> {
185 CR_XCVR_FORCE_TX_DP_W::new(self)
186 }
187 #[doc = "Bit 3"]
188 #[inline(always)]
189 #[must_use]
190 pub fn cr_xcvr_force_tx_dn(&mut self) -> CR_XCVR_FORCE_TX_DN_W<3> {
191 CR_XCVR_FORCE_TX_DN_W::new(self)
192 }
193 #[doc = "Bit 4"]
194 #[inline(always)]
195 #[must_use]
196 pub fn cr_xcvr_force_rx_en(&mut self) -> CR_XCVR_FORCE_RX_EN_W<4> {
197 CR_XCVR_FORCE_RX_EN_W::new(self)
198 }
199 #[doc = "Bit 5"]
200 #[inline(always)]
201 #[must_use]
202 pub fn cr_xcvr_force_rx_d(&mut self) -> CR_XCVR_FORCE_RX_D_W<5> {
203 CR_XCVR_FORCE_RX_D_W::new(self)
204 }
205 #[doc = "Bit 6"]
206 #[inline(always)]
207 #[must_use]
208 pub fn cr_xcvr_force_rx_dp(&mut self) -> CR_XCVR_FORCE_RX_DP_W<6> {
209 CR_XCVR_FORCE_RX_DP_W::new(self)
210 }
211 #[doc = "Bit 7"]
212 #[inline(always)]
213 #[must_use]
214 pub fn cr_xcvr_force_rx_dn(&mut self) -> CR_XCVR_FORCE_RX_DN_W<7> {
215 CR_XCVR_FORCE_RX_DN_W::new(self)
216 }
217 #[doc = "Bit 8"]
218 #[inline(always)]
219 #[must_use]
220 pub fn cr_xcvr_om_rx_sel(&mut self) -> CR_XCVR_OM_RX_SEL_W<8> {
221 CR_XCVR_OM_RX_SEL_W::new(self)
222 }
223 #[doc = "Bit 9"]
224 #[inline(always)]
225 #[must_use]
226 pub fn cr_xcvr_om_rx_d(&mut self) -> CR_XCVR_OM_RX_D_W<9> {
227 CR_XCVR_OM_RX_D_W::new(self)
228 }
229 #[doc = "Bit 10"]
230 #[inline(always)]
231 #[must_use]
232 pub fn cr_xcvr_om_rx_dp(&mut self) -> CR_XCVR_OM_RX_DP_W<10> {
233 CR_XCVR_OM_RX_DP_W::new(self)
234 }
235 #[doc = "Bit 11"]
236 #[inline(always)]
237 #[must_use]
238 pub fn cr_xcvr_om_rx_dn(&mut self) -> CR_XCVR_OM_RX_DN_W<11> {
239 CR_XCVR_OM_RX_DN_W::new(self)
240 }
241 #[doc = "Bit 31"]
242 #[inline(always)]
243 #[must_use]
244 pub fn sts_vbus_det(&mut self) -> STS_VBUS_DET_W<31> {
245 STS_VBUS_DET_W::new(self)
246 }
247 #[doc = "Writes raw bits to the register."]
248 #[inline(always)]
249 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
250 self.0.bits(bits);
251 self
252 }
253}
254#[doc = "xcvr_if_config.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [xcvr_if_config](index.html) module"]
255pub struct XCVR_IF_CONFIG_SPEC;
256impl crate::RegisterSpec for XCVR_IF_CONFIG_SPEC {
257 type Ux = u32;
258}
259#[doc = "`read()` method returns [xcvr_if_config::R](R) reader structure"]
260impl crate::Readable for XCVR_IF_CONFIG_SPEC {
261 type Reader = R;
262}
263#[doc = "`write(|w| ..)` method takes [xcvr_if_config::W](W) writer structure"]
264impl crate::Writable for XCVR_IF_CONFIG_SPEC {
265 type Writer = W;
266 const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
267 const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
268}
269#[doc = "`reset()` method sets xcvr_if_config to value 0"]
270impl crate::Resettable for XCVR_IF_CONFIG_SPEC {
271 const RESET_VALUE: Self::Ux = 0;
272}