bl702_pac/usb/
usb_config.rs

1#[doc = "Register `usb_config` reader"]
2pub struct R(crate::R<USB_CONFIG_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<USB_CONFIG_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<USB_CONFIG_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<USB_CONFIG_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `usb_config` writer"]
17pub struct W(crate::W<USB_CONFIG_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<USB_CONFIG_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<USB_CONFIG_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<USB_CONFIG_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `cr_usb_en` reader - "]
38pub type CR_USB_EN_R = crate::BitReader<bool>;
39#[doc = "Field `cr_usb_en` writer - "]
40pub type CR_USB_EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, USB_CONFIG_SPEC, bool, O>;
41#[doc = "Field `cr_usb_rom_dct_en` reader - "]
42pub type CR_USB_ROM_DCT_EN_R = crate::BitReader<bool>;
43#[doc = "Field `cr_usb_rom_dct_en` writer - "]
44pub type CR_USB_ROM_DCT_EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, USB_CONFIG_SPEC, bool, O>;
45#[doc = "Field `cr_usb_ep0_sw_ctrl` reader - "]
46pub type CR_USB_EP0_SW_CTRL_R = crate::BitReader<bool>;
47#[doc = "Field `cr_usb_ep0_sw_ctrl` writer - "]
48pub type CR_USB_EP0_SW_CTRL_W<'a, const O: u8> =
49    crate::BitWriter<'a, u32, USB_CONFIG_SPEC, bool, O>;
50#[doc = "Field `cr_usb_ep0_sw_addr` reader - "]
51pub type CR_USB_EP0_SW_ADDR_R = crate::FieldReader<u8, u8>;
52#[doc = "Field `cr_usb_ep0_sw_addr` writer - "]
53pub type CR_USB_EP0_SW_ADDR_W<'a, const O: u8> =
54    crate::FieldWriter<'a, u32, USB_CONFIG_SPEC, u8, u8, 7, O>;
55#[doc = "Field `cr_usb_ep0_sw_size` reader - "]
56pub type CR_USB_EP0_SW_SIZE_R = crate::FieldReader<u8, u8>;
57#[doc = "Field `cr_usb_ep0_sw_size` writer - "]
58pub type CR_USB_EP0_SW_SIZE_W<'a, const O: u8> =
59    crate::FieldWriter<'a, u32, USB_CONFIG_SPEC, u8, u8, 8, O>;
60#[doc = "Field `cr_usb_ep0_sw_stall` reader - "]
61pub type CR_USB_EP0_SW_STALL_R = crate::BitReader<bool>;
62#[doc = "Field `cr_usb_ep0_sw_stall` writer - "]
63pub type CR_USB_EP0_SW_STALL_W<'a, const O: u8> =
64    crate::BitWriter<'a, u32, USB_CONFIG_SPEC, bool, O>;
65#[doc = "Field `cr_usb_ep0_sw_nack_in` reader - "]
66pub type CR_USB_EP0_SW_NACK_IN_R = crate::BitReader<bool>;
67#[doc = "Field `cr_usb_ep0_sw_nack_in` writer - "]
68pub type CR_USB_EP0_SW_NACK_IN_W<'a, const O: u8> =
69    crate::BitWriter<'a, u32, USB_CONFIG_SPEC, bool, O>;
70#[doc = "Field `cr_usb_ep0_sw_nack_out` reader - "]
71pub type CR_USB_EP0_SW_NACK_OUT_R = crate::BitReader<bool>;
72#[doc = "Field `cr_usb_ep0_sw_nack_out` writer - "]
73pub type CR_USB_EP0_SW_NACK_OUT_W<'a, const O: u8> =
74    crate::BitWriter<'a, u32, USB_CONFIG_SPEC, bool, O>;
75#[doc = "Field `cr_usb_ep0_sw_rdy` reader - "]
76pub type CR_USB_EP0_SW_RDY_R = crate::BitReader<bool>;
77#[doc = "Field `cr_usb_ep0_sw_rdy` writer - "]
78pub type CR_USB_EP0_SW_RDY_W<'a, const O: u8> = crate::BitWriter<'a, u32, USB_CONFIG_SPEC, bool, O>;
79#[doc = "Field `sts_usb_ep0_sw_rdy` reader - "]
80pub type STS_USB_EP0_SW_RDY_R = crate::BitReader<bool>;
81#[doc = "Field `sts_usb_ep0_sw_rdy` writer - "]
82pub type STS_USB_EP0_SW_RDY_W<'a, const O: u8> =
83    crate::BitWriter<'a, u32, USB_CONFIG_SPEC, bool, O>;
84impl R {
85    #[doc = "Bit 0"]
86    #[inline(always)]
87    pub fn cr_usb_en(&self) -> CR_USB_EN_R {
88        CR_USB_EN_R::new((self.bits & 1) != 0)
89    }
90    #[doc = "Bit 4"]
91    #[inline(always)]
92    pub fn cr_usb_rom_dct_en(&self) -> CR_USB_ROM_DCT_EN_R {
93        CR_USB_ROM_DCT_EN_R::new(((self.bits >> 4) & 1) != 0)
94    }
95    #[doc = "Bit 8"]
96    #[inline(always)]
97    pub fn cr_usb_ep0_sw_ctrl(&self) -> CR_USB_EP0_SW_CTRL_R {
98        CR_USB_EP0_SW_CTRL_R::new(((self.bits >> 8) & 1) != 0)
99    }
100    #[doc = "Bits 9:15"]
101    #[inline(always)]
102    pub fn cr_usb_ep0_sw_addr(&self) -> CR_USB_EP0_SW_ADDR_R {
103        CR_USB_EP0_SW_ADDR_R::new(((self.bits >> 9) & 0x7f) as u8)
104    }
105    #[doc = "Bits 16:23"]
106    #[inline(always)]
107    pub fn cr_usb_ep0_sw_size(&self) -> CR_USB_EP0_SW_SIZE_R {
108        CR_USB_EP0_SW_SIZE_R::new(((self.bits >> 16) & 0xff) as u8)
109    }
110    #[doc = "Bit 24"]
111    #[inline(always)]
112    pub fn cr_usb_ep0_sw_stall(&self) -> CR_USB_EP0_SW_STALL_R {
113        CR_USB_EP0_SW_STALL_R::new(((self.bits >> 24) & 1) != 0)
114    }
115    #[doc = "Bit 25"]
116    #[inline(always)]
117    pub fn cr_usb_ep0_sw_nack_in(&self) -> CR_USB_EP0_SW_NACK_IN_R {
118        CR_USB_EP0_SW_NACK_IN_R::new(((self.bits >> 25) & 1) != 0)
119    }
120    #[doc = "Bit 26"]
121    #[inline(always)]
122    pub fn cr_usb_ep0_sw_nack_out(&self) -> CR_USB_EP0_SW_NACK_OUT_R {
123        CR_USB_EP0_SW_NACK_OUT_R::new(((self.bits >> 26) & 1) != 0)
124    }
125    #[doc = "Bit 27"]
126    #[inline(always)]
127    pub fn cr_usb_ep0_sw_rdy(&self) -> CR_USB_EP0_SW_RDY_R {
128        CR_USB_EP0_SW_RDY_R::new(((self.bits >> 27) & 1) != 0)
129    }
130    #[doc = "Bit 28"]
131    #[inline(always)]
132    pub fn sts_usb_ep0_sw_rdy(&self) -> STS_USB_EP0_SW_RDY_R {
133        STS_USB_EP0_SW_RDY_R::new(((self.bits >> 28) & 1) != 0)
134    }
135}
136impl W {
137    #[doc = "Bit 0"]
138    #[inline(always)]
139    #[must_use]
140    pub fn cr_usb_en(&mut self) -> CR_USB_EN_W<0> {
141        CR_USB_EN_W::new(self)
142    }
143    #[doc = "Bit 4"]
144    #[inline(always)]
145    #[must_use]
146    pub fn cr_usb_rom_dct_en(&mut self) -> CR_USB_ROM_DCT_EN_W<4> {
147        CR_USB_ROM_DCT_EN_W::new(self)
148    }
149    #[doc = "Bit 8"]
150    #[inline(always)]
151    #[must_use]
152    pub fn cr_usb_ep0_sw_ctrl(&mut self) -> CR_USB_EP0_SW_CTRL_W<8> {
153        CR_USB_EP0_SW_CTRL_W::new(self)
154    }
155    #[doc = "Bits 9:15"]
156    #[inline(always)]
157    #[must_use]
158    pub fn cr_usb_ep0_sw_addr(&mut self) -> CR_USB_EP0_SW_ADDR_W<9> {
159        CR_USB_EP0_SW_ADDR_W::new(self)
160    }
161    #[doc = "Bits 16:23"]
162    #[inline(always)]
163    #[must_use]
164    pub fn cr_usb_ep0_sw_size(&mut self) -> CR_USB_EP0_SW_SIZE_W<16> {
165        CR_USB_EP0_SW_SIZE_W::new(self)
166    }
167    #[doc = "Bit 24"]
168    #[inline(always)]
169    #[must_use]
170    pub fn cr_usb_ep0_sw_stall(&mut self) -> CR_USB_EP0_SW_STALL_W<24> {
171        CR_USB_EP0_SW_STALL_W::new(self)
172    }
173    #[doc = "Bit 25"]
174    #[inline(always)]
175    #[must_use]
176    pub fn cr_usb_ep0_sw_nack_in(&mut self) -> CR_USB_EP0_SW_NACK_IN_W<25> {
177        CR_USB_EP0_SW_NACK_IN_W::new(self)
178    }
179    #[doc = "Bit 26"]
180    #[inline(always)]
181    #[must_use]
182    pub fn cr_usb_ep0_sw_nack_out(&mut self) -> CR_USB_EP0_SW_NACK_OUT_W<26> {
183        CR_USB_EP0_SW_NACK_OUT_W::new(self)
184    }
185    #[doc = "Bit 27"]
186    #[inline(always)]
187    #[must_use]
188    pub fn cr_usb_ep0_sw_rdy(&mut self) -> CR_USB_EP0_SW_RDY_W<27> {
189        CR_USB_EP0_SW_RDY_W::new(self)
190    }
191    #[doc = "Bit 28"]
192    #[inline(always)]
193    #[must_use]
194    pub fn sts_usb_ep0_sw_rdy(&mut self) -> STS_USB_EP0_SW_RDY_W<28> {
195        STS_USB_EP0_SW_RDY_W::new(self)
196    }
197    #[doc = "Writes raw bits to the register."]
198    #[inline(always)]
199    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
200        self.0.bits(bits);
201        self
202    }
203}
204#[doc = "usb_config.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [usb_config](index.html) module"]
205pub struct USB_CONFIG_SPEC;
206impl crate::RegisterSpec for USB_CONFIG_SPEC {
207    type Ux = u32;
208}
209#[doc = "`read()` method returns [usb_config::R](R) reader structure"]
210impl crate::Readable for USB_CONFIG_SPEC {
211    type Reader = R;
212}
213#[doc = "`write(|w| ..)` method takes [usb_config::W](W) writer structure"]
214impl crate::Writable for USB_CONFIG_SPEC {
215    type Writer = W;
216    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
217    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
218}
219#[doc = "`reset()` method sets usb_config to value 0"]
220impl crate::Resettable for USB_CONFIG_SPEC {
221    const RESET_VALUE: Self::Ux = 0;
222}