1#[doc = "Register `spi_int_sts` reader"]
2pub struct R(crate::R<SPI_INT_STS_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<SPI_INT_STS_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<SPI_INT_STS_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<SPI_INT_STS_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `spi_int_sts` writer"]
17pub struct W(crate::W<SPI_INT_STS_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<SPI_INT_STS_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<SPI_INT_STS_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<SPI_INT_STS_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Field `spi_end_int` reader - "]
38pub type SPI_END_INT_R = crate::BitReader<bool>;
39#[doc = "Field `spi_end_int` writer - "]
40pub type SPI_END_INT_W<'a, const O: u8> = crate::BitWriter<'a, u32, SPI_INT_STS_SPEC, bool, O>;
41#[doc = "Field `spi_txf_int` reader - "]
42pub type SPI_TXF_INT_R = crate::BitReader<bool>;
43#[doc = "Field `spi_txf_int` writer - "]
44pub type SPI_TXF_INT_W<'a, const O: u8> = crate::BitWriter<'a, u32, SPI_INT_STS_SPEC, bool, O>;
45#[doc = "Field `spi_rxf_int` reader - "]
46pub type SPI_RXF_INT_R = crate::BitReader<bool>;
47#[doc = "Field `spi_rxf_int` writer - "]
48pub type SPI_RXF_INT_W<'a, const O: u8> = crate::BitWriter<'a, u32, SPI_INT_STS_SPEC, bool, O>;
49#[doc = "Field `spi_sto_int` reader - "]
50pub type SPI_STO_INT_R = crate::BitReader<bool>;
51#[doc = "Field `spi_sto_int` writer - "]
52pub type SPI_STO_INT_W<'a, const O: u8> = crate::BitWriter<'a, u32, SPI_INT_STS_SPEC, bool, O>;
53#[doc = "Field `spi_txu_int` reader - "]
54pub type SPI_TXU_INT_R = crate::BitReader<bool>;
55#[doc = "Field `spi_txu_int` writer - "]
56pub type SPI_TXU_INT_W<'a, const O: u8> = crate::BitWriter<'a, u32, SPI_INT_STS_SPEC, bool, O>;
57#[doc = "Field `spi_fer_int` reader - "]
58pub type SPI_FER_INT_R = crate::BitReader<bool>;
59#[doc = "Field `spi_fer_int` writer - "]
60pub type SPI_FER_INT_W<'a, const O: u8> = crate::BitWriter<'a, u32, SPI_INT_STS_SPEC, bool, O>;
61#[doc = "Field `cr_spi_end_mask` reader - "]
62pub type CR_SPI_END_MASK_R = crate::BitReader<bool>;
63#[doc = "Field `cr_spi_end_mask` writer - "]
64pub type CR_SPI_END_MASK_W<'a, const O: u8> = crate::BitWriter<'a, u32, SPI_INT_STS_SPEC, bool, O>;
65#[doc = "Field `cr_spi_txf_mask` reader - "]
66pub type CR_SPI_TXF_MASK_R = crate::BitReader<bool>;
67#[doc = "Field `cr_spi_txf_mask` writer - "]
68pub type CR_SPI_TXF_MASK_W<'a, const O: u8> = crate::BitWriter<'a, u32, SPI_INT_STS_SPEC, bool, O>;
69#[doc = "Field `cr_spi_rxf_mask` reader - "]
70pub type CR_SPI_RXF_MASK_R = crate::BitReader<bool>;
71#[doc = "Field `cr_spi_rxf_mask` writer - "]
72pub type CR_SPI_RXF_MASK_W<'a, const O: u8> = crate::BitWriter<'a, u32, SPI_INT_STS_SPEC, bool, O>;
73#[doc = "Field `cr_spi_sto_mask` reader - "]
74pub type CR_SPI_STO_MASK_R = crate::BitReader<bool>;
75#[doc = "Field `cr_spi_sto_mask` writer - "]
76pub type CR_SPI_STO_MASK_W<'a, const O: u8> = crate::BitWriter<'a, u32, SPI_INT_STS_SPEC, bool, O>;
77#[doc = "Field `cr_spi_txu_mask` reader - "]
78pub type CR_SPI_TXU_MASK_R = crate::BitReader<bool>;
79#[doc = "Field `cr_spi_txu_mask` writer - "]
80pub type CR_SPI_TXU_MASK_W<'a, const O: u8> = crate::BitWriter<'a, u32, SPI_INT_STS_SPEC, bool, O>;
81#[doc = "Field `cr_spi_fer_mask` reader - "]
82pub type CR_SPI_FER_MASK_R = crate::BitReader<bool>;
83#[doc = "Field `cr_spi_fer_mask` writer - "]
84pub type CR_SPI_FER_MASK_W<'a, const O: u8> = crate::BitWriter<'a, u32, SPI_INT_STS_SPEC, bool, O>;
85#[doc = "Field `cr_spi_end_clr` reader - "]
86pub type CR_SPI_END_CLR_R = crate::BitReader<bool>;
87#[doc = "Field `cr_spi_end_clr` writer - "]
88pub type CR_SPI_END_CLR_W<'a, const O: u8> = crate::BitWriter<'a, u32, SPI_INT_STS_SPEC, bool, O>;
89#[doc = "Field `rsvd_17` reader - "]
90pub type RSVD_17_R = crate::BitReader<bool>;
91#[doc = "Field `rsvd_17` writer - "]
92pub type RSVD_17_W<'a, const O: u8> = crate::BitWriter<'a, u32, SPI_INT_STS_SPEC, bool, O>;
93#[doc = "Field `rsvd_18` reader - "]
94pub type RSVD_18_R = crate::BitReader<bool>;
95#[doc = "Field `rsvd_18` writer - "]
96pub type RSVD_18_W<'a, const O: u8> = crate::BitWriter<'a, u32, SPI_INT_STS_SPEC, bool, O>;
97#[doc = "Field `cr_spi_sto_clr` reader - "]
98pub type CR_SPI_STO_CLR_R = crate::BitReader<bool>;
99#[doc = "Field `cr_spi_sto_clr` writer - "]
100pub type CR_SPI_STO_CLR_W<'a, const O: u8> = crate::BitWriter<'a, u32, SPI_INT_STS_SPEC, bool, O>;
101#[doc = "Field `cr_spi_txu_clr` reader - "]
102pub type CR_SPI_TXU_CLR_R = crate::BitReader<bool>;
103#[doc = "Field `cr_spi_txu_clr` writer - "]
104pub type CR_SPI_TXU_CLR_W<'a, const O: u8> = crate::BitWriter<'a, u32, SPI_INT_STS_SPEC, bool, O>;
105#[doc = "Field `rsvd_21` reader - "]
106pub type RSVD_21_R = crate::BitReader<bool>;
107#[doc = "Field `rsvd_21` writer - "]
108pub type RSVD_21_W<'a, const O: u8> = crate::BitWriter<'a, u32, SPI_INT_STS_SPEC, bool, O>;
109#[doc = "Field `cr_spi_end_en` reader - "]
110pub type CR_SPI_END_EN_R = crate::BitReader<bool>;
111#[doc = "Field `cr_spi_end_en` writer - "]
112pub type CR_SPI_END_EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, SPI_INT_STS_SPEC, bool, O>;
113#[doc = "Field `cr_spi_txf_en` reader - "]
114pub type CR_SPI_TXF_EN_R = crate::BitReader<bool>;
115#[doc = "Field `cr_spi_txf_en` writer - "]
116pub type CR_SPI_TXF_EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, SPI_INT_STS_SPEC, bool, O>;
117#[doc = "Field `cr_spi_rxf_en` reader - "]
118pub type CR_SPI_RXF_EN_R = crate::BitReader<bool>;
119#[doc = "Field `cr_spi_rxf_en` writer - "]
120pub type CR_SPI_RXF_EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, SPI_INT_STS_SPEC, bool, O>;
121#[doc = "Field `cr_spi_sto_en` reader - "]
122pub type CR_SPI_STO_EN_R = crate::BitReader<bool>;
123#[doc = "Field `cr_spi_sto_en` writer - "]
124pub type CR_SPI_STO_EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, SPI_INT_STS_SPEC, bool, O>;
125#[doc = "Field `cr_spi_txu_en` reader - "]
126pub type CR_SPI_TXU_EN_R = crate::BitReader<bool>;
127#[doc = "Field `cr_spi_txu_en` writer - "]
128pub type CR_SPI_TXU_EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, SPI_INT_STS_SPEC, bool, O>;
129#[doc = "Field `cr_spi_fer_en` reader - "]
130pub type CR_SPI_FER_EN_R = crate::BitReader<bool>;
131#[doc = "Field `cr_spi_fer_en` writer - "]
132pub type CR_SPI_FER_EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, SPI_INT_STS_SPEC, bool, O>;
133impl R {
134 #[doc = "Bit 0"]
135 #[inline(always)]
136 pub fn spi_end_int(&self) -> SPI_END_INT_R {
137 SPI_END_INT_R::new((self.bits & 1) != 0)
138 }
139 #[doc = "Bit 1"]
140 #[inline(always)]
141 pub fn spi_txf_int(&self) -> SPI_TXF_INT_R {
142 SPI_TXF_INT_R::new(((self.bits >> 1) & 1) != 0)
143 }
144 #[doc = "Bit 2"]
145 #[inline(always)]
146 pub fn spi_rxf_int(&self) -> SPI_RXF_INT_R {
147 SPI_RXF_INT_R::new(((self.bits >> 2) & 1) != 0)
148 }
149 #[doc = "Bit 3"]
150 #[inline(always)]
151 pub fn spi_sto_int(&self) -> SPI_STO_INT_R {
152 SPI_STO_INT_R::new(((self.bits >> 3) & 1) != 0)
153 }
154 #[doc = "Bit 4"]
155 #[inline(always)]
156 pub fn spi_txu_int(&self) -> SPI_TXU_INT_R {
157 SPI_TXU_INT_R::new(((self.bits >> 4) & 1) != 0)
158 }
159 #[doc = "Bit 5"]
160 #[inline(always)]
161 pub fn spi_fer_int(&self) -> SPI_FER_INT_R {
162 SPI_FER_INT_R::new(((self.bits >> 5) & 1) != 0)
163 }
164 #[doc = "Bit 8"]
165 #[inline(always)]
166 pub fn cr_spi_end_mask(&self) -> CR_SPI_END_MASK_R {
167 CR_SPI_END_MASK_R::new(((self.bits >> 8) & 1) != 0)
168 }
169 #[doc = "Bit 9"]
170 #[inline(always)]
171 pub fn cr_spi_txf_mask(&self) -> CR_SPI_TXF_MASK_R {
172 CR_SPI_TXF_MASK_R::new(((self.bits >> 9) & 1) != 0)
173 }
174 #[doc = "Bit 10"]
175 #[inline(always)]
176 pub fn cr_spi_rxf_mask(&self) -> CR_SPI_RXF_MASK_R {
177 CR_SPI_RXF_MASK_R::new(((self.bits >> 10) & 1) != 0)
178 }
179 #[doc = "Bit 11"]
180 #[inline(always)]
181 pub fn cr_spi_sto_mask(&self) -> CR_SPI_STO_MASK_R {
182 CR_SPI_STO_MASK_R::new(((self.bits >> 11) & 1) != 0)
183 }
184 #[doc = "Bit 12"]
185 #[inline(always)]
186 pub fn cr_spi_txu_mask(&self) -> CR_SPI_TXU_MASK_R {
187 CR_SPI_TXU_MASK_R::new(((self.bits >> 12) & 1) != 0)
188 }
189 #[doc = "Bit 13"]
190 #[inline(always)]
191 pub fn cr_spi_fer_mask(&self) -> CR_SPI_FER_MASK_R {
192 CR_SPI_FER_MASK_R::new(((self.bits >> 13) & 1) != 0)
193 }
194 #[doc = "Bit 16"]
195 #[inline(always)]
196 pub fn cr_spi_end_clr(&self) -> CR_SPI_END_CLR_R {
197 CR_SPI_END_CLR_R::new(((self.bits >> 16) & 1) != 0)
198 }
199 #[doc = "Bit 17"]
200 #[inline(always)]
201 pub fn rsvd_17(&self) -> RSVD_17_R {
202 RSVD_17_R::new(((self.bits >> 17) & 1) != 0)
203 }
204 #[doc = "Bit 18"]
205 #[inline(always)]
206 pub fn rsvd_18(&self) -> RSVD_18_R {
207 RSVD_18_R::new(((self.bits >> 18) & 1) != 0)
208 }
209 #[doc = "Bit 19"]
210 #[inline(always)]
211 pub fn cr_spi_sto_clr(&self) -> CR_SPI_STO_CLR_R {
212 CR_SPI_STO_CLR_R::new(((self.bits >> 19) & 1) != 0)
213 }
214 #[doc = "Bit 20"]
215 #[inline(always)]
216 pub fn cr_spi_txu_clr(&self) -> CR_SPI_TXU_CLR_R {
217 CR_SPI_TXU_CLR_R::new(((self.bits >> 20) & 1) != 0)
218 }
219 #[doc = "Bit 21"]
220 #[inline(always)]
221 pub fn rsvd_21(&self) -> RSVD_21_R {
222 RSVD_21_R::new(((self.bits >> 21) & 1) != 0)
223 }
224 #[doc = "Bit 24"]
225 #[inline(always)]
226 pub fn cr_spi_end_en(&self) -> CR_SPI_END_EN_R {
227 CR_SPI_END_EN_R::new(((self.bits >> 24) & 1) != 0)
228 }
229 #[doc = "Bit 25"]
230 #[inline(always)]
231 pub fn cr_spi_txf_en(&self) -> CR_SPI_TXF_EN_R {
232 CR_SPI_TXF_EN_R::new(((self.bits >> 25) & 1) != 0)
233 }
234 #[doc = "Bit 26"]
235 #[inline(always)]
236 pub fn cr_spi_rxf_en(&self) -> CR_SPI_RXF_EN_R {
237 CR_SPI_RXF_EN_R::new(((self.bits >> 26) & 1) != 0)
238 }
239 #[doc = "Bit 27"]
240 #[inline(always)]
241 pub fn cr_spi_sto_en(&self) -> CR_SPI_STO_EN_R {
242 CR_SPI_STO_EN_R::new(((self.bits >> 27) & 1) != 0)
243 }
244 #[doc = "Bit 28"]
245 #[inline(always)]
246 pub fn cr_spi_txu_en(&self) -> CR_SPI_TXU_EN_R {
247 CR_SPI_TXU_EN_R::new(((self.bits >> 28) & 1) != 0)
248 }
249 #[doc = "Bit 29"]
250 #[inline(always)]
251 pub fn cr_spi_fer_en(&self) -> CR_SPI_FER_EN_R {
252 CR_SPI_FER_EN_R::new(((self.bits >> 29) & 1) != 0)
253 }
254}
255impl W {
256 #[doc = "Bit 0"]
257 #[inline(always)]
258 #[must_use]
259 pub fn spi_end_int(&mut self) -> SPI_END_INT_W<0> {
260 SPI_END_INT_W::new(self)
261 }
262 #[doc = "Bit 1"]
263 #[inline(always)]
264 #[must_use]
265 pub fn spi_txf_int(&mut self) -> SPI_TXF_INT_W<1> {
266 SPI_TXF_INT_W::new(self)
267 }
268 #[doc = "Bit 2"]
269 #[inline(always)]
270 #[must_use]
271 pub fn spi_rxf_int(&mut self) -> SPI_RXF_INT_W<2> {
272 SPI_RXF_INT_W::new(self)
273 }
274 #[doc = "Bit 3"]
275 #[inline(always)]
276 #[must_use]
277 pub fn spi_sto_int(&mut self) -> SPI_STO_INT_W<3> {
278 SPI_STO_INT_W::new(self)
279 }
280 #[doc = "Bit 4"]
281 #[inline(always)]
282 #[must_use]
283 pub fn spi_txu_int(&mut self) -> SPI_TXU_INT_W<4> {
284 SPI_TXU_INT_W::new(self)
285 }
286 #[doc = "Bit 5"]
287 #[inline(always)]
288 #[must_use]
289 pub fn spi_fer_int(&mut self) -> SPI_FER_INT_W<5> {
290 SPI_FER_INT_W::new(self)
291 }
292 #[doc = "Bit 8"]
293 #[inline(always)]
294 #[must_use]
295 pub fn cr_spi_end_mask(&mut self) -> CR_SPI_END_MASK_W<8> {
296 CR_SPI_END_MASK_W::new(self)
297 }
298 #[doc = "Bit 9"]
299 #[inline(always)]
300 #[must_use]
301 pub fn cr_spi_txf_mask(&mut self) -> CR_SPI_TXF_MASK_W<9> {
302 CR_SPI_TXF_MASK_W::new(self)
303 }
304 #[doc = "Bit 10"]
305 #[inline(always)]
306 #[must_use]
307 pub fn cr_spi_rxf_mask(&mut self) -> CR_SPI_RXF_MASK_W<10> {
308 CR_SPI_RXF_MASK_W::new(self)
309 }
310 #[doc = "Bit 11"]
311 #[inline(always)]
312 #[must_use]
313 pub fn cr_spi_sto_mask(&mut self) -> CR_SPI_STO_MASK_W<11> {
314 CR_SPI_STO_MASK_W::new(self)
315 }
316 #[doc = "Bit 12"]
317 #[inline(always)]
318 #[must_use]
319 pub fn cr_spi_txu_mask(&mut self) -> CR_SPI_TXU_MASK_W<12> {
320 CR_SPI_TXU_MASK_W::new(self)
321 }
322 #[doc = "Bit 13"]
323 #[inline(always)]
324 #[must_use]
325 pub fn cr_spi_fer_mask(&mut self) -> CR_SPI_FER_MASK_W<13> {
326 CR_SPI_FER_MASK_W::new(self)
327 }
328 #[doc = "Bit 16"]
329 #[inline(always)]
330 #[must_use]
331 pub fn cr_spi_end_clr(&mut self) -> CR_SPI_END_CLR_W<16> {
332 CR_SPI_END_CLR_W::new(self)
333 }
334 #[doc = "Bit 17"]
335 #[inline(always)]
336 #[must_use]
337 pub fn rsvd_17(&mut self) -> RSVD_17_W<17> {
338 RSVD_17_W::new(self)
339 }
340 #[doc = "Bit 18"]
341 #[inline(always)]
342 #[must_use]
343 pub fn rsvd_18(&mut self) -> RSVD_18_W<18> {
344 RSVD_18_W::new(self)
345 }
346 #[doc = "Bit 19"]
347 #[inline(always)]
348 #[must_use]
349 pub fn cr_spi_sto_clr(&mut self) -> CR_SPI_STO_CLR_W<19> {
350 CR_SPI_STO_CLR_W::new(self)
351 }
352 #[doc = "Bit 20"]
353 #[inline(always)]
354 #[must_use]
355 pub fn cr_spi_txu_clr(&mut self) -> CR_SPI_TXU_CLR_W<20> {
356 CR_SPI_TXU_CLR_W::new(self)
357 }
358 #[doc = "Bit 21"]
359 #[inline(always)]
360 #[must_use]
361 pub fn rsvd_21(&mut self) -> RSVD_21_W<21> {
362 RSVD_21_W::new(self)
363 }
364 #[doc = "Bit 24"]
365 #[inline(always)]
366 #[must_use]
367 pub fn cr_spi_end_en(&mut self) -> CR_SPI_END_EN_W<24> {
368 CR_SPI_END_EN_W::new(self)
369 }
370 #[doc = "Bit 25"]
371 #[inline(always)]
372 #[must_use]
373 pub fn cr_spi_txf_en(&mut self) -> CR_SPI_TXF_EN_W<25> {
374 CR_SPI_TXF_EN_W::new(self)
375 }
376 #[doc = "Bit 26"]
377 #[inline(always)]
378 #[must_use]
379 pub fn cr_spi_rxf_en(&mut self) -> CR_SPI_RXF_EN_W<26> {
380 CR_SPI_RXF_EN_W::new(self)
381 }
382 #[doc = "Bit 27"]
383 #[inline(always)]
384 #[must_use]
385 pub fn cr_spi_sto_en(&mut self) -> CR_SPI_STO_EN_W<27> {
386 CR_SPI_STO_EN_W::new(self)
387 }
388 #[doc = "Bit 28"]
389 #[inline(always)]
390 #[must_use]
391 pub fn cr_spi_txu_en(&mut self) -> CR_SPI_TXU_EN_W<28> {
392 CR_SPI_TXU_EN_W::new(self)
393 }
394 #[doc = "Bit 29"]
395 #[inline(always)]
396 #[must_use]
397 pub fn cr_spi_fer_en(&mut self) -> CR_SPI_FER_EN_W<29> {
398 CR_SPI_FER_EN_W::new(self)
399 }
400 #[doc = "Writes raw bits to the register."]
401 #[inline(always)]
402 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
403 self.0.bits(bits);
404 self
405 }
406}
407#[doc = "spi_int_sts.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [spi_int_sts](index.html) module"]
408pub struct SPI_INT_STS_SPEC;
409impl crate::RegisterSpec for SPI_INT_STS_SPEC {
410 type Ux = u32;
411}
412#[doc = "`read()` method returns [spi_int_sts::R](R) reader structure"]
413impl crate::Readable for SPI_INT_STS_SPEC {
414 type Reader = R;
415}
416#[doc = "`write(|w| ..)` method takes [spi_int_sts::W](W) writer structure"]
417impl crate::Writable for SPI_INT_STS_SPEC {
418 type Writer = W;
419 const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
420 const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
421}
422#[doc = "`reset()` method sets spi_int_sts to value 0"]
423impl crate::Resettable for SPI_INT_STS_SPEC {
424 const RESET_VALUE: Self::Ux = 0;
425}