bl702_pac/spi/
spi_config.rs

1#[doc = "Register `spi_config` reader"]
2pub struct R(crate::R<SPI_CONFIG_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<SPI_CONFIG_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<SPI_CONFIG_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<SPI_CONFIG_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `spi_config` writer"]
17pub struct W(crate::W<SPI_CONFIG_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<SPI_CONFIG_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<SPI_CONFIG_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<SPI_CONFIG_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `cr_spi_m_en` reader - "]
38pub type CR_SPI_M_EN_R = crate::BitReader<bool>;
39#[doc = "Field `cr_spi_m_en` writer - "]
40pub type CR_SPI_M_EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, SPI_CONFIG_SPEC, bool, O>;
41#[doc = "Field `cr_spi_s_en` reader - "]
42pub type CR_SPI_S_EN_R = crate::BitReader<bool>;
43#[doc = "Field `cr_spi_s_en` writer - "]
44pub type CR_SPI_S_EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, SPI_CONFIG_SPEC, bool, O>;
45#[doc = "Field `cr_spi_frame_size` reader - "]
46pub type CR_SPI_FRAME_SIZE_R = crate::FieldReader<u8, u8>;
47#[doc = "Field `cr_spi_frame_size` writer - "]
48pub type CR_SPI_FRAME_SIZE_W<'a, const O: u8> =
49    crate::FieldWriter<'a, u32, SPI_CONFIG_SPEC, u8, u8, 2, O>;
50#[doc = "Field `cr_spi_sclk_pol` reader - "]
51pub type CR_SPI_SCLK_POL_R = crate::BitReader<bool>;
52#[doc = "Field `cr_spi_sclk_pol` writer - "]
53pub type CR_SPI_SCLK_POL_W<'a, const O: u8> = crate::BitWriter<'a, u32, SPI_CONFIG_SPEC, bool, O>;
54#[doc = "Field `cr_spi_sclk_ph` reader - "]
55pub type CR_SPI_SCLK_PH_R = crate::BitReader<bool>;
56#[doc = "Field `cr_spi_sclk_ph` writer - "]
57pub type CR_SPI_SCLK_PH_W<'a, const O: u8> = crate::BitWriter<'a, u32, SPI_CONFIG_SPEC, bool, O>;
58#[doc = "Field `cr_spi_bit_inv` reader - "]
59pub type CR_SPI_BIT_INV_R = crate::BitReader<bool>;
60#[doc = "Field `cr_spi_bit_inv` writer - "]
61pub type CR_SPI_BIT_INV_W<'a, const O: u8> = crate::BitWriter<'a, u32, SPI_CONFIG_SPEC, bool, O>;
62#[doc = "Field `cr_spi_byte_inv` reader - "]
63pub type CR_SPI_BYTE_INV_R = crate::BitReader<bool>;
64#[doc = "Field `cr_spi_byte_inv` writer - "]
65pub type CR_SPI_BYTE_INV_W<'a, const O: u8> = crate::BitWriter<'a, u32, SPI_CONFIG_SPEC, bool, O>;
66#[doc = "Field `cr_spi_rxd_ignr_en` reader - "]
67pub type CR_SPI_RXD_IGNR_EN_R = crate::BitReader<bool>;
68#[doc = "Field `cr_spi_rxd_ignr_en` writer - "]
69pub type CR_SPI_RXD_IGNR_EN_W<'a, const O: u8> =
70    crate::BitWriter<'a, u32, SPI_CONFIG_SPEC, bool, O>;
71#[doc = "Field `cr_spi_m_cont_en` reader - "]
72pub type CR_SPI_M_CONT_EN_R = crate::BitReader<bool>;
73#[doc = "Field `cr_spi_m_cont_en` writer - "]
74pub type CR_SPI_M_CONT_EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, SPI_CONFIG_SPEC, bool, O>;
75#[doc = "Field `cr_spi_deg_en` reader - "]
76pub type CR_SPI_DEG_EN_R = crate::BitReader<bool>;
77#[doc = "Field `cr_spi_deg_en` writer - "]
78pub type CR_SPI_DEG_EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, SPI_CONFIG_SPEC, bool, O>;
79#[doc = "Field `cr_spi_deg_cnt` reader - "]
80pub type CR_SPI_DEG_CNT_R = crate::FieldReader<u8, u8>;
81#[doc = "Field `cr_spi_deg_cnt` writer - "]
82pub type CR_SPI_DEG_CNT_W<'a, const O: u8> =
83    crate::FieldWriter<'a, u32, SPI_CONFIG_SPEC, u8, u8, 4, O>;
84impl R {
85    #[doc = "Bit 0"]
86    #[inline(always)]
87    pub fn cr_spi_m_en(&self) -> CR_SPI_M_EN_R {
88        CR_SPI_M_EN_R::new((self.bits & 1) != 0)
89    }
90    #[doc = "Bit 1"]
91    #[inline(always)]
92    pub fn cr_spi_s_en(&self) -> CR_SPI_S_EN_R {
93        CR_SPI_S_EN_R::new(((self.bits >> 1) & 1) != 0)
94    }
95    #[doc = "Bits 2:3"]
96    #[inline(always)]
97    pub fn cr_spi_frame_size(&self) -> CR_SPI_FRAME_SIZE_R {
98        CR_SPI_FRAME_SIZE_R::new(((self.bits >> 2) & 3) as u8)
99    }
100    #[doc = "Bit 4"]
101    #[inline(always)]
102    pub fn cr_spi_sclk_pol(&self) -> CR_SPI_SCLK_POL_R {
103        CR_SPI_SCLK_POL_R::new(((self.bits >> 4) & 1) != 0)
104    }
105    #[doc = "Bit 5"]
106    #[inline(always)]
107    pub fn cr_spi_sclk_ph(&self) -> CR_SPI_SCLK_PH_R {
108        CR_SPI_SCLK_PH_R::new(((self.bits >> 5) & 1) != 0)
109    }
110    #[doc = "Bit 6"]
111    #[inline(always)]
112    pub fn cr_spi_bit_inv(&self) -> CR_SPI_BIT_INV_R {
113        CR_SPI_BIT_INV_R::new(((self.bits >> 6) & 1) != 0)
114    }
115    #[doc = "Bit 7"]
116    #[inline(always)]
117    pub fn cr_spi_byte_inv(&self) -> CR_SPI_BYTE_INV_R {
118        CR_SPI_BYTE_INV_R::new(((self.bits >> 7) & 1) != 0)
119    }
120    #[doc = "Bit 8"]
121    #[inline(always)]
122    pub fn cr_spi_rxd_ignr_en(&self) -> CR_SPI_RXD_IGNR_EN_R {
123        CR_SPI_RXD_IGNR_EN_R::new(((self.bits >> 8) & 1) != 0)
124    }
125    #[doc = "Bit 9"]
126    #[inline(always)]
127    pub fn cr_spi_m_cont_en(&self) -> CR_SPI_M_CONT_EN_R {
128        CR_SPI_M_CONT_EN_R::new(((self.bits >> 9) & 1) != 0)
129    }
130    #[doc = "Bit 11"]
131    #[inline(always)]
132    pub fn cr_spi_deg_en(&self) -> CR_SPI_DEG_EN_R {
133        CR_SPI_DEG_EN_R::new(((self.bits >> 11) & 1) != 0)
134    }
135    #[doc = "Bits 12:15"]
136    #[inline(always)]
137    pub fn cr_spi_deg_cnt(&self) -> CR_SPI_DEG_CNT_R {
138        CR_SPI_DEG_CNT_R::new(((self.bits >> 12) & 0x0f) as u8)
139    }
140}
141impl W {
142    #[doc = "Bit 0"]
143    #[inline(always)]
144    #[must_use]
145    pub fn cr_spi_m_en(&mut self) -> CR_SPI_M_EN_W<0> {
146        CR_SPI_M_EN_W::new(self)
147    }
148    #[doc = "Bit 1"]
149    #[inline(always)]
150    #[must_use]
151    pub fn cr_spi_s_en(&mut self) -> CR_SPI_S_EN_W<1> {
152        CR_SPI_S_EN_W::new(self)
153    }
154    #[doc = "Bits 2:3"]
155    #[inline(always)]
156    #[must_use]
157    pub fn cr_spi_frame_size(&mut self) -> CR_SPI_FRAME_SIZE_W<2> {
158        CR_SPI_FRAME_SIZE_W::new(self)
159    }
160    #[doc = "Bit 4"]
161    #[inline(always)]
162    #[must_use]
163    pub fn cr_spi_sclk_pol(&mut self) -> CR_SPI_SCLK_POL_W<4> {
164        CR_SPI_SCLK_POL_W::new(self)
165    }
166    #[doc = "Bit 5"]
167    #[inline(always)]
168    #[must_use]
169    pub fn cr_spi_sclk_ph(&mut self) -> CR_SPI_SCLK_PH_W<5> {
170        CR_SPI_SCLK_PH_W::new(self)
171    }
172    #[doc = "Bit 6"]
173    #[inline(always)]
174    #[must_use]
175    pub fn cr_spi_bit_inv(&mut self) -> CR_SPI_BIT_INV_W<6> {
176        CR_SPI_BIT_INV_W::new(self)
177    }
178    #[doc = "Bit 7"]
179    #[inline(always)]
180    #[must_use]
181    pub fn cr_spi_byte_inv(&mut self) -> CR_SPI_BYTE_INV_W<7> {
182        CR_SPI_BYTE_INV_W::new(self)
183    }
184    #[doc = "Bit 8"]
185    #[inline(always)]
186    #[must_use]
187    pub fn cr_spi_rxd_ignr_en(&mut self) -> CR_SPI_RXD_IGNR_EN_W<8> {
188        CR_SPI_RXD_IGNR_EN_W::new(self)
189    }
190    #[doc = "Bit 9"]
191    #[inline(always)]
192    #[must_use]
193    pub fn cr_spi_m_cont_en(&mut self) -> CR_SPI_M_CONT_EN_W<9> {
194        CR_SPI_M_CONT_EN_W::new(self)
195    }
196    #[doc = "Bit 11"]
197    #[inline(always)]
198    #[must_use]
199    pub fn cr_spi_deg_en(&mut self) -> CR_SPI_DEG_EN_W<11> {
200        CR_SPI_DEG_EN_W::new(self)
201    }
202    #[doc = "Bits 12:15"]
203    #[inline(always)]
204    #[must_use]
205    pub fn cr_spi_deg_cnt(&mut self) -> CR_SPI_DEG_CNT_W<12> {
206        CR_SPI_DEG_CNT_W::new(self)
207    }
208    #[doc = "Writes raw bits to the register."]
209    #[inline(always)]
210    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
211        self.0.bits(bits);
212        self
213    }
214}
215#[doc = "spi_config.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [spi_config](index.html) module"]
216pub struct SPI_CONFIG_SPEC;
217impl crate::RegisterSpec for SPI_CONFIG_SPEC {
218    type Ux = u32;
219}
220#[doc = "`read()` method returns [spi_config::R](R) reader structure"]
221impl crate::Readable for SPI_CONFIG_SPEC {
222    type Reader = R;
223}
224#[doc = "`write(|w| ..)` method takes [spi_config::W](W) writer structure"]
225impl crate::Writable for SPI_CONFIG_SPEC {
226    type Writer = W;
227    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
228    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
229}
230#[doc = "`reset()` method sets spi_config to value 0"]
231impl crate::Resettable for SPI_CONFIG_SPEC {
232    const RESET_VALUE: Self::Ux = 0;
233}