bl702_pac/sf_ctrl/
sf_ctrl_0.rs

1#[doc = "Register `sf_ctrl_0` reader"]
2pub struct R(crate::R<SF_CTRL_0_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<SF_CTRL_0_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<SF_CTRL_0_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<SF_CTRL_0_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `sf_ctrl_0` writer"]
17pub struct W(crate::W<SF_CTRL_0_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<SF_CTRL_0_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<SF_CTRL_0_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<SF_CTRL_0_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `sf_clk_sf_rx_inv_sel` reader - "]
38pub type SF_CLK_SF_RX_INV_SEL_R = crate::BitReader<bool>;
39#[doc = "Field `sf_clk_sf_rx_inv_sel` writer - "]
40pub type SF_CLK_SF_RX_INV_SEL_W<'a, const O: u8> =
41    crate::BitWriter<'a, u32, SF_CTRL_0_SPEC, bool, O>;
42#[doc = "Field `sf_clk_out_gate_en` reader - "]
43pub type SF_CLK_OUT_GATE_EN_R = crate::BitReader<bool>;
44#[doc = "Field `sf_clk_out_gate_en` writer - "]
45pub type SF_CLK_OUT_GATE_EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, SF_CTRL_0_SPEC, bool, O>;
46#[doc = "Field `sf_clk_out_inv_sel` reader - "]
47pub type SF_CLK_OUT_INV_SEL_R = crate::BitReader<bool>;
48#[doc = "Field `sf_clk_out_inv_sel` writer - "]
49pub type SF_CLK_OUT_INV_SEL_W<'a, const O: u8> = crate::BitWriter<'a, u32, SF_CTRL_0_SPEC, bool, O>;
50#[doc = "Field `sf_clk_sahb_sram_sel` reader - "]
51pub type SF_CLK_SAHB_SRAM_SEL_R = crate::BitReader<bool>;
52#[doc = "Field `sf_clk_sahb_sram_sel` writer - "]
53pub type SF_CLK_SAHB_SRAM_SEL_W<'a, const O: u8> =
54    crate::BitWriter<'a, u32, SF_CTRL_0_SPEC, bool, O>;
55#[doc = "Field `sf_if_read_dly_n` reader - "]
56pub type SF_IF_READ_DLY_N_R = crate::FieldReader<u8, u8>;
57#[doc = "Field `sf_if_read_dly_n` writer - "]
58pub type SF_IF_READ_DLY_N_W<'a, const O: u8> =
59    crate::FieldWriter<'a, u32, SF_CTRL_0_SPEC, u8, u8, 3, O>;
60#[doc = "Field `sf_if_read_dly_en` reader - "]
61pub type SF_IF_READ_DLY_EN_R = crate::BitReader<bool>;
62#[doc = "Field `sf_if_read_dly_en` writer - "]
63pub type SF_IF_READ_DLY_EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, SF_CTRL_0_SPEC, bool, O>;
64#[doc = "Field `sf_if_int` reader - "]
65pub type SF_IF_INT_R = crate::BitReader<bool>;
66#[doc = "Field `sf_if_int` writer - "]
67pub type SF_IF_INT_W<'a, const O: u8> = crate::BitWriter<'a, u32, SF_CTRL_0_SPEC, bool, O>;
68#[doc = "Field `sf_if_int_clr` reader - "]
69pub type SF_IF_INT_CLR_R = crate::BitReader<bool>;
70#[doc = "Field `sf_if_int_clr` writer - "]
71pub type SF_IF_INT_CLR_W<'a, const O: u8> = crate::BitWriter<'a, u32, SF_CTRL_0_SPEC, bool, O>;
72#[doc = "Field `sf_if_int_set` reader - "]
73pub type SF_IF_INT_SET_R = crate::BitReader<bool>;
74#[doc = "Field `sf_if_int_set` writer - "]
75pub type SF_IF_INT_SET_W<'a, const O: u8> = crate::BitWriter<'a, u32, SF_CTRL_0_SPEC, bool, O>;
76#[doc = "Field `sf_aes_dly_mode` reader - "]
77pub type SF_AES_DLY_MODE_R = crate::BitReader<bool>;
78#[doc = "Field `sf_aes_dly_mode` writer - "]
79pub type SF_AES_DLY_MODE_W<'a, const O: u8> = crate::BitWriter<'a, u32, SF_CTRL_0_SPEC, bool, O>;
80#[doc = "Field `sf_aes_dout_endian` reader - "]
81pub type SF_AES_DOUT_ENDIAN_R = crate::BitReader<bool>;
82#[doc = "Field `sf_aes_dout_endian` writer - "]
83pub type SF_AES_DOUT_ENDIAN_W<'a, const O: u8> = crate::BitWriter<'a, u32, SF_CTRL_0_SPEC, bool, O>;
84#[doc = "Field `sf_aes_ctr_plus_en` reader - "]
85pub type SF_AES_CTR_PLUS_EN_R = crate::BitReader<bool>;
86#[doc = "Field `sf_aes_ctr_plus_en` writer - "]
87pub type SF_AES_CTR_PLUS_EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, SF_CTRL_0_SPEC, bool, O>;
88#[doc = "Field `sf_aes_key_endian` reader - "]
89pub type SF_AES_KEY_ENDIAN_R = crate::BitReader<bool>;
90#[doc = "Field `sf_aes_key_endian` writer - "]
91pub type SF_AES_KEY_ENDIAN_W<'a, const O: u8> = crate::BitWriter<'a, u32, SF_CTRL_0_SPEC, bool, O>;
92#[doc = "Field `sf_aes_iv_endian` reader - "]
93pub type SF_AES_IV_ENDIAN_R = crate::BitReader<bool>;
94#[doc = "Field `sf_aes_iv_endian` writer - "]
95pub type SF_AES_IV_ENDIAN_W<'a, const O: u8> = crate::BitWriter<'a, u32, SF_CTRL_0_SPEC, bool, O>;
96#[doc = "Field `sf_id` reader - "]
97pub type SF_ID_R = crate::FieldReader<u8, u8>;
98#[doc = "Field `sf_id` writer - "]
99pub type SF_ID_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SF_CTRL_0_SPEC, u8, u8, 8, O>;
100impl R {
101    #[doc = "Bit 2"]
102    #[inline(always)]
103    pub fn sf_clk_sf_rx_inv_sel(&self) -> SF_CLK_SF_RX_INV_SEL_R {
104        SF_CLK_SF_RX_INV_SEL_R::new(((self.bits >> 2) & 1) != 0)
105    }
106    #[doc = "Bit 3"]
107    #[inline(always)]
108    pub fn sf_clk_out_gate_en(&self) -> SF_CLK_OUT_GATE_EN_R {
109        SF_CLK_OUT_GATE_EN_R::new(((self.bits >> 3) & 1) != 0)
110    }
111    #[doc = "Bit 4"]
112    #[inline(always)]
113    pub fn sf_clk_out_inv_sel(&self) -> SF_CLK_OUT_INV_SEL_R {
114        SF_CLK_OUT_INV_SEL_R::new(((self.bits >> 4) & 1) != 0)
115    }
116    #[doc = "Bit 5"]
117    #[inline(always)]
118    pub fn sf_clk_sahb_sram_sel(&self) -> SF_CLK_SAHB_SRAM_SEL_R {
119        SF_CLK_SAHB_SRAM_SEL_R::new(((self.bits >> 5) & 1) != 0)
120    }
121    #[doc = "Bits 8:10"]
122    #[inline(always)]
123    pub fn sf_if_read_dly_n(&self) -> SF_IF_READ_DLY_N_R {
124        SF_IF_READ_DLY_N_R::new(((self.bits >> 8) & 7) as u8)
125    }
126    #[doc = "Bit 11"]
127    #[inline(always)]
128    pub fn sf_if_read_dly_en(&self) -> SF_IF_READ_DLY_EN_R {
129        SF_IF_READ_DLY_EN_R::new(((self.bits >> 11) & 1) != 0)
130    }
131    #[doc = "Bit 16"]
132    #[inline(always)]
133    pub fn sf_if_int(&self) -> SF_IF_INT_R {
134        SF_IF_INT_R::new(((self.bits >> 16) & 1) != 0)
135    }
136    #[doc = "Bit 17"]
137    #[inline(always)]
138    pub fn sf_if_int_clr(&self) -> SF_IF_INT_CLR_R {
139        SF_IF_INT_CLR_R::new(((self.bits >> 17) & 1) != 0)
140    }
141    #[doc = "Bit 18"]
142    #[inline(always)]
143    pub fn sf_if_int_set(&self) -> SF_IF_INT_SET_R {
144        SF_IF_INT_SET_R::new(((self.bits >> 18) & 1) != 0)
145    }
146    #[doc = "Bit 19"]
147    #[inline(always)]
148    pub fn sf_aes_dly_mode(&self) -> SF_AES_DLY_MODE_R {
149        SF_AES_DLY_MODE_R::new(((self.bits >> 19) & 1) != 0)
150    }
151    #[doc = "Bit 20"]
152    #[inline(always)]
153    pub fn sf_aes_dout_endian(&self) -> SF_AES_DOUT_ENDIAN_R {
154        SF_AES_DOUT_ENDIAN_R::new(((self.bits >> 20) & 1) != 0)
155    }
156    #[doc = "Bit 21"]
157    #[inline(always)]
158    pub fn sf_aes_ctr_plus_en(&self) -> SF_AES_CTR_PLUS_EN_R {
159        SF_AES_CTR_PLUS_EN_R::new(((self.bits >> 21) & 1) != 0)
160    }
161    #[doc = "Bit 22"]
162    #[inline(always)]
163    pub fn sf_aes_key_endian(&self) -> SF_AES_KEY_ENDIAN_R {
164        SF_AES_KEY_ENDIAN_R::new(((self.bits >> 22) & 1) != 0)
165    }
166    #[doc = "Bit 23"]
167    #[inline(always)]
168    pub fn sf_aes_iv_endian(&self) -> SF_AES_IV_ENDIAN_R {
169        SF_AES_IV_ENDIAN_R::new(((self.bits >> 23) & 1) != 0)
170    }
171    #[doc = "Bits 24:31"]
172    #[inline(always)]
173    pub fn sf_id(&self) -> SF_ID_R {
174        SF_ID_R::new(((self.bits >> 24) & 0xff) as u8)
175    }
176}
177impl W {
178    #[doc = "Bit 2"]
179    #[inline(always)]
180    #[must_use]
181    pub fn sf_clk_sf_rx_inv_sel(&mut self) -> SF_CLK_SF_RX_INV_SEL_W<2> {
182        SF_CLK_SF_RX_INV_SEL_W::new(self)
183    }
184    #[doc = "Bit 3"]
185    #[inline(always)]
186    #[must_use]
187    pub fn sf_clk_out_gate_en(&mut self) -> SF_CLK_OUT_GATE_EN_W<3> {
188        SF_CLK_OUT_GATE_EN_W::new(self)
189    }
190    #[doc = "Bit 4"]
191    #[inline(always)]
192    #[must_use]
193    pub fn sf_clk_out_inv_sel(&mut self) -> SF_CLK_OUT_INV_SEL_W<4> {
194        SF_CLK_OUT_INV_SEL_W::new(self)
195    }
196    #[doc = "Bit 5"]
197    #[inline(always)]
198    #[must_use]
199    pub fn sf_clk_sahb_sram_sel(&mut self) -> SF_CLK_SAHB_SRAM_SEL_W<5> {
200        SF_CLK_SAHB_SRAM_SEL_W::new(self)
201    }
202    #[doc = "Bits 8:10"]
203    #[inline(always)]
204    #[must_use]
205    pub fn sf_if_read_dly_n(&mut self) -> SF_IF_READ_DLY_N_W<8> {
206        SF_IF_READ_DLY_N_W::new(self)
207    }
208    #[doc = "Bit 11"]
209    #[inline(always)]
210    #[must_use]
211    pub fn sf_if_read_dly_en(&mut self) -> SF_IF_READ_DLY_EN_W<11> {
212        SF_IF_READ_DLY_EN_W::new(self)
213    }
214    #[doc = "Bit 16"]
215    #[inline(always)]
216    #[must_use]
217    pub fn sf_if_int(&mut self) -> SF_IF_INT_W<16> {
218        SF_IF_INT_W::new(self)
219    }
220    #[doc = "Bit 17"]
221    #[inline(always)]
222    #[must_use]
223    pub fn sf_if_int_clr(&mut self) -> SF_IF_INT_CLR_W<17> {
224        SF_IF_INT_CLR_W::new(self)
225    }
226    #[doc = "Bit 18"]
227    #[inline(always)]
228    #[must_use]
229    pub fn sf_if_int_set(&mut self) -> SF_IF_INT_SET_W<18> {
230        SF_IF_INT_SET_W::new(self)
231    }
232    #[doc = "Bit 19"]
233    #[inline(always)]
234    #[must_use]
235    pub fn sf_aes_dly_mode(&mut self) -> SF_AES_DLY_MODE_W<19> {
236        SF_AES_DLY_MODE_W::new(self)
237    }
238    #[doc = "Bit 20"]
239    #[inline(always)]
240    #[must_use]
241    pub fn sf_aes_dout_endian(&mut self) -> SF_AES_DOUT_ENDIAN_W<20> {
242        SF_AES_DOUT_ENDIAN_W::new(self)
243    }
244    #[doc = "Bit 21"]
245    #[inline(always)]
246    #[must_use]
247    pub fn sf_aes_ctr_plus_en(&mut self) -> SF_AES_CTR_PLUS_EN_W<21> {
248        SF_AES_CTR_PLUS_EN_W::new(self)
249    }
250    #[doc = "Bit 22"]
251    #[inline(always)]
252    #[must_use]
253    pub fn sf_aes_key_endian(&mut self) -> SF_AES_KEY_ENDIAN_W<22> {
254        SF_AES_KEY_ENDIAN_W::new(self)
255    }
256    #[doc = "Bit 23"]
257    #[inline(always)]
258    #[must_use]
259    pub fn sf_aes_iv_endian(&mut self) -> SF_AES_IV_ENDIAN_W<23> {
260        SF_AES_IV_ENDIAN_W::new(self)
261    }
262    #[doc = "Bits 24:31"]
263    #[inline(always)]
264    #[must_use]
265    pub fn sf_id(&mut self) -> SF_ID_W<24> {
266        SF_ID_W::new(self)
267    }
268    #[doc = "Writes raw bits to the register."]
269    #[inline(always)]
270    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
271        self.0.bits(bits);
272        self
273    }
274}
275#[doc = "sf_ctrl_0.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [sf_ctrl_0](index.html) module"]
276pub struct SF_CTRL_0_SPEC;
277impl crate::RegisterSpec for SF_CTRL_0_SPEC {
278    type Ux = u32;
279}
280#[doc = "`read()` method returns [sf_ctrl_0::R](R) reader structure"]
281impl crate::Readable for SF_CTRL_0_SPEC {
282    type Reader = R;
283}
284#[doc = "`write(|w| ..)` method takes [sf_ctrl_0::W](W) writer structure"]
285impl crate::Writable for SF_CTRL_0_SPEC {
286    type Writer = W;
287    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
288    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
289}
290#[doc = "`reset()` method sets sf_ctrl_0 to value 0"]
291impl crate::Resettable for SF_CTRL_0_SPEC {
292    const RESET_VALUE: Self::Ux = 0;
293}