bl702_pac/rf/
trx_gain_bw_hw.rs

1#[doc = "Register `trx_gain_bw_hw` reader"]
2pub struct R(crate::R<TRX_GAIN_BW_HW_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<TRX_GAIN_BW_HW_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<TRX_GAIN_BW_HW_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<TRX_GAIN_BW_HW_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `trx_gain_bw_hw` writer"]
17pub struct W(crate::W<TRX_GAIN_BW_HW_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<TRX_GAIN_BW_HW_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<TRX_GAIN_BW_HW_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<TRX_GAIN_BW_HW_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `gc_lna_hw` reader - "]
38pub type GC_LNA_HW_R = crate::FieldReader<u8, u8>;
39#[doc = "Field `gc_lna_hw` writer - "]
40pub type GC_LNA_HW_W<'a, const O: u8> =
41    crate::FieldWriter<'a, u32, TRX_GAIN_BW_HW_SPEC, u8, u8, 3, O>;
42#[doc = "Field `gc_rbb1_hw` reader - "]
43pub type GC_RBB1_HW_R = crate::FieldReader<u8, u8>;
44#[doc = "Field `gc_rbb1_hw` writer - "]
45pub type GC_RBB1_HW_W<'a, const O: u8> =
46    crate::FieldWriter<'a, u32, TRX_GAIN_BW_HW_SPEC, u8, u8, 2, O>;
47#[doc = "Field `gc_rbb2_hw` reader - "]
48pub type GC_RBB2_HW_R = crate::FieldReader<u8, u8>;
49#[doc = "Field `gc_rbb2_hw` writer - "]
50pub type GC_RBB2_HW_W<'a, const O: u8> =
51    crate::FieldWriter<'a, u32, TRX_GAIN_BW_HW_SPEC, u8, u8, 3, O>;
52#[doc = "Field `rbb_bw_hw` reader - "]
53pub type RBB_BW_HW_R = crate::BitReader<bool>;
54#[doc = "Field `rbb_bw_hw` writer - "]
55pub type RBB_BW_HW_W<'a, const O: u8> = crate::BitWriter<'a, u32, TRX_GAIN_BW_HW_SPEC, bool, O>;
56#[doc = "Field `pa_ref_dac_hw` reader - "]
57pub type PA_REF_DAC_HW_R = crate::FieldReader<u8, u8>;
58#[doc = "Field `pa_ref_dac_hw` writer - "]
59pub type PA_REF_DAC_HW_W<'a, const O: u8> =
60    crate::FieldWriter<'a, u32, TRX_GAIN_BW_HW_SPEC, u8, u8, 5, O>;
61#[doc = "Field `pa_inbuf_unit_hw` reader - "]
62pub type PA_INBUF_UNIT_HW_R = crate::FieldReader<u8, u8>;
63#[doc = "Field `pa_inbuf_unit_hw` writer - "]
64pub type PA_INBUF_UNIT_HW_W<'a, const O: u8> =
65    crate::FieldWriter<'a, u32, TRX_GAIN_BW_HW_SPEC, u8, u8, 3, O>;
66impl R {
67    #[doc = "Bits 0:2"]
68    #[inline(always)]
69    pub fn gc_lna_hw(&self) -> GC_LNA_HW_R {
70        GC_LNA_HW_R::new((self.bits & 7) as u8)
71    }
72    #[doc = "Bits 3:4"]
73    #[inline(always)]
74    pub fn gc_rbb1_hw(&self) -> GC_RBB1_HW_R {
75        GC_RBB1_HW_R::new(((self.bits >> 3) & 3) as u8)
76    }
77    #[doc = "Bits 5:7"]
78    #[inline(always)]
79    pub fn gc_rbb2_hw(&self) -> GC_RBB2_HW_R {
80        GC_RBB2_HW_R::new(((self.bits >> 5) & 7) as u8)
81    }
82    #[doc = "Bit 8"]
83    #[inline(always)]
84    pub fn rbb_bw_hw(&self) -> RBB_BW_HW_R {
85        RBB_BW_HW_R::new(((self.bits >> 8) & 1) != 0)
86    }
87    #[doc = "Bits 12:16"]
88    #[inline(always)]
89    pub fn pa_ref_dac_hw(&self) -> PA_REF_DAC_HW_R {
90        PA_REF_DAC_HW_R::new(((self.bits >> 12) & 0x1f) as u8)
91    }
92    #[doc = "Bits 20:22"]
93    #[inline(always)]
94    pub fn pa_inbuf_unit_hw(&self) -> PA_INBUF_UNIT_HW_R {
95        PA_INBUF_UNIT_HW_R::new(((self.bits >> 20) & 7) as u8)
96    }
97}
98impl W {
99    #[doc = "Bits 0:2"]
100    #[inline(always)]
101    #[must_use]
102    pub fn gc_lna_hw(&mut self) -> GC_LNA_HW_W<0> {
103        GC_LNA_HW_W::new(self)
104    }
105    #[doc = "Bits 3:4"]
106    #[inline(always)]
107    #[must_use]
108    pub fn gc_rbb1_hw(&mut self) -> GC_RBB1_HW_W<3> {
109        GC_RBB1_HW_W::new(self)
110    }
111    #[doc = "Bits 5:7"]
112    #[inline(always)]
113    #[must_use]
114    pub fn gc_rbb2_hw(&mut self) -> GC_RBB2_HW_W<5> {
115        GC_RBB2_HW_W::new(self)
116    }
117    #[doc = "Bit 8"]
118    #[inline(always)]
119    #[must_use]
120    pub fn rbb_bw_hw(&mut self) -> RBB_BW_HW_W<8> {
121        RBB_BW_HW_W::new(self)
122    }
123    #[doc = "Bits 12:16"]
124    #[inline(always)]
125    #[must_use]
126    pub fn pa_ref_dac_hw(&mut self) -> PA_REF_DAC_HW_W<12> {
127        PA_REF_DAC_HW_W::new(self)
128    }
129    #[doc = "Bits 20:22"]
130    #[inline(always)]
131    #[must_use]
132    pub fn pa_inbuf_unit_hw(&mut self) -> PA_INBUF_UNIT_HW_W<20> {
133        PA_INBUF_UNIT_HW_W::new(self)
134    }
135    #[doc = "Writes raw bits to the register."]
136    #[inline(always)]
137    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
138        self.0.bits(bits);
139        self
140    }
141}
142#[doc = "Hardware read back of TX/RX gain\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [trx_gain_bw_hw](index.html) module"]
143pub struct TRX_GAIN_BW_HW_SPEC;
144impl crate::RegisterSpec for TRX_GAIN_BW_HW_SPEC {
145    type Ux = u32;
146}
147#[doc = "`read()` method returns [trx_gain_bw_hw::R](R) reader structure"]
148impl crate::Readable for TRX_GAIN_BW_HW_SPEC {
149    type Reader = R;
150}
151#[doc = "`write(|w| ..)` method takes [trx_gain_bw_hw::W](W) writer structure"]
152impl crate::Writable for TRX_GAIN_BW_HW_SPEC {
153    type Writer = W;
154    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
155    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
156}
157#[doc = "`reset()` method sets trx_gain_bw_hw to value 0"]
158impl crate::Resettable for TRX_GAIN_BW_HW_SPEC {
159    const RESET_VALUE: Self::Ux = 0;
160}
bl702_pac/rf/trx_gain_bw_hw.rs

bl702_pac/rf/
trx_gain_bw_hw.rs
