bl702_pac/rf/
rf_sram_ctrl0.rs

1#[doc = "Register `rf_sram_ctrl0` reader"]
2pub struct R(crate::R<RF_SRAM_CTRL0_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<RF_SRAM_CTRL0_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<RF_SRAM_CTRL0_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<RF_SRAM_CTRL0_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `rf_sram_ctrl0` writer"]
17pub struct W(crate::W<RF_SRAM_CTRL0_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<RF_SRAM_CTRL0_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<RF_SRAM_CTRL0_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<RF_SRAM_CTRL0_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `rf_sram_done` reader - "]
38pub type RF_SRAM_DONE_R = crate::BitReader<bool>;
39#[doc = "Field `rf_sram_done` writer - "]
40pub type RF_SRAM_DONE_W<'a, const O: u8> = crate::BitWriter<'a, u32, RF_SRAM_CTRL0_SPEC, bool, O>;
41#[doc = "Field `rf_sram_en` reader - "]
42pub type RF_SRAM_EN_R = crate::BitReader<bool>;
43#[doc = "Field `rf_sram_en` writer - "]
44pub type RF_SRAM_EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, RF_SRAM_CTRL0_SPEC, bool, O>;
45#[doc = "Field `rf_sram_loop_en` reader - "]
46pub type RF_SRAM_LOOP_EN_R = crate::BitReader<bool>;
47#[doc = "Field `rf_sram_loop_en` writer - "]
48pub type RF_SRAM_LOOP_EN_W<'a, const O: u8> =
49    crate::BitWriter<'a, u32, RF_SRAM_CTRL0_SPEC, bool, O>;
50#[doc = "Field `rf_sram_sts_clr` reader - "]
51pub type RF_SRAM_STS_CLR_R = crate::BitReader<bool>;
52#[doc = "Field `rf_sram_sts_clr` writer - "]
53pub type RF_SRAM_STS_CLR_W<'a, const O: u8> =
54    crate::BitWriter<'a, u32, RF_SRAM_CTRL0_SPEC, bool, O>;
55#[doc = "Field `rf_sram_mode` reader - "]
56pub type RF_SRAM_MODE_R = crate::FieldReader<u8, u8>;
57#[doc = "Field `rf_sram_mode` writer - "]
58pub type RF_SRAM_MODE_W<'a, const O: u8> =
59    crate::FieldWriter<'a, u32, RF_SRAM_CTRL0_SPEC, u8, u8, 2, O>;
60#[doc = "Field `rf_sram_done_cnt` reader - "]
61pub type RF_SRAM_DONE_CNT_R = crate::FieldReader<u16, u16>;
62#[doc = "Field `rf_sram_done_cnt` writer - "]
63pub type RF_SRAM_DONE_CNT_W<'a, const O: u8> =
64    crate::FieldWriter<'a, u32, RF_SRAM_CTRL0_SPEC, u16, u16, 16, O>;
65impl R {
66    #[doc = "Bit 0"]
67    #[inline(always)]
68    pub fn rf_sram_done(&self) -> RF_SRAM_DONE_R {
69        RF_SRAM_DONE_R::new((self.bits & 1) != 0)
70    }
71    #[doc = "Bit 1"]
72    #[inline(always)]
73    pub fn rf_sram_en(&self) -> RF_SRAM_EN_R {
74        RF_SRAM_EN_R::new(((self.bits >> 1) & 1) != 0)
75    }
76    #[doc = "Bit 2"]
77    #[inline(always)]
78    pub fn rf_sram_loop_en(&self) -> RF_SRAM_LOOP_EN_R {
79        RF_SRAM_LOOP_EN_R::new(((self.bits >> 2) & 1) != 0)
80    }
81    #[doc = "Bit 3"]
82    #[inline(always)]
83    pub fn rf_sram_sts_clr(&self) -> RF_SRAM_STS_CLR_R {
84        RF_SRAM_STS_CLR_R::new(((self.bits >> 3) & 1) != 0)
85    }
86    #[doc = "Bits 4:5"]
87    #[inline(always)]
88    pub fn rf_sram_mode(&self) -> RF_SRAM_MODE_R {
89        RF_SRAM_MODE_R::new(((self.bits >> 4) & 3) as u8)
90    }
91    #[doc = "Bits 16:31"]
92    #[inline(always)]
93    pub fn rf_sram_done_cnt(&self) -> RF_SRAM_DONE_CNT_R {
94        RF_SRAM_DONE_CNT_R::new(((self.bits >> 16) & 0xffff) as u16)
95    }
96}
97impl W {
98    #[doc = "Bit 0"]
99    #[inline(always)]
100    #[must_use]
101    pub fn rf_sram_done(&mut self) -> RF_SRAM_DONE_W<0> {
102        RF_SRAM_DONE_W::new(self)
103    }
104    #[doc = "Bit 1"]
105    #[inline(always)]
106    #[must_use]
107    pub fn rf_sram_en(&mut self) -> RF_SRAM_EN_W<1> {
108        RF_SRAM_EN_W::new(self)
109    }
110    #[doc = "Bit 2"]
111    #[inline(always)]
112    #[must_use]
113    pub fn rf_sram_loop_en(&mut self) -> RF_SRAM_LOOP_EN_W<2> {
114        RF_SRAM_LOOP_EN_W::new(self)
115    }
116    #[doc = "Bit 3"]
117    #[inline(always)]
118    #[must_use]
119    pub fn rf_sram_sts_clr(&mut self) -> RF_SRAM_STS_CLR_W<3> {
120        RF_SRAM_STS_CLR_W::new(self)
121    }
122    #[doc = "Bits 4:5"]
123    #[inline(always)]
124    #[must_use]
125    pub fn rf_sram_mode(&mut self) -> RF_SRAM_MODE_W<4> {
126        RF_SRAM_MODE_W::new(self)
127    }
128    #[doc = "Bits 16:31"]
129    #[inline(always)]
130    #[must_use]
131    pub fn rf_sram_done_cnt(&mut self) -> RF_SRAM_DONE_CNT_W<16> {
132        RF_SRAM_DONE_CNT_W::new(self)
133    }
134    #[doc = "Writes raw bits to the register."]
135    #[inline(always)]
136    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
137        self.0.bits(bits);
138        self
139    }
140}
141#[doc = "rf_sram_ctrl0.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rf_sram_ctrl0](index.html) module"]
142pub struct RF_SRAM_CTRL0_SPEC;
143impl crate::RegisterSpec for RF_SRAM_CTRL0_SPEC {
144    type Ux = u32;
145}
146#[doc = "`read()` method returns [rf_sram_ctrl0::R](R) reader structure"]
147impl crate::Readable for RF_SRAM_CTRL0_SPEC {
148    type Reader = R;
149}
150#[doc = "`write(|w| ..)` method takes [rf_sram_ctrl0::W](W) writer structure"]
151impl crate::Writable for RF_SRAM_CTRL0_SPEC {
152    type Writer = W;
153    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
154    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
155}
156#[doc = "`reset()` method sets rf_sram_ctrl0 to value 0"]
157impl crate::Resettable for RF_SRAM_CTRL0_SPEC {
158    const RESET_VALUE: Self::Ux = 0;
159}
bl702_pac/rf/rf_sram_ctrl0.rs

bl702_pac/rf/
rf_sram_ctrl0.rs
