bl702_pac/rf/
rf_ctrl_source.rs1#[doc = "Register `rf_ctrl_source` reader"]
2pub struct R(crate::R<RF_CTRL_SOURCE_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<RF_CTRL_SOURCE_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<RF_CTRL_SOURCE_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<RF_CTRL_SOURCE_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `rf_ctrl_source` writer"]
17pub struct W(crate::W<RF_CTRL_SOURCE_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<RF_CTRL_SOURCE_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<RF_CTRL_SOURCE_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<RF_CTRL_SOURCE_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Field `pu_ctrl_hw` reader - "]
38pub type PU_CTRL_HW_R = crate::BitReader<bool>;
39#[doc = "Field `pu_ctrl_hw` writer - "]
40pub type PU_CTRL_HW_W<'a, const O: u8> = crate::BitWriter<'a, u32, RF_CTRL_SOURCE_SPEC, bool, O>;
41#[doc = "Field `gain_ctrl_tx_hw` reader - "]
42pub type GAIN_CTRL_TX_HW_R = crate::BitReader<bool>;
43#[doc = "Field `gain_ctrl_tx_hw` writer - "]
44pub type GAIN_CTRL_TX_HW_W<'a, const O: u8> =
45 crate::BitWriter<'a, u32, RF_CTRL_SOURCE_SPEC, bool, O>;
46#[doc = "Field `gain_ctrl_rx_hw` reader - "]
47pub type GAIN_CTRL_RX_HW_R = crate::BitReader<bool>;
48#[doc = "Field `gain_ctrl_rx_hw` writer - "]
49pub type GAIN_CTRL_RX_HW_W<'a, const O: u8> =
50 crate::BitWriter<'a, u32, RF_CTRL_SOURCE_SPEC, bool, O>;
51#[doc = "Field `rosdac_ctrl_hw` reader - "]
52pub type ROSDAC_CTRL_HW_R = crate::BitReader<bool>;
53#[doc = "Field `rosdac_ctrl_hw` writer - "]
54pub type ROSDAC_CTRL_HW_W<'a, const O: u8> =
55 crate::BitWriter<'a, u32, RF_CTRL_SOURCE_SPEC, bool, O>;
56#[doc = "Field `rosdac_ctrl_rccal` reader - "]
57pub type ROSDAC_CTRL_RCCAL_R = crate::BitReader<bool>;
58#[doc = "Field `rosdac_ctrl_rccal` writer - "]
59pub type ROSDAC_CTRL_RCCAL_W<'a, const O: u8> =
60 crate::BitWriter<'a, u32, RF_CTRL_SOURCE_SPEC, bool, O>;
61#[doc = "Field `kcal_ratio_ctrl_hw` reader - "]
62pub type KCAL_RATIO_CTRL_HW_R = crate::BitReader<bool>;
63#[doc = "Field `kcal_ratio_ctrl_hw` writer - "]
64pub type KCAL_RATIO_CTRL_HW_W<'a, const O: u8> =
65 crate::BitWriter<'a, u32, RF_CTRL_SOURCE_SPEC, bool, O>;
66#[doc = "Field `rbb_bw_ctrl_hw` reader - "]
67pub type RBB_BW_CTRL_HW_R = crate::BitReader<bool>;
68#[doc = "Field `rbb_bw_ctrl_hw` writer - "]
69pub type RBB_BW_CTRL_HW_W<'a, const O: u8> =
70 crate::BitWriter<'a, u32, RF_CTRL_SOURCE_SPEC, bool, O>;
71#[doc = "Field `lo_fcw_ctrl_hw` reader - "]
72pub type LO_FCW_CTRL_HW_R = crate::BitReader<bool>;
73#[doc = "Field `lo_fcw_ctrl_hw` writer - "]
74pub type LO_FCW_CTRL_HW_W<'a, const O: u8> =
75 crate::BitWriter<'a, u32, RF_CTRL_SOURCE_SPEC, bool, O>;
76#[doc = "Field `inc_fcal_en_ctrl_hw` reader - "]
77pub type INC_FCAL_EN_CTRL_HW_R = crate::BitReader<bool>;
78#[doc = "Field `inc_fcal_en_ctrl_hw` writer - "]
79pub type INC_FCAL_EN_CTRL_HW_W<'a, const O: u8> =
80 crate::BitWriter<'a, u32, RF_CTRL_SOURCE_SPEC, bool, O>;
81#[doc = "Field `vco_idac_ctrl_hw` reader - "]
82pub type VCO_IDAC_CTRL_HW_R = crate::BitReader<bool>;
83#[doc = "Field `vco_idac_ctrl_hw` writer - "]
84pub type VCO_IDAC_CTRL_HW_W<'a, const O: u8> =
85 crate::BitWriter<'a, u32, RF_CTRL_SOURCE_SPEC, bool, O>;
86impl R {
87 #[doc = "Bit 0"]
88 #[inline(always)]
89 pub fn pu_ctrl_hw(&self) -> PU_CTRL_HW_R {
90 PU_CTRL_HW_R::new((self.bits & 1) != 0)
91 }
92 #[doc = "Bit 3"]
93 #[inline(always)]
94 pub fn gain_ctrl_tx_hw(&self) -> GAIN_CTRL_TX_HW_R {
95 GAIN_CTRL_TX_HW_R::new(((self.bits >> 3) & 1) != 0)
96 }
97 #[doc = "Bit 4"]
98 #[inline(always)]
99 pub fn gain_ctrl_rx_hw(&self) -> GAIN_CTRL_RX_HW_R {
100 GAIN_CTRL_RX_HW_R::new(((self.bits >> 4) & 1) != 0)
101 }
102 #[doc = "Bit 8"]
103 #[inline(always)]
104 pub fn rosdac_ctrl_hw(&self) -> ROSDAC_CTRL_HW_R {
105 ROSDAC_CTRL_HW_R::new(((self.bits >> 8) & 1) != 0)
106 }
107 #[doc = "Bit 9"]
108 #[inline(always)]
109 pub fn rosdac_ctrl_rccal(&self) -> ROSDAC_CTRL_RCCAL_R {
110 ROSDAC_CTRL_RCCAL_R::new(((self.bits >> 9) & 1) != 0)
111 }
112 #[doc = "Bit 12"]
113 #[inline(always)]
114 pub fn kcal_ratio_ctrl_hw(&self) -> KCAL_RATIO_CTRL_HW_R {
115 KCAL_RATIO_CTRL_HW_R::new(((self.bits >> 12) & 1) != 0)
116 }
117 #[doc = "Bit 16"]
118 #[inline(always)]
119 pub fn rbb_bw_ctrl_hw(&self) -> RBB_BW_CTRL_HW_R {
120 RBB_BW_CTRL_HW_R::new(((self.bits >> 16) & 1) != 0)
121 }
122 #[doc = "Bit 20"]
123 #[inline(always)]
124 pub fn lo_fcw_ctrl_hw(&self) -> LO_FCW_CTRL_HW_R {
125 LO_FCW_CTRL_HW_R::new(((self.bits >> 20) & 1) != 0)
126 }
127 #[doc = "Bit 24"]
128 #[inline(always)]
129 pub fn inc_fcal_en_ctrl_hw(&self) -> INC_FCAL_EN_CTRL_HW_R {
130 INC_FCAL_EN_CTRL_HW_R::new(((self.bits >> 24) & 1) != 0)
131 }
132 #[doc = "Bit 28"]
133 #[inline(always)]
134 pub fn vco_idac_ctrl_hw(&self) -> VCO_IDAC_CTRL_HW_R {
135 VCO_IDAC_CTRL_HW_R::new(((self.bits >> 28) & 1) != 0)
136 }
137}
138impl W {
139 #[doc = "Bit 0"]
140 #[inline(always)]
141 #[must_use]
142 pub fn pu_ctrl_hw(&mut self) -> PU_CTRL_HW_W<0> {
143 PU_CTRL_HW_W::new(self)
144 }
145 #[doc = "Bit 3"]
146 #[inline(always)]
147 #[must_use]
148 pub fn gain_ctrl_tx_hw(&mut self) -> GAIN_CTRL_TX_HW_W<3> {
149 GAIN_CTRL_TX_HW_W::new(self)
150 }
151 #[doc = "Bit 4"]
152 #[inline(always)]
153 #[must_use]
154 pub fn gain_ctrl_rx_hw(&mut self) -> GAIN_CTRL_RX_HW_W<4> {
155 GAIN_CTRL_RX_HW_W::new(self)
156 }
157 #[doc = "Bit 8"]
158 #[inline(always)]
159 #[must_use]
160 pub fn rosdac_ctrl_hw(&mut self) -> ROSDAC_CTRL_HW_W<8> {
161 ROSDAC_CTRL_HW_W::new(self)
162 }
163 #[doc = "Bit 9"]
164 #[inline(always)]
165 #[must_use]
166 pub fn rosdac_ctrl_rccal(&mut self) -> ROSDAC_CTRL_RCCAL_W<9> {
167 ROSDAC_CTRL_RCCAL_W::new(self)
168 }
169 #[doc = "Bit 12"]
170 #[inline(always)]
171 #[must_use]
172 pub fn kcal_ratio_ctrl_hw(&mut self) -> KCAL_RATIO_CTRL_HW_W<12> {
173 KCAL_RATIO_CTRL_HW_W::new(self)
174 }
175 #[doc = "Bit 16"]
176 #[inline(always)]
177 #[must_use]
178 pub fn rbb_bw_ctrl_hw(&mut self) -> RBB_BW_CTRL_HW_W<16> {
179 RBB_BW_CTRL_HW_W::new(self)
180 }
181 #[doc = "Bit 20"]
182 #[inline(always)]
183 #[must_use]
184 pub fn lo_fcw_ctrl_hw(&mut self) -> LO_FCW_CTRL_HW_W<20> {
185 LO_FCW_CTRL_HW_W::new(self)
186 }
187 #[doc = "Bit 24"]
188 #[inline(always)]
189 #[must_use]
190 pub fn inc_fcal_en_ctrl_hw(&mut self) -> INC_FCAL_EN_CTRL_HW_W<24> {
191 INC_FCAL_EN_CTRL_HW_W::new(self)
192 }
193 #[doc = "Bit 28"]
194 #[inline(always)]
195 #[must_use]
196 pub fn vco_idac_ctrl_hw(&mut self) -> VCO_IDAC_CTRL_HW_W<28> {
197 VCO_IDAC_CTRL_HW_W::new(self)
198 }
199 #[doc = "Writes raw bits to the register."]
200 #[inline(always)]
201 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
202 self.0.bits(bits);
203 self
204 }
205}
206#[doc = "Control logic switch\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rf_ctrl_source](index.html) module"]
207pub struct RF_CTRL_SOURCE_SPEC;
208impl crate::RegisterSpec for RF_CTRL_SOURCE_SPEC {
209 type Ux = u32;
210}
211#[doc = "`read()` method returns [rf_ctrl_source::R](R) reader structure"]
212impl crate::Readable for RF_CTRL_SOURCE_SPEC {
213 type Reader = R;
214}
215#[doc = "`write(|w| ..)` method takes [rf_ctrl_source::W](W) writer structure"]
216impl crate::Writable for RF_CTRL_SOURCE_SPEC {
217 type Writer = W;
218 const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
219 const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
220}
221#[doc = "`reset()` method sets rf_ctrl_source to value 0"]
222impl crate::Resettable for RF_CTRL_SOURCE_SPEC {
223 const RESET_VALUE: Self::Ux = 0;
224}