1#[doc = "Register `adpll_output` reader"]
2pub struct R(crate::R<ADPLL_OUTPUT_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<ADPLL_OUTPUT_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<ADPLL_OUTPUT_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<ADPLL_OUTPUT_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `adpll_output` writer"]
17pub struct W(crate::W<ADPLL_OUTPUT_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<ADPLL_OUTPUT_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<ADPLL_OUTPUT_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<ADPLL_OUTPUT_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Field `adpll_unlock_intrpt` reader - "]
38pub type ADPLL_UNLOCK_INTRPT_R = crate::BitReader<bool>;
39#[doc = "Field `adpll_unlock_intrpt` writer - "]
40pub type ADPLL_UNLOCK_INTRPT_W<'a, const O: u8> =
41 crate::BitWriter<'a, u32, ADPLL_OUTPUT_SPEC, bool, O>;
42#[doc = "Field `adpll_lo_lock` reader - "]
43pub type ADPLL_LO_LOCK_R = crate::BitReader<bool>;
44#[doc = "Field `adpll_lo_lock` writer - "]
45pub type ADPLL_LO_LOCK_W<'a, const O: u8> = crate::BitWriter<'a, u32, ADPLL_OUTPUT_SPEC, bool, O>;
46#[doc = "Field `adpll_fsm_state` reader - "]
47pub type ADPLL_FSM_STATE_R = crate::FieldReader<u8, u8>;
48#[doc = "Field `adpll_fsm_state` writer - "]
49pub type ADPLL_FSM_STATE_W<'a, const O: u8> =
50 crate::FieldWriter<'a, u32, ADPLL_OUTPUT_SPEC, u8, u8, 4, O>;
51#[doc = "Field `adpll_spd_unlock_sign` reader - "]
52pub type ADPLL_SPD_UNLOCK_SIGN_R = crate::BitReader<bool>;
53#[doc = "Field `adpll_spd_unlock_sign` writer - "]
54pub type ADPLL_SPD_UNLOCK_SIGN_W<'a, const O: u8> =
55 crate::BitWriter<'a, u32, ADPLL_OUTPUT_SPEC, bool, O>;
56#[doc = "Field `adpll_vctrl_out_range_fsm` reader - "]
57pub type ADPLL_VCTRL_OUT_RANGE_FSM_R = crate::BitReader<bool>;
58#[doc = "Field `adpll_vctrl_out_range_fsm` writer - "]
59pub type ADPLL_VCTRL_OUT_RANGE_FSM_W<'a, const O: u8> =
60 crate::BitWriter<'a, u32, ADPLL_OUTPUT_SPEC, bool, O>;
61#[doc = "Field `adpll_mom_update_fail_fsm` reader - "]
62pub type ADPLL_MOM_UPDATE_FAIL_FSM_R = crate::BitReader<bool>;
63#[doc = "Field `adpll_mom_update_fail_fsm` writer - "]
64pub type ADPLL_MOM_UPDATE_FAIL_FSM_W<'a, const O: u8> =
65 crate::BitWriter<'a, u32, ADPLL_OUTPUT_SPEC, bool, O>;
66#[doc = "Field `adpll_mom_update_ou_fsm` reader - "]
67pub type ADPLL_MOM_UPDATE_OU_FSM_R = crate::BitReader<bool>;
68#[doc = "Field `adpll_mom_update_ou_fsm` writer - "]
69pub type ADPLL_MOM_UPDATE_OU_FSM_W<'a, const O: u8> =
70 crate::BitWriter<'a, u32, ADPLL_OUTPUT_SPEC, bool, O>;
71#[doc = "Field `adpll_spd_unlock_fsm` reader - "]
72pub type ADPLL_SPD_UNLOCK_FSM_R = crate::BitReader<bool>;
73#[doc = "Field `adpll_spd_unlock_fsm` writer - "]
74pub type ADPLL_SPD_UNLOCK_FSM_W<'a, const O: u8> =
75 crate::BitWriter<'a, u32, ADPLL_OUTPUT_SPEC, bool, O>;
76#[doc = "Field `adpll_spd_lock_fsm` reader - "]
77pub type ADPLL_SPD_LOCK_FSM_R = crate::BitReader<bool>;
78#[doc = "Field `adpll_spd_lock_fsm` writer - "]
79pub type ADPLL_SPD_LOCK_FSM_W<'a, const O: u8> =
80 crate::BitWriter<'a, u32, ADPLL_OUTPUT_SPEC, bool, O>;
81#[doc = "Field `adpll_fcal_done_fsm` reader - "]
82pub type ADPLL_FCAL_DONE_FSM_R = crate::BitReader<bool>;
83#[doc = "Field `adpll_fcal_done_fsm` writer - "]
84pub type ADPLL_FCAL_DONE_FSM_W<'a, const O: u8> =
85 crate::BitWriter<'a, u32, ADPLL_OUTPUT_SPEC, bool, O>;
86#[doc = "Field `adpll_capcode_out_range` reader - "]
87pub type ADPLL_CAPCODE_OUT_RANGE_R = crate::BitReader<bool>;
88#[doc = "Field `adpll_capcode_out_range` writer - "]
89pub type ADPLL_CAPCODE_OUT_RANGE_W<'a, const O: u8> =
90 crate::BitWriter<'a, u32, ADPLL_OUTPUT_SPEC, bool, O>;
91#[doc = "Field `adpll_mom_update_total_ou` reader - "]
92pub type ADPLL_MOM_UPDATE_TOTAL_OU_R = crate::FieldReader<u8, u8>;
93#[doc = "Field `adpll_mom_update_total_ou` writer - "]
94pub type ADPLL_MOM_UPDATE_TOTAL_OU_W<'a, const O: u8> =
95 crate::FieldWriter<'a, u32, ADPLL_OUTPUT_SPEC, u8, u8, 2, O>;
96#[doc = "Field `adpll_capcode_ud` reader - "]
97pub type ADPLL_CAPCODE_UD_R = crate::BitReader<bool>;
98#[doc = "Field `adpll_capcode_ud` writer - "]
99pub type ADPLL_CAPCODE_UD_W<'a, const O: u8> =
100 crate::BitWriter<'a, u32, ADPLL_OUTPUT_SPEC, bool, O>;
101#[doc = "Field `adpll_vctrl_det_done` reader - "]
102pub type ADPLL_VCTRL_DET_DONE_R = crate::BitReader<bool>;
103#[doc = "Field `adpll_vctrl_det_done` writer - "]
104pub type ADPLL_VCTRL_DET_DONE_W<'a, const O: u8> =
105 crate::BitWriter<'a, u32, ADPLL_OUTPUT_SPEC, bool, O>;
106#[doc = "Field `adpll_freqerr_sign` reader - "]
107pub type ADPLL_FREQERR_SIGN_R = crate::BitReader<bool>;
108#[doc = "Field `adpll_freqerr_sign` writer - "]
109pub type ADPLL_FREQERR_SIGN_W<'a, const O: u8> =
110 crate::BitWriter<'a, u32, ADPLL_OUTPUT_SPEC, bool, O>;
111#[doc = "Field `adpll_freqerr_ou` reader - "]
112pub type ADPLL_FREQERR_OU_R = crate::BitReader<bool>;
113#[doc = "Field `adpll_freqerr_ou` writer - "]
114pub type ADPLL_FREQERR_OU_W<'a, const O: u8> =
115 crate::BitWriter<'a, u32, ADPLL_OUTPUT_SPEC, bool, O>;
116#[doc = "Field `adpll_freqerr_det_done` reader - "]
117pub type ADPLL_FREQERR_DET_DONE_R = crate::BitReader<bool>;
118#[doc = "Field `adpll_freqerr_det_done` writer - "]
119pub type ADPLL_FREQERR_DET_DONE_W<'a, const O: u8> =
120 crate::BitWriter<'a, u32, ADPLL_OUTPUT_SPEC, bool, O>;
121impl R {
122 #[doc = "Bit 0"]
123 #[inline(always)]
124 pub fn adpll_unlock_intrpt(&self) -> ADPLL_UNLOCK_INTRPT_R {
125 ADPLL_UNLOCK_INTRPT_R::new((self.bits & 1) != 0)
126 }
127 #[doc = "Bit 1"]
128 #[inline(always)]
129 pub fn adpll_lo_lock(&self) -> ADPLL_LO_LOCK_R {
130 ADPLL_LO_LOCK_R::new(((self.bits >> 1) & 1) != 0)
131 }
132 #[doc = "Bits 3:6"]
133 #[inline(always)]
134 pub fn adpll_fsm_state(&self) -> ADPLL_FSM_STATE_R {
135 ADPLL_FSM_STATE_R::new(((self.bits >> 3) & 0x0f) as u8)
136 }
137 #[doc = "Bit 7"]
138 #[inline(always)]
139 pub fn adpll_spd_unlock_sign(&self) -> ADPLL_SPD_UNLOCK_SIGN_R {
140 ADPLL_SPD_UNLOCK_SIGN_R::new(((self.bits >> 7) & 1) != 0)
141 }
142 #[doc = "Bit 8"]
143 #[inline(always)]
144 pub fn adpll_vctrl_out_range_fsm(&self) -> ADPLL_VCTRL_OUT_RANGE_FSM_R {
145 ADPLL_VCTRL_OUT_RANGE_FSM_R::new(((self.bits >> 8) & 1) != 0)
146 }
147 #[doc = "Bit 9"]
148 #[inline(always)]
149 pub fn adpll_mom_update_fail_fsm(&self) -> ADPLL_MOM_UPDATE_FAIL_FSM_R {
150 ADPLL_MOM_UPDATE_FAIL_FSM_R::new(((self.bits >> 9) & 1) != 0)
151 }
152 #[doc = "Bit 10"]
153 #[inline(always)]
154 pub fn adpll_mom_update_ou_fsm(&self) -> ADPLL_MOM_UPDATE_OU_FSM_R {
155 ADPLL_MOM_UPDATE_OU_FSM_R::new(((self.bits >> 10) & 1) != 0)
156 }
157 #[doc = "Bit 11"]
158 #[inline(always)]
159 pub fn adpll_spd_unlock_fsm(&self) -> ADPLL_SPD_UNLOCK_FSM_R {
160 ADPLL_SPD_UNLOCK_FSM_R::new(((self.bits >> 11) & 1) != 0)
161 }
162 #[doc = "Bit 12"]
163 #[inline(always)]
164 pub fn adpll_spd_lock_fsm(&self) -> ADPLL_SPD_LOCK_FSM_R {
165 ADPLL_SPD_LOCK_FSM_R::new(((self.bits >> 12) & 1) != 0)
166 }
167 #[doc = "Bit 13"]
168 #[inline(always)]
169 pub fn adpll_fcal_done_fsm(&self) -> ADPLL_FCAL_DONE_FSM_R {
170 ADPLL_FCAL_DONE_FSM_R::new(((self.bits >> 13) & 1) != 0)
171 }
172 #[doc = "Bit 14"]
173 #[inline(always)]
174 pub fn adpll_capcode_out_range(&self) -> ADPLL_CAPCODE_OUT_RANGE_R {
175 ADPLL_CAPCODE_OUT_RANGE_R::new(((self.bits >> 14) & 1) != 0)
176 }
177 #[doc = "Bits 15:16"]
178 #[inline(always)]
179 pub fn adpll_mom_update_total_ou(&self) -> ADPLL_MOM_UPDATE_TOTAL_OU_R {
180 ADPLL_MOM_UPDATE_TOTAL_OU_R::new(((self.bits >> 15) & 3) as u8)
181 }
182 #[doc = "Bit 17"]
183 #[inline(always)]
184 pub fn adpll_capcode_ud(&self) -> ADPLL_CAPCODE_UD_R {
185 ADPLL_CAPCODE_UD_R::new(((self.bits >> 17) & 1) != 0)
186 }
187 #[doc = "Bit 18"]
188 #[inline(always)]
189 pub fn adpll_vctrl_det_done(&self) -> ADPLL_VCTRL_DET_DONE_R {
190 ADPLL_VCTRL_DET_DONE_R::new(((self.bits >> 18) & 1) != 0)
191 }
192 #[doc = "Bit 19"]
193 #[inline(always)]
194 pub fn adpll_freqerr_sign(&self) -> ADPLL_FREQERR_SIGN_R {
195 ADPLL_FREQERR_SIGN_R::new(((self.bits >> 19) & 1) != 0)
196 }
197 #[doc = "Bit 20"]
198 #[inline(always)]
199 pub fn adpll_freqerr_ou(&self) -> ADPLL_FREQERR_OU_R {
200 ADPLL_FREQERR_OU_R::new(((self.bits >> 20) & 1) != 0)
201 }
202 #[doc = "Bit 21"]
203 #[inline(always)]
204 pub fn adpll_freqerr_det_done(&self) -> ADPLL_FREQERR_DET_DONE_R {
205 ADPLL_FREQERR_DET_DONE_R::new(((self.bits >> 21) & 1) != 0)
206 }
207}
208impl W {
209 #[doc = "Bit 0"]
210 #[inline(always)]
211 #[must_use]
212 pub fn adpll_unlock_intrpt(&mut self) -> ADPLL_UNLOCK_INTRPT_W<0> {
213 ADPLL_UNLOCK_INTRPT_W::new(self)
214 }
215 #[doc = "Bit 1"]
216 #[inline(always)]
217 #[must_use]
218 pub fn adpll_lo_lock(&mut self) -> ADPLL_LO_LOCK_W<1> {
219 ADPLL_LO_LOCK_W::new(self)
220 }
221 #[doc = "Bits 3:6"]
222 #[inline(always)]
223 #[must_use]
224 pub fn adpll_fsm_state(&mut self) -> ADPLL_FSM_STATE_W<3> {
225 ADPLL_FSM_STATE_W::new(self)
226 }
227 #[doc = "Bit 7"]
228 #[inline(always)]
229 #[must_use]
230 pub fn adpll_spd_unlock_sign(&mut self) -> ADPLL_SPD_UNLOCK_SIGN_W<7> {
231 ADPLL_SPD_UNLOCK_SIGN_W::new(self)
232 }
233 #[doc = "Bit 8"]
234 #[inline(always)]
235 #[must_use]
236 pub fn adpll_vctrl_out_range_fsm(&mut self) -> ADPLL_VCTRL_OUT_RANGE_FSM_W<8> {
237 ADPLL_VCTRL_OUT_RANGE_FSM_W::new(self)
238 }
239 #[doc = "Bit 9"]
240 #[inline(always)]
241 #[must_use]
242 pub fn adpll_mom_update_fail_fsm(&mut self) -> ADPLL_MOM_UPDATE_FAIL_FSM_W<9> {
243 ADPLL_MOM_UPDATE_FAIL_FSM_W::new(self)
244 }
245 #[doc = "Bit 10"]
246 #[inline(always)]
247 #[must_use]
248 pub fn adpll_mom_update_ou_fsm(&mut self) -> ADPLL_MOM_UPDATE_OU_FSM_W<10> {
249 ADPLL_MOM_UPDATE_OU_FSM_W::new(self)
250 }
251 #[doc = "Bit 11"]
252 #[inline(always)]
253 #[must_use]
254 pub fn adpll_spd_unlock_fsm(&mut self) -> ADPLL_SPD_UNLOCK_FSM_W<11> {
255 ADPLL_SPD_UNLOCK_FSM_W::new(self)
256 }
257 #[doc = "Bit 12"]
258 #[inline(always)]
259 #[must_use]
260 pub fn adpll_spd_lock_fsm(&mut self) -> ADPLL_SPD_LOCK_FSM_W<12> {
261 ADPLL_SPD_LOCK_FSM_W::new(self)
262 }
263 #[doc = "Bit 13"]
264 #[inline(always)]
265 #[must_use]
266 pub fn adpll_fcal_done_fsm(&mut self) -> ADPLL_FCAL_DONE_FSM_W<13> {
267 ADPLL_FCAL_DONE_FSM_W::new(self)
268 }
269 #[doc = "Bit 14"]
270 #[inline(always)]
271 #[must_use]
272 pub fn adpll_capcode_out_range(&mut self) -> ADPLL_CAPCODE_OUT_RANGE_W<14> {
273 ADPLL_CAPCODE_OUT_RANGE_W::new(self)
274 }
275 #[doc = "Bits 15:16"]
276 #[inline(always)]
277 #[must_use]
278 pub fn adpll_mom_update_total_ou(&mut self) -> ADPLL_MOM_UPDATE_TOTAL_OU_W<15> {
279 ADPLL_MOM_UPDATE_TOTAL_OU_W::new(self)
280 }
281 #[doc = "Bit 17"]
282 #[inline(always)]
283 #[must_use]
284 pub fn adpll_capcode_ud(&mut self) -> ADPLL_CAPCODE_UD_W<17> {
285 ADPLL_CAPCODE_UD_W::new(self)
286 }
287 #[doc = "Bit 18"]
288 #[inline(always)]
289 #[must_use]
290 pub fn adpll_vctrl_det_done(&mut self) -> ADPLL_VCTRL_DET_DONE_W<18> {
291 ADPLL_VCTRL_DET_DONE_W::new(self)
292 }
293 #[doc = "Bit 19"]
294 #[inline(always)]
295 #[must_use]
296 pub fn adpll_freqerr_sign(&mut self) -> ADPLL_FREQERR_SIGN_W<19> {
297 ADPLL_FREQERR_SIGN_W::new(self)
298 }
299 #[doc = "Bit 20"]
300 #[inline(always)]
301 #[must_use]
302 pub fn adpll_freqerr_ou(&mut self) -> ADPLL_FREQERR_OU_W<20> {
303 ADPLL_FREQERR_OU_W::new(self)
304 }
305 #[doc = "Bit 21"]
306 #[inline(always)]
307 #[must_use]
308 pub fn adpll_freqerr_det_done(&mut self) -> ADPLL_FREQERR_DET_DONE_W<21> {
309 ADPLL_FREQERR_DET_DONE_W::new(self)
310 }
311 #[doc = "Writes raw bits to the register."]
312 #[inline(always)]
313 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
314 self.0.bits(bits);
315 self
316 }
317}
318#[doc = "adpll_output.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [adpll_output](index.html) module"]
319pub struct ADPLL_OUTPUT_SPEC;
320impl crate::RegisterSpec for ADPLL_OUTPUT_SPEC {
321 type Ux = u32;
322}
323#[doc = "`read()` method returns [adpll_output::R](R) reader structure"]
324impl crate::Readable for ADPLL_OUTPUT_SPEC {
325 type Reader = R;
326}
327#[doc = "`write(|w| ..)` method takes [adpll_output::W](W) writer structure"]
328impl crate::Writable for ADPLL_OUTPUT_SPEC {
329 type Writer = W;
330 const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
331 const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
332}
333#[doc = "`reset()` method sets adpll_output to value 0"]
334impl crate::Resettable for ADPLL_OUTPUT_SPEC {
335 const RESET_VALUE: Self::Ux = 0;
336}