1#[doc = "Register `adpll_lms` reader"]
2pub struct R(crate::R<ADPLL_LMS_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<ADPLL_LMS_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<ADPLL_LMS_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<ADPLL_LMS_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `adpll_lms` writer"]
17pub struct W(crate::W<ADPLL_LMS_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<ADPLL_LMS_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<ADPLL_LMS_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<ADPLL_LMS_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Field `adpll_pha_cancel_delay` reader - "]
38pub type ADPLL_PHA_CANCEL_DELAY_R = crate::FieldReader<u8, u8>;
39#[doc = "Field `adpll_pha_cancel_delay` writer - "]
40pub type ADPLL_PHA_CANCEL_DELAY_W<'a, const O: u8> =
41 crate::FieldWriter<'a, u32, ADPLL_LMS_SPEC, u8, u8, 2, O>;
42#[doc = "Field `adpll_pha_cancel_en` reader - "]
43pub type ADPLL_PHA_CANCEL_EN_R = crate::BitReader<bool>;
44#[doc = "Field `adpll_pha_cancel_en` writer - "]
45pub type ADPLL_PHA_CANCEL_EN_W<'a, const O: u8> =
46 crate::BitWriter<'a, u32, ADPLL_LMS_SPEC, bool, O>;
47#[doc = "Field `adpll_lms_q_delay` reader - "]
48pub type ADPLL_LMS_Q_DELAY_R = crate::FieldReader<u8, u8>;
49#[doc = "Field `adpll_lms_q_delay` writer - "]
50pub type ADPLL_LMS_Q_DELAY_W<'a, const O: u8> =
51 crate::FieldWriter<'a, u32, ADPLL_LMS_SPEC, u8, u8, 2, O>;
52#[doc = "Field `adpll_pha_prbs_sel` reader - "]
53pub type ADPLL_PHA_PRBS_SEL_R = crate::FieldReader<u8, u8>;
54#[doc = "Field `adpll_pha_prbs_sel` writer - "]
55pub type ADPLL_PHA_PRBS_SEL_W<'a, const O: u8> =
56 crate::FieldWriter<'a, u32, ADPLL_LMS_SPEC, u8, u8, 2, O>;
57#[doc = "Field `adpll_lms_step_enlarge` reader - "]
58pub type ADPLL_LMS_STEP_ENLARGE_R = crate::BitReader<bool>;
59#[doc = "Field `adpll_lms_step_enlarge` writer - "]
60pub type ADPLL_LMS_STEP_ENLARGE_W<'a, const O: u8> =
61 crate::BitWriter<'a, u32, ADPLL_LMS_SPEC, bool, O>;
62#[doc = "Field `adpll_pha_dither_en` reader - "]
63pub type ADPLL_PHA_DITHER_EN_R = crate::BitReader<bool>;
64#[doc = "Field `adpll_pha_dither_en` writer - "]
65pub type ADPLL_PHA_DITHER_EN_W<'a, const O: u8> =
66 crate::BitWriter<'a, u32, ADPLL_LMS_SPEC, bool, O>;
67#[doc = "Field `adpll_pha_dem_en` reader - "]
68pub type ADPLL_PHA_DEM_EN_R = crate::BitReader<bool>;
69#[doc = "Field `adpll_pha_dem_en` writer - "]
70pub type ADPLL_PHA_DEM_EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, ADPLL_LMS_SPEC, bool, O>;
71#[doc = "Field `adpll_sdm_dither_prbs_en` reader - "]
72pub type ADPLL_SDM_DITHER_PRBS_EN_R = crate::BitReader<bool>;
73#[doc = "Field `adpll_sdm_dither_prbs_en` writer - "]
74pub type ADPLL_SDM_DITHER_PRBS_EN_W<'a, const O: u8> =
75 crate::BitWriter<'a, u32, ADPLL_LMS_SPEC, bool, O>;
76#[doc = "Field `adpll_lms_step` reader - "]
77pub type ADPLL_LMS_STEP_R = crate::FieldReader<u8, u8>;
78#[doc = "Field `adpll_lms_step` writer - "]
79pub type ADPLL_LMS_STEP_W<'a, const O: u8> =
80 crate::FieldWriter<'a, u32, ADPLL_LMS_SPEC, u8, u8, 2, O>;
81#[doc = "Field `adpll_sdm_dither_en_ctrl_hw` reader - "]
82pub type ADPLL_SDM_DITHER_EN_CTRL_HW_R = crate::BitReader<bool>;
83#[doc = "Field `adpll_sdm_dither_en_ctrl_hw` writer - "]
84pub type ADPLL_SDM_DITHER_EN_CTRL_HW_W<'a, const O: u8> =
85 crate::BitWriter<'a, u32, ADPLL_LMS_SPEC, bool, O>;
86#[doc = "Field `adpll_sdm_dither_en` reader - "]
87pub type ADPLL_SDM_DITHER_EN_R = crate::BitReader<bool>;
88#[doc = "Field `adpll_sdm_dither_en` writer - "]
89pub type ADPLL_SDM_DITHER_EN_W<'a, const O: u8> =
90 crate::BitWriter<'a, u32, ADPLL_LMS_SPEC, bool, O>;
91#[doc = "Field `adpll_lms_ext_value` reader - "]
92pub type ADPLL_LMS_EXT_VALUE_R = crate::FieldReader<u16, u16>;
93#[doc = "Field `adpll_lms_ext_value` writer - "]
94pub type ADPLL_LMS_EXT_VALUE_W<'a, const O: u8> =
95 crate::FieldWriter<'a, u32, ADPLL_LMS_SPEC, u16, u16, 9, O>;
96#[doc = "Field `adpll_lms_ext_value_en` reader - "]
97pub type ADPLL_LMS_EXT_VALUE_EN_R = crate::BitReader<bool>;
98#[doc = "Field `adpll_lms_ext_value_en` writer - "]
99pub type ADPLL_LMS_EXT_VALUE_EN_W<'a, const O: u8> =
100 crate::BitWriter<'a, u32, ADPLL_LMS_SPEC, bool, O>;
101#[doc = "Field `adpll_fref_div2_en` reader - "]
102pub type ADPLL_FREF_DIV2_EN_R = crate::BitReader<bool>;
103#[doc = "Field `adpll_fref_div2_en` writer - "]
104pub type ADPLL_FREF_DIV2_EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, ADPLL_LMS_SPEC, bool, O>;
105impl R {
106 #[doc = "Bits 0:1"]
107 #[inline(always)]
108 pub fn adpll_pha_cancel_delay(&self) -> ADPLL_PHA_CANCEL_DELAY_R {
109 ADPLL_PHA_CANCEL_DELAY_R::new((self.bits & 3) as u8)
110 }
111 #[doc = "Bit 4"]
112 #[inline(always)]
113 pub fn adpll_pha_cancel_en(&self) -> ADPLL_PHA_CANCEL_EN_R {
114 ADPLL_PHA_CANCEL_EN_R::new(((self.bits >> 4) & 1) != 0)
115 }
116 #[doc = "Bits 8:9"]
117 #[inline(always)]
118 pub fn adpll_lms_q_delay(&self) -> ADPLL_LMS_Q_DELAY_R {
119 ADPLL_LMS_Q_DELAY_R::new(((self.bits >> 8) & 3) as u8)
120 }
121 #[doc = "Bits 10:11"]
122 #[inline(always)]
123 pub fn adpll_pha_prbs_sel(&self) -> ADPLL_PHA_PRBS_SEL_R {
124 ADPLL_PHA_PRBS_SEL_R::new(((self.bits >> 10) & 3) as u8)
125 }
126 #[doc = "Bit 12"]
127 #[inline(always)]
128 pub fn adpll_lms_step_enlarge(&self) -> ADPLL_LMS_STEP_ENLARGE_R {
129 ADPLL_LMS_STEP_ENLARGE_R::new(((self.bits >> 12) & 1) != 0)
130 }
131 #[doc = "Bit 13"]
132 #[inline(always)]
133 pub fn adpll_pha_dither_en(&self) -> ADPLL_PHA_DITHER_EN_R {
134 ADPLL_PHA_DITHER_EN_R::new(((self.bits >> 13) & 1) != 0)
135 }
136 #[doc = "Bit 14"]
137 #[inline(always)]
138 pub fn adpll_pha_dem_en(&self) -> ADPLL_PHA_DEM_EN_R {
139 ADPLL_PHA_DEM_EN_R::new(((self.bits >> 14) & 1) != 0)
140 }
141 #[doc = "Bit 15"]
142 #[inline(always)]
143 pub fn adpll_sdm_dither_prbs_en(&self) -> ADPLL_SDM_DITHER_PRBS_EN_R {
144 ADPLL_SDM_DITHER_PRBS_EN_R::new(((self.bits >> 15) & 1) != 0)
145 }
146 #[doc = "Bits 16:17"]
147 #[inline(always)]
148 pub fn adpll_lms_step(&self) -> ADPLL_LMS_STEP_R {
149 ADPLL_LMS_STEP_R::new(((self.bits >> 16) & 3) as u8)
150 }
151 #[doc = "Bit 18"]
152 #[inline(always)]
153 pub fn adpll_sdm_dither_en_ctrl_hw(&self) -> ADPLL_SDM_DITHER_EN_CTRL_HW_R {
154 ADPLL_SDM_DITHER_EN_CTRL_HW_R::new(((self.bits >> 18) & 1) != 0)
155 }
156 #[doc = "Bit 19"]
157 #[inline(always)]
158 pub fn adpll_sdm_dither_en(&self) -> ADPLL_SDM_DITHER_EN_R {
159 ADPLL_SDM_DITHER_EN_R::new(((self.bits >> 19) & 1) != 0)
160 }
161 #[doc = "Bits 20:28"]
162 #[inline(always)]
163 pub fn adpll_lms_ext_value(&self) -> ADPLL_LMS_EXT_VALUE_R {
164 ADPLL_LMS_EXT_VALUE_R::new(((self.bits >> 20) & 0x01ff) as u16)
165 }
166 #[doc = "Bit 29"]
167 #[inline(always)]
168 pub fn adpll_lms_ext_value_en(&self) -> ADPLL_LMS_EXT_VALUE_EN_R {
169 ADPLL_LMS_EXT_VALUE_EN_R::new(((self.bits >> 29) & 1) != 0)
170 }
171 #[doc = "Bit 31"]
172 #[inline(always)]
173 pub fn adpll_fref_div2_en(&self) -> ADPLL_FREF_DIV2_EN_R {
174 ADPLL_FREF_DIV2_EN_R::new(((self.bits >> 31) & 1) != 0)
175 }
176}
177impl W {
178 #[doc = "Bits 0:1"]
179 #[inline(always)]
180 #[must_use]
181 pub fn adpll_pha_cancel_delay(&mut self) -> ADPLL_PHA_CANCEL_DELAY_W<0> {
182 ADPLL_PHA_CANCEL_DELAY_W::new(self)
183 }
184 #[doc = "Bit 4"]
185 #[inline(always)]
186 #[must_use]
187 pub fn adpll_pha_cancel_en(&mut self) -> ADPLL_PHA_CANCEL_EN_W<4> {
188 ADPLL_PHA_CANCEL_EN_W::new(self)
189 }
190 #[doc = "Bits 8:9"]
191 #[inline(always)]
192 #[must_use]
193 pub fn adpll_lms_q_delay(&mut self) -> ADPLL_LMS_Q_DELAY_W<8> {
194 ADPLL_LMS_Q_DELAY_W::new(self)
195 }
196 #[doc = "Bits 10:11"]
197 #[inline(always)]
198 #[must_use]
199 pub fn adpll_pha_prbs_sel(&mut self) -> ADPLL_PHA_PRBS_SEL_W<10> {
200 ADPLL_PHA_PRBS_SEL_W::new(self)
201 }
202 #[doc = "Bit 12"]
203 #[inline(always)]
204 #[must_use]
205 pub fn adpll_lms_step_enlarge(&mut self) -> ADPLL_LMS_STEP_ENLARGE_W<12> {
206 ADPLL_LMS_STEP_ENLARGE_W::new(self)
207 }
208 #[doc = "Bit 13"]
209 #[inline(always)]
210 #[must_use]
211 pub fn adpll_pha_dither_en(&mut self) -> ADPLL_PHA_DITHER_EN_W<13> {
212 ADPLL_PHA_DITHER_EN_W::new(self)
213 }
214 #[doc = "Bit 14"]
215 #[inline(always)]
216 #[must_use]
217 pub fn adpll_pha_dem_en(&mut self) -> ADPLL_PHA_DEM_EN_W<14> {
218 ADPLL_PHA_DEM_EN_W::new(self)
219 }
220 #[doc = "Bit 15"]
221 #[inline(always)]
222 #[must_use]
223 pub fn adpll_sdm_dither_prbs_en(&mut self) -> ADPLL_SDM_DITHER_PRBS_EN_W<15> {
224 ADPLL_SDM_DITHER_PRBS_EN_W::new(self)
225 }
226 #[doc = "Bits 16:17"]
227 #[inline(always)]
228 #[must_use]
229 pub fn adpll_lms_step(&mut self) -> ADPLL_LMS_STEP_W<16> {
230 ADPLL_LMS_STEP_W::new(self)
231 }
232 #[doc = "Bit 18"]
233 #[inline(always)]
234 #[must_use]
235 pub fn adpll_sdm_dither_en_ctrl_hw(&mut self) -> ADPLL_SDM_DITHER_EN_CTRL_HW_W<18> {
236 ADPLL_SDM_DITHER_EN_CTRL_HW_W::new(self)
237 }
238 #[doc = "Bit 19"]
239 #[inline(always)]
240 #[must_use]
241 pub fn adpll_sdm_dither_en(&mut self) -> ADPLL_SDM_DITHER_EN_W<19> {
242 ADPLL_SDM_DITHER_EN_W::new(self)
243 }
244 #[doc = "Bits 20:28"]
245 #[inline(always)]
246 #[must_use]
247 pub fn adpll_lms_ext_value(&mut self) -> ADPLL_LMS_EXT_VALUE_W<20> {
248 ADPLL_LMS_EXT_VALUE_W::new(self)
249 }
250 #[doc = "Bit 29"]
251 #[inline(always)]
252 #[must_use]
253 pub fn adpll_lms_ext_value_en(&mut self) -> ADPLL_LMS_EXT_VALUE_EN_W<29> {
254 ADPLL_LMS_EXT_VALUE_EN_W::new(self)
255 }
256 #[doc = "Bit 31"]
257 #[inline(always)]
258 #[must_use]
259 pub fn adpll_fref_div2_en(&mut self) -> ADPLL_FREF_DIV2_EN_W<31> {
260 ADPLL_FREF_DIV2_EN_W::new(self)
261 }
262 #[doc = "Writes raw bits to the register."]
263 #[inline(always)]
264 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
265 self.0.bits(bits);
266 self
267 }
268}
269#[doc = "adpll_lms.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [adpll_lms](index.html) module"]
270pub struct ADPLL_LMS_SPEC;
271impl crate::RegisterSpec for ADPLL_LMS_SPEC {
272 type Ux = u32;
273}
274#[doc = "`read()` method returns [adpll_lms::R](R) reader structure"]
275impl crate::Readable for ADPLL_LMS_SPEC {
276 type Reader = R;
277}
278#[doc = "`write(|w| ..)` method takes [adpll_lms::W](W) writer structure"]
279impl crate::Writable for ADPLL_LMS_SPEC {
280 type Writer = W;
281 const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
282 const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
283}
284#[doc = "`reset()` method sets adpll_lms to value 0"]
285impl crate::Resettable for ADPLL_LMS_SPEC {
286 const RESET_VALUE: Self::Ux = 0;
287}