bl702_pac/rf/
adpll_lf_tx.rs

1#[doc = "Register `adpll_lf_tx` reader"]
2pub struct R(crate::R<ADPLL_LF_TX_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<ADPLL_LF_TX_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<ADPLL_LF_TX_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<ADPLL_LF_TX_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `adpll_lf_tx` writer"]
17pub struct W(crate::W<ADPLL_LF_TX_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<ADPLL_LF_TX_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<ADPLL_LF_TX_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<ADPLL_LF_TX_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `adpll_lf_f_p3_tx` reader - "]
38pub type ADPLL_LF_F_P3_TX_R = crate::FieldReader<u8, u8>;
39#[doc = "Field `adpll_lf_f_p3_tx` writer - "]
40pub type ADPLL_LF_F_P3_TX_W<'a, const O: u8> =
41    crate::FieldWriter<'a, u32, ADPLL_LF_TX_SPEC, u8, u8, 2, O>;
42#[doc = "Field `adpll_lf_beta_fast_tx` reader - "]
43pub type ADPLL_LF_BETA_FAST_TX_R = crate::BitReader<bool>;
44#[doc = "Field `adpll_lf_beta_fast_tx` writer - "]
45pub type ADPLL_LF_BETA_FAST_TX_W<'a, const O: u8> =
46    crate::BitWriter<'a, u32, ADPLL_LF_TX_SPEC, bool, O>;
47#[doc = "Field `adpll_lf_beta_exp_tx` reader - "]
48pub type ADPLL_LF_BETA_EXP_TX_R = crate::FieldReader<u8, u8>;
49#[doc = "Field `adpll_lf_beta_exp_tx` writer - "]
50pub type ADPLL_LF_BETA_EXP_TX_W<'a, const O: u8> =
51    crate::FieldWriter<'a, u32, ADPLL_LF_TX_SPEC, u8, u8, 3, O>;
52#[doc = "Field `adpll_lf_beta_base_tx` reader - "]
53pub type ADPLL_LF_BETA_BASE_TX_R = crate::FieldReader<u8, u8>;
54#[doc = "Field `adpll_lf_beta_base_tx` writer - "]
55pub type ADPLL_LF_BETA_BASE_TX_W<'a, const O: u8> =
56    crate::FieldWriter<'a, u32, ADPLL_LF_TX_SPEC, u8, u8, 2, O>;
57#[doc = "Field `adpll_lf_alpha_fast_tx` reader - "]
58pub type ADPLL_LF_ALPHA_FAST_TX_R = crate::FieldReader<u8, u8>;
59#[doc = "Field `adpll_lf_alpha_fast_tx` writer - "]
60pub type ADPLL_LF_ALPHA_FAST_TX_W<'a, const O: u8> =
61    crate::FieldWriter<'a, u32, ADPLL_LF_TX_SPEC, u8, u8, 2, O>;
62#[doc = "Field `adpll_lf_alpha_exp_tx` reader - "]
63pub type ADPLL_LF_ALPHA_EXP_TX_R = crate::FieldReader<u8, u8>;
64#[doc = "Field `adpll_lf_alpha_exp_tx` writer - "]
65pub type ADPLL_LF_ALPHA_EXP_TX_W<'a, const O: u8> =
66    crate::FieldWriter<'a, u32, ADPLL_LF_TX_SPEC, u8, u8, 3, O>;
67#[doc = "Field `adpll_lf_alpha_base_tx` reader - "]
68pub type ADPLL_LF_ALPHA_BASE_TX_R = crate::BitReader<bool>;
69#[doc = "Field `adpll_lf_alpha_base_tx` writer - "]
70pub type ADPLL_LF_ALPHA_BASE_TX_W<'a, const O: u8> =
71    crate::BitWriter<'a, u32, ADPLL_LF_TX_SPEC, bool, O>;
72impl R {
73    #[doc = "Bits 10:11"]
74    #[inline(always)]
75    pub fn adpll_lf_f_p3_tx(&self) -> ADPLL_LF_F_P3_TX_R {
76        ADPLL_LF_F_P3_TX_R::new(((self.bits >> 10) & 3) as u8)
77    }
78    #[doc = "Bit 13"]
79    #[inline(always)]
80    pub fn adpll_lf_beta_fast_tx(&self) -> ADPLL_LF_BETA_FAST_TX_R {
81        ADPLL_LF_BETA_FAST_TX_R::new(((self.bits >> 13) & 1) != 0)
82    }
83    #[doc = "Bits 14:16"]
84    #[inline(always)]
85    pub fn adpll_lf_beta_exp_tx(&self) -> ADPLL_LF_BETA_EXP_TX_R {
86        ADPLL_LF_BETA_EXP_TX_R::new(((self.bits >> 14) & 7) as u8)
87    }
88    #[doc = "Bits 17:18"]
89    #[inline(always)]
90    pub fn adpll_lf_beta_base_tx(&self) -> ADPLL_LF_BETA_BASE_TX_R {
91        ADPLL_LF_BETA_BASE_TX_R::new(((self.bits >> 17) & 3) as u8)
92    }
93    #[doc = "Bits 20:21"]
94    #[inline(always)]
95    pub fn adpll_lf_alpha_fast_tx(&self) -> ADPLL_LF_ALPHA_FAST_TX_R {
96        ADPLL_LF_ALPHA_FAST_TX_R::new(((self.bits >> 20) & 3) as u8)
97    }
98    #[doc = "Bits 24:26"]
99    #[inline(always)]
100    pub fn adpll_lf_alpha_exp_tx(&self) -> ADPLL_LF_ALPHA_EXP_TX_R {
101        ADPLL_LF_ALPHA_EXP_TX_R::new(((self.bits >> 24) & 7) as u8)
102    }
103    #[doc = "Bit 27"]
104    #[inline(always)]
105    pub fn adpll_lf_alpha_base_tx(&self) -> ADPLL_LF_ALPHA_BASE_TX_R {
106        ADPLL_LF_ALPHA_BASE_TX_R::new(((self.bits >> 27) & 1) != 0)
107    }
108}
109impl W {
110    #[doc = "Bits 10:11"]
111    #[inline(always)]
112    #[must_use]
113    pub fn adpll_lf_f_p3_tx(&mut self) -> ADPLL_LF_F_P3_TX_W<10> {
114        ADPLL_LF_F_P3_TX_W::new(self)
115    }
116    #[doc = "Bit 13"]
117    #[inline(always)]
118    #[must_use]
119    pub fn adpll_lf_beta_fast_tx(&mut self) -> ADPLL_LF_BETA_FAST_TX_W<13> {
120        ADPLL_LF_BETA_FAST_TX_W::new(self)
121    }
122    #[doc = "Bits 14:16"]
123    #[inline(always)]
124    #[must_use]
125    pub fn adpll_lf_beta_exp_tx(&mut self) -> ADPLL_LF_BETA_EXP_TX_W<14> {
126        ADPLL_LF_BETA_EXP_TX_W::new(self)
127    }
128    #[doc = "Bits 17:18"]
129    #[inline(always)]
130    #[must_use]
131    pub fn adpll_lf_beta_base_tx(&mut self) -> ADPLL_LF_BETA_BASE_TX_W<17> {
132        ADPLL_LF_BETA_BASE_TX_W::new(self)
133    }
134    #[doc = "Bits 20:21"]
135    #[inline(always)]
136    #[must_use]
137    pub fn adpll_lf_alpha_fast_tx(&mut self) -> ADPLL_LF_ALPHA_FAST_TX_W<20> {
138        ADPLL_LF_ALPHA_FAST_TX_W::new(self)
139    }
140    #[doc = "Bits 24:26"]
141    #[inline(always)]
142    #[must_use]
143    pub fn adpll_lf_alpha_exp_tx(&mut self) -> ADPLL_LF_ALPHA_EXP_TX_W<24> {
144        ADPLL_LF_ALPHA_EXP_TX_W::new(self)
145    }
146    #[doc = "Bit 27"]
147    #[inline(always)]
148    #[must_use]
149    pub fn adpll_lf_alpha_base_tx(&mut self) -> ADPLL_LF_ALPHA_BASE_TX_W<27> {
150        ADPLL_LF_ALPHA_BASE_TX_W::new(self)
151    }
152    #[doc = "Writes raw bits to the register."]
153    #[inline(always)]
154    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
155        self.0.bits(bits);
156        self
157    }
158}
159#[doc = "adpll_lf_tx.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [adpll_lf_tx](index.html) module"]
160pub struct ADPLL_LF_TX_SPEC;
161impl crate::RegisterSpec for ADPLL_LF_TX_SPEC {
162    type Ux = u32;
163}
164#[doc = "`read()` method returns [adpll_lf_tx::R](R) reader structure"]
165impl crate::Readable for ADPLL_LF_TX_SPEC {
166    type Reader = R;
167}
168#[doc = "`write(|w| ..)` method takes [adpll_lf_tx::W](W) writer structure"]
169impl crate::Writable for ADPLL_LF_TX_SPEC {
170    type Writer = W;
171    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
172    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
173}
174#[doc = "`reset()` method sets adpll_lf_tx to value 0"]
175impl crate::Resettable for ADPLL_LF_TX_SPEC {
176    const RESET_VALUE: Self::Ux = 0;
177}
bl702_pac/rf/adpll_lf_tx.rs

bl702_pac/rf/
adpll_lf_tx.rs
