bl702_pac/rf/
adpll_lf_reg.rs

1#[doc = "Register `adpll_lf_reg` reader"]
2pub struct R(crate::R<ADPLL_LF_REG_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<ADPLL_LF_REG_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<ADPLL_LF_REG_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<ADPLL_LF_REG_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `adpll_lf_reg` writer"]
17pub struct W(crate::W<ADPLL_LF_REG_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<ADPLL_LF_REG_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<ADPLL_LF_REG_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<ADPLL_LF_REG_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `adpll_lf_vctrl_range_ext` reader - "]
38pub type ADPLL_LF_VCTRL_RANGE_EXT_R = crate::FieldReader<u8, u8>;
39#[doc = "Field `adpll_lf_vctrl_range_ext` writer - "]
40pub type ADPLL_LF_VCTRL_RANGE_EXT_W<'a, const O: u8> =
41    crate::FieldWriter<'a, u32, ADPLL_LF_REG_SPEC, u8, u8, 2, O>;
42#[doc = "Field `adpll_lf_lsb_ext` reader - "]
43pub type ADPLL_LF_LSB_EXT_R = crate::FieldReader<u8, u8>;
44#[doc = "Field `adpll_lf_lsb_ext` writer - "]
45pub type ADPLL_LF_LSB_EXT_W<'a, const O: u8> =
46    crate::FieldWriter<'a, u32, ADPLL_LF_REG_SPEC, u8, u8, 7, O>;
47#[doc = "Field `adpll_lf_avg_en` reader - "]
48pub type ADPLL_LF_AVG_EN_R = crate::BitReader<bool>;
49#[doc = "Field `adpll_lf_avg_en` writer - "]
50pub type ADPLL_LF_AVG_EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, ADPLL_LF_REG_SPEC, bool, O>;
51#[doc = "Field `adpll_lf_f_p3` reader - "]
52pub type ADPLL_LF_F_P3_R = crate::FieldReader<u8, u8>;
53#[doc = "Field `adpll_lf_f_p3` writer - "]
54pub type ADPLL_LF_F_P3_W<'a, const O: u8> =
55    crate::FieldWriter<'a, u32, ADPLL_LF_REG_SPEC, u8, u8, 2, O>;
56#[doc = "Field `adpll_lf_beta_fast` reader - "]
57pub type ADPLL_LF_BETA_FAST_R = crate::BitReader<bool>;
58#[doc = "Field `adpll_lf_beta_fast` writer - "]
59pub type ADPLL_LF_BETA_FAST_W<'a, const O: u8> =
60    crate::BitWriter<'a, u32, ADPLL_LF_REG_SPEC, bool, O>;
61#[doc = "Field `adpll_lf_beta_exp` reader - "]
62pub type ADPLL_LF_BETA_EXP_R = crate::FieldReader<u8, u8>;
63#[doc = "Field `adpll_lf_beta_exp` writer - "]
64pub type ADPLL_LF_BETA_EXP_W<'a, const O: u8> =
65    crate::FieldWriter<'a, u32, ADPLL_LF_REG_SPEC, u8, u8, 3, O>;
66#[doc = "Field `adpll_lf_beta_base` reader - "]
67pub type ADPLL_LF_BETA_BASE_R = crate::FieldReader<u8, u8>;
68#[doc = "Field `adpll_lf_beta_base` writer - "]
69pub type ADPLL_LF_BETA_BASE_W<'a, const O: u8> =
70    crate::FieldWriter<'a, u32, ADPLL_LF_REG_SPEC, u8, u8, 2, O>;
71#[doc = "Field `adpll_lf_alpha_fast` reader - "]
72pub type ADPLL_LF_ALPHA_FAST_R = crate::FieldReader<u8, u8>;
73#[doc = "Field `adpll_lf_alpha_fast` writer - "]
74pub type ADPLL_LF_ALPHA_FAST_W<'a, const O: u8> =
75    crate::FieldWriter<'a, u32, ADPLL_LF_REG_SPEC, u8, u8, 2, O>;
76#[doc = "Field `adpll_lf_alpha_exp` reader - "]
77pub type ADPLL_LF_ALPHA_EXP_R = crate::FieldReader<u8, u8>;
78#[doc = "Field `adpll_lf_alpha_exp` writer - "]
79pub type ADPLL_LF_ALPHA_EXP_W<'a, const O: u8> =
80    crate::FieldWriter<'a, u32, ADPLL_LF_REG_SPEC, u8, u8, 3, O>;
81#[doc = "Field `adpll_lf_alpha_base` reader - "]
82pub type ADPLL_LF_ALPHA_BASE_R = crate::BitReader<bool>;
83#[doc = "Field `adpll_lf_alpha_base` writer - "]
84pub type ADPLL_LF_ALPHA_BASE_W<'a, const O: u8> =
85    crate::BitWriter<'a, u32, ADPLL_LF_REG_SPEC, bool, O>;
86#[doc = "Field `adpll_lf_ctrl_hw` reader - "]
87pub type ADPLL_LF_CTRL_HW_R = crate::BitReader<bool>;
88#[doc = "Field `adpll_lf_ctrl_hw` writer - "]
89pub type ADPLL_LF_CTRL_HW_W<'a, const O: u8> =
90    crate::BitWriter<'a, u32, ADPLL_LF_REG_SPEC, bool, O>;
91impl R {
92    #[doc = "Bits 0:1"]
93    #[inline(always)]
94    pub fn adpll_lf_vctrl_range_ext(&self) -> ADPLL_LF_VCTRL_RANGE_EXT_R {
95        ADPLL_LF_VCTRL_RANGE_EXT_R::new((self.bits & 3) as u8)
96    }
97    #[doc = "Bits 2:8"]
98    #[inline(always)]
99    pub fn adpll_lf_lsb_ext(&self) -> ADPLL_LF_LSB_EXT_R {
100        ADPLL_LF_LSB_EXT_R::new(((self.bits >> 2) & 0x7f) as u8)
101    }
102    #[doc = "Bit 9"]
103    #[inline(always)]
104    pub fn adpll_lf_avg_en(&self) -> ADPLL_LF_AVG_EN_R {
105        ADPLL_LF_AVG_EN_R::new(((self.bits >> 9) & 1) != 0)
106    }
107    #[doc = "Bits 10:11"]
108    #[inline(always)]
109    pub fn adpll_lf_f_p3(&self) -> ADPLL_LF_F_P3_R {
110        ADPLL_LF_F_P3_R::new(((self.bits >> 10) & 3) as u8)
111    }
112    #[doc = "Bit 13"]
113    #[inline(always)]
114    pub fn adpll_lf_beta_fast(&self) -> ADPLL_LF_BETA_FAST_R {
115        ADPLL_LF_BETA_FAST_R::new(((self.bits >> 13) & 1) != 0)
116    }
117    #[doc = "Bits 14:16"]
118    #[inline(always)]
119    pub fn adpll_lf_beta_exp(&self) -> ADPLL_LF_BETA_EXP_R {
120        ADPLL_LF_BETA_EXP_R::new(((self.bits >> 14) & 7) as u8)
121    }
122    #[doc = "Bits 17:18"]
123    #[inline(always)]
124    pub fn adpll_lf_beta_base(&self) -> ADPLL_LF_BETA_BASE_R {
125        ADPLL_LF_BETA_BASE_R::new(((self.bits >> 17) & 3) as u8)
126    }
127    #[doc = "Bits 20:21"]
128    #[inline(always)]
129    pub fn adpll_lf_alpha_fast(&self) -> ADPLL_LF_ALPHA_FAST_R {
130        ADPLL_LF_ALPHA_FAST_R::new(((self.bits >> 20) & 3) as u8)
131    }
132    #[doc = "Bits 24:26"]
133    #[inline(always)]
134    pub fn adpll_lf_alpha_exp(&self) -> ADPLL_LF_ALPHA_EXP_R {
135        ADPLL_LF_ALPHA_EXP_R::new(((self.bits >> 24) & 7) as u8)
136    }
137    #[doc = "Bit 27"]
138    #[inline(always)]
139    pub fn adpll_lf_alpha_base(&self) -> ADPLL_LF_ALPHA_BASE_R {
140        ADPLL_LF_ALPHA_BASE_R::new(((self.bits >> 27) & 1) != 0)
141    }
142    #[doc = "Bit 28"]
143    #[inline(always)]
144    pub fn adpll_lf_ctrl_hw(&self) -> ADPLL_LF_CTRL_HW_R {
145        ADPLL_LF_CTRL_HW_R::new(((self.bits >> 28) & 1) != 0)
146    }
147}
148impl W {
149    #[doc = "Bits 0:1"]
150    #[inline(always)]
151    #[must_use]
152    pub fn adpll_lf_vctrl_range_ext(&mut self) -> ADPLL_LF_VCTRL_RANGE_EXT_W<0> {
153        ADPLL_LF_VCTRL_RANGE_EXT_W::new(self)
154    }
155    #[doc = "Bits 2:8"]
156    #[inline(always)]
157    #[must_use]
158    pub fn adpll_lf_lsb_ext(&mut self) -> ADPLL_LF_LSB_EXT_W<2> {
159        ADPLL_LF_LSB_EXT_W::new(self)
160    }
161    #[doc = "Bit 9"]
162    #[inline(always)]
163    #[must_use]
164    pub fn adpll_lf_avg_en(&mut self) -> ADPLL_LF_AVG_EN_W<9> {
165        ADPLL_LF_AVG_EN_W::new(self)
166    }
167    #[doc = "Bits 10:11"]
168    #[inline(always)]
169    #[must_use]
170    pub fn adpll_lf_f_p3(&mut self) -> ADPLL_LF_F_P3_W<10> {
171        ADPLL_LF_F_P3_W::new(self)
172    }
173    #[doc = "Bit 13"]
174    #[inline(always)]
175    #[must_use]
176    pub fn adpll_lf_beta_fast(&mut self) -> ADPLL_LF_BETA_FAST_W<13> {
177        ADPLL_LF_BETA_FAST_W::new(self)
178    }
179    #[doc = "Bits 14:16"]
180    #[inline(always)]
181    #[must_use]
182    pub fn adpll_lf_beta_exp(&mut self) -> ADPLL_LF_BETA_EXP_W<14> {
183        ADPLL_LF_BETA_EXP_W::new(self)
184    }
185    #[doc = "Bits 17:18"]
186    #[inline(always)]
187    #[must_use]
188    pub fn adpll_lf_beta_base(&mut self) -> ADPLL_LF_BETA_BASE_W<17> {
189        ADPLL_LF_BETA_BASE_W::new(self)
190    }
191    #[doc = "Bits 20:21"]
192    #[inline(always)]
193    #[must_use]
194    pub fn adpll_lf_alpha_fast(&mut self) -> ADPLL_LF_ALPHA_FAST_W<20> {
195        ADPLL_LF_ALPHA_FAST_W::new(self)
196    }
197    #[doc = "Bits 24:26"]
198    #[inline(always)]
199    #[must_use]
200    pub fn adpll_lf_alpha_exp(&mut self) -> ADPLL_LF_ALPHA_EXP_W<24> {
201        ADPLL_LF_ALPHA_EXP_W::new(self)
202    }
203    #[doc = "Bit 27"]
204    #[inline(always)]
205    #[must_use]
206    pub fn adpll_lf_alpha_base(&mut self) -> ADPLL_LF_ALPHA_BASE_W<27> {
207        ADPLL_LF_ALPHA_BASE_W::new(self)
208    }
209    #[doc = "Bit 28"]
210    #[inline(always)]
211    #[must_use]
212    pub fn adpll_lf_ctrl_hw(&mut self) -> ADPLL_LF_CTRL_HW_W<28> {
213        ADPLL_LF_CTRL_HW_W::new(self)
214    }
215    #[doc = "Writes raw bits to the register."]
216    #[inline(always)]
217    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
218        self.0.bits(bits);
219        self
220    }
221}
222#[doc = "adpll_lf_reg.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [adpll_lf_reg](index.html) module"]
223pub struct ADPLL_LF_REG_SPEC;
224impl crate::RegisterSpec for ADPLL_LF_REG_SPEC {
225    type Ux = u32;
226}
227#[doc = "`read()` method returns [adpll_lf_reg::R](R) reader structure"]
228impl crate::Readable for ADPLL_LF_REG_SPEC {
229    type Reader = R;
230}
231#[doc = "`write(|w| ..)` method takes [adpll_lf_reg::W](W) writer structure"]
232impl crate::Writable for ADPLL_LF_REG_SPEC {
233    type Writer = W;
234    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
235    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
236}
237#[doc = "`reset()` method sets adpll_lf_reg to value 0"]
238impl crate::Resettable for ADPLL_LF_REG_SPEC {
239    const RESET_VALUE: Self::Ux = 0;
240}
bl702_pac/rf/adpll_lf_reg.rs

bl702_pac/rf/
adpll_lf_reg.rs
