bl702_pac/rf/
adpll_dtc.rs

1#[doc = "Register `adpll_dtc` reader"]
2pub struct R(crate::R<ADPLL_DTC_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<ADPLL_DTC_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<ADPLL_DTC_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<ADPLL_DTC_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `adpll_dtc` writer"]
17pub struct W(crate::W<ADPLL_DTC_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<ADPLL_DTC_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<ADPLL_DTC_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<ADPLL_DTC_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `adpll_dtc_bypass` reader - "]
38pub type ADPLL_DTC_BYPASS_R = crate::BitReader<bool>;
39#[doc = "Field `adpll_dtc_bypass` writer - "]
40pub type ADPLL_DTC_BYPASS_W<'a, const O: u8> = crate::BitWriter<'a, u32, ADPLL_DTC_SPEC, bool, O>;
41#[doc = "Field `adpll_dtc_r_sel` reader - "]
42pub type ADPLL_DTC_R_SEL_R = crate::FieldReader<u8, u8>;
43#[doc = "Field `adpll_dtc_r_sel` writer - "]
44pub type ADPLL_DTC_R_SEL_W<'a, const O: u8> =
45    crate::FieldWriter<'a, u32, ADPLL_DTC_SPEC, u8, u8, 3, O>;
46#[doc = "Field `adpll_dtc_inv_vth_sel` reader - "]
47pub type ADPLL_DTC_INV_VTH_SEL_R = crate::FieldReader<u8, u8>;
48#[doc = "Field `adpll_dtc_inv_vth_sel` writer - "]
49pub type ADPLL_DTC_INV_VTH_SEL_W<'a, const O: u8> =
50    crate::FieldWriter<'a, u32, ADPLL_DTC_SPEC, u8, u8, 2, O>;
51impl R {
52    #[doc = "Bit 0"]
53    #[inline(always)]
54    pub fn adpll_dtc_bypass(&self) -> ADPLL_DTC_BYPASS_R {
55        ADPLL_DTC_BYPASS_R::new((self.bits & 1) != 0)
56    }
57    #[doc = "Bits 4:6"]
58    #[inline(always)]
59    pub fn adpll_dtc_r_sel(&self) -> ADPLL_DTC_R_SEL_R {
60        ADPLL_DTC_R_SEL_R::new(((self.bits >> 4) & 7) as u8)
61    }
62    #[doc = "Bits 8:9"]
63    #[inline(always)]
64    pub fn adpll_dtc_inv_vth_sel(&self) -> ADPLL_DTC_INV_VTH_SEL_R {
65        ADPLL_DTC_INV_VTH_SEL_R::new(((self.bits >> 8) & 3) as u8)
66    }
67}
68impl W {
69    #[doc = "Bit 0"]
70    #[inline(always)]
71    #[must_use]
72    pub fn adpll_dtc_bypass(&mut self) -> ADPLL_DTC_BYPASS_W<0> {
73        ADPLL_DTC_BYPASS_W::new(self)
74    }
75    #[doc = "Bits 4:6"]
76    #[inline(always)]
77    #[must_use]
78    pub fn adpll_dtc_r_sel(&mut self) -> ADPLL_DTC_R_SEL_W<4> {
79        ADPLL_DTC_R_SEL_W::new(self)
80    }
81    #[doc = "Bits 8:9"]
82    #[inline(always)]
83    #[must_use]
84    pub fn adpll_dtc_inv_vth_sel(&mut self) -> ADPLL_DTC_INV_VTH_SEL_W<8> {
85        ADPLL_DTC_INV_VTH_SEL_W::new(self)
86    }
87    #[doc = "Writes raw bits to the register."]
88    #[inline(always)]
89    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
90        self.0.bits(bits);
91        self
92    }
93}
94#[doc = "adpll_dtc.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [adpll_dtc](index.html) module"]
95pub struct ADPLL_DTC_SPEC;
96impl crate::RegisterSpec for ADPLL_DTC_SPEC {
97    type Ux = u32;
98}
99#[doc = "`read()` method returns [adpll_dtc::R](R) reader structure"]
100impl crate::Readable for ADPLL_DTC_SPEC {
101    type Reader = R;
102}
103#[doc = "`write(|w| ..)` method takes [adpll_dtc::W](W) writer structure"]
104impl crate::Writable for ADPLL_DTC_SPEC {
105    type Writer = W;
106    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
107    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
108}
109#[doc = "`reset()` method sets adpll_dtc to value 0"]
110impl crate::Resettable for ADPLL_DTC_SPEC {
111    const RESET_VALUE: Self::Ux = 0;
112}
bl702_pac/rf/adpll_dtc.rs

bl702_pac/rf/
adpll_dtc.rs
