1#[doc = "Register `adpll1` reader"]
2pub struct R(crate::R<ADPLL1_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<ADPLL1_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<ADPLL1_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<ADPLL1_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `adpll1` writer"]
17pub struct W(crate::W<ADPLL1_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<ADPLL1_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<ADPLL1_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<ADPLL1_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Field `adpll_lo_unlock_intrpt_clear` reader - "]
38pub type ADPLL_LO_UNLOCK_INTRPT_CLEAR_R = crate::BitReader<bool>;
39#[doc = "Field `adpll_lo_unlock_intrpt_clear` writer - "]
40pub type ADPLL_LO_UNLOCK_INTRPT_CLEAR_W<'a, const O: u8> =
41 crate::BitWriter<'a, u32, ADPLL1_SPEC, bool, O>;
42#[doc = "Field `adpll_lo_lock_sel` reader - "]
43pub type ADPLL_LO_LOCK_SEL_R = crate::BitReader<bool>;
44#[doc = "Field `adpll_lo_lock_sel` writer - "]
45pub type ADPLL_LO_LOCK_SEL_W<'a, const O: u8> = crate::BitWriter<'a, u32, ADPLL1_SPEC, bool, O>;
46#[doc = "Field `adpll_timeout_cnt1_sel` reader - "]
47pub type ADPLL_TIMEOUT_CNT1_SEL_R = crate::BitReader<bool>;
48#[doc = "Field `adpll_timeout_cnt1_sel` writer - "]
49pub type ADPLL_TIMEOUT_CNT1_SEL_W<'a, const O: u8> =
50 crate::BitWriter<'a, u32, ADPLL1_SPEC, bool, O>;
51#[doc = "Field `adpll_timeout_cnt_sel` reader - "]
52pub type ADPLL_TIMEOUT_CNT_SEL_R = crate::BitReader<bool>;
53#[doc = "Field `adpll_timeout_cnt_sel` writer - "]
54pub type ADPLL_TIMEOUT_CNT_SEL_W<'a, const O: u8> = crate::BitWriter<'a, u32, ADPLL1_SPEC, bool, O>;
55#[doc = "Field `adpll_momhold_lmsenb_ext` reader - "]
56pub type ADPLL_MOMHOLD_LMSENB_EXT_R = crate::BitReader<bool>;
57#[doc = "Field `adpll_momhold_lmsenb_ext` writer - "]
58pub type ADPLL_MOMHOLD_LMSENB_EXT_W<'a, const O: u8> =
59 crate::BitWriter<'a, u32, ADPLL1_SPEC, bool, O>;
60#[doc = "Field `adpll_rst_coarse_det_ext` reader - "]
61pub type ADPLL_RST_COARSE_DET_EXT_R = crate::BitReader<bool>;
62#[doc = "Field `adpll_rst_coarse_det_ext` writer - "]
63pub type ADPLL_RST_COARSE_DET_EXT_W<'a, const O: u8> =
64 crate::BitWriter<'a, u32, ADPLL1_SPEC, bool, O>;
65#[doc = "Field `adpll_rst_spd_det_ext` reader - "]
66pub type ADPLL_RST_SPD_DET_EXT_R = crate::BitReader<bool>;
67#[doc = "Field `adpll_rst_spd_det_ext` writer - "]
68pub type ADPLL_RST_SPD_DET_EXT_W<'a, const O: u8> = crate::BitWriter<'a, u32, ADPLL1_SPEC, bool, O>;
69#[doc = "Field `adpll_loop_lock_ext` reader - "]
70pub type ADPLL_LOOP_LOCK_EXT_R = crate::BitReader<bool>;
71#[doc = "Field `adpll_loop_lock_ext` writer - "]
72pub type ADPLL_LOOP_LOCK_EXT_W<'a, const O: u8> = crate::BitWriter<'a, u32, ADPLL1_SPEC, bool, O>;
73#[doc = "Field `adpll_fcal_done_ext` reader - "]
74pub type ADPLL_FCAL_DONE_EXT_R = crate::BitReader<bool>;
75#[doc = "Field `adpll_fcal_done_ext` writer - "]
76pub type ADPLL_FCAL_DONE_EXT_W<'a, const O: u8> = crate::BitWriter<'a, u32, ADPLL1_SPEC, bool, O>;
77#[doc = "Field `adpll_fcal_start_ext` reader - "]
78pub type ADPLL_FCAL_START_EXT_R = crate::BitReader<bool>;
79#[doc = "Field `adpll_fcal_start_ext` writer - "]
80pub type ADPLL_FCAL_START_EXT_W<'a, const O: u8> = crate::BitWriter<'a, u32, ADPLL1_SPEC, bool, O>;
81#[doc = "Field `adpll_lo_lock_directly` reader - "]
82pub type ADPLL_LO_LOCK_DIRECTLY_R = crate::BitReader<bool>;
83#[doc = "Field `adpll_lo_lock_directly` writer - "]
84pub type ADPLL_LO_LOCK_DIRECTLY_W<'a, const O: u8> =
85 crate::BitWriter<'a, u32, ADPLL1_SPEC, bool, O>;
86#[doc = "Field `adpll_lo_fsm_ext` reader - "]
87pub type ADPLL_LO_FSM_EXT_R = crate::BitReader<bool>;
88#[doc = "Field `adpll_lo_fsm_ext` writer - "]
89pub type ADPLL_LO_FSM_EXT_W<'a, const O: u8> = crate::BitWriter<'a, u32, ADPLL1_SPEC, bool, O>;
90#[doc = "Field `adpll_fsm_en` reader - "]
91pub type ADPLL_FSM_EN_R = crate::BitReader<bool>;
92#[doc = "Field `adpll_fsm_en` writer - "]
93pub type ADPLL_FSM_EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, ADPLL1_SPEC, bool, O>;
94#[doc = "Field `adpll_lock_fail_en` reader - "]
95pub type ADPLL_LOCK_FAIL_EN_R = crate::BitReader<bool>;
96#[doc = "Field `adpll_lock_fail_en` writer - "]
97pub type ADPLL_LOCK_FAIL_EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, ADPLL1_SPEC, bool, O>;
98#[doc = "Field `adpll_abnormal_dealed` reader - "]
99pub type ADPLL_ABNORMAL_DEALED_R = crate::BitReader<bool>;
100#[doc = "Field `adpll_abnormal_dealed` writer - "]
101pub type ADPLL_ABNORMAL_DEALED_W<'a, const O: u8> = crate::BitWriter<'a, u32, ADPLL1_SPEC, bool, O>;
102#[doc = "Field `adpll_vctrl_det_start_ext` reader - "]
103pub type ADPLL_VCTRL_DET_START_EXT_R = crate::BitReader<bool>;
104#[doc = "Field `adpll_vctrl_det_start_ext` writer - "]
105pub type ADPLL_VCTRL_DET_START_EXT_W<'a, const O: u8> =
106 crate::BitWriter<'a, u32, ADPLL1_SPEC, bool, O>;
107#[doc = "Field `adpll_vctrl_det_en_ext` reader - "]
108pub type ADPLL_VCTRL_DET_EN_EXT_R = crate::BitReader<bool>;
109#[doc = "Field `adpll_vctrl_det_en_ext` writer - "]
110pub type ADPLL_VCTRL_DET_EN_EXT_W<'a, const O: u8> =
111 crate::BitWriter<'a, u32, ADPLL1_SPEC, bool, O>;
112#[doc = "Field `adpll_mom_update_en_ext` reader - "]
113pub type ADPLL_MOM_UPDATE_EN_EXT_R = crate::BitReader<bool>;
114#[doc = "Field `adpll_mom_update_en_ext` writer - "]
115pub type ADPLL_MOM_UPDATE_EN_EXT_W<'a, const O: u8> =
116 crate::BitWriter<'a, u32, ADPLL1_SPEC, bool, O>;
117#[doc = "Field `adpll_freqerr_det_start_ext` reader - "]
118pub type ADPLL_FREQERR_DET_START_EXT_R = crate::BitReader<bool>;
119#[doc = "Field `adpll_freqerr_det_start_ext` writer - "]
120pub type ADPLL_FREQERR_DET_START_EXT_W<'a, const O: u8> =
121 crate::BitWriter<'a, u32, ADPLL1_SPEC, bool, O>;
122#[doc = "Field `adpll_mom_search_en_ext` reader - "]
123pub type ADPLL_MOM_SEARCH_EN_EXT_R = crate::BitReader<bool>;
124#[doc = "Field `adpll_mom_search_en_ext` writer - "]
125pub type ADPLL_MOM_SEARCH_EN_EXT_W<'a, const O: u8> =
126 crate::BitWriter<'a, u32, ADPLL1_SPEC, bool, O>;
127#[doc = "Field `adpll_lo_open` reader - "]
128pub type ADPLL_LO_OPEN_R = crate::BitReader<bool>;
129#[doc = "Field `adpll_lo_open` writer - "]
130pub type ADPLL_LO_OPEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, ADPLL1_SPEC, bool, O>;
131#[doc = "Field `adpll_sfreg_sel` reader - "]
132pub type ADPLL_SFREG_SEL_R = crate::BitReader<bool>;
133#[doc = "Field `adpll_sfreg_sel` writer - "]
134pub type ADPLL_SFREG_SEL_W<'a, const O: u8> = crate::BitWriter<'a, u32, ADPLL1_SPEC, bool, O>;
135#[doc = "Field `adpll_lo_unlock_intrpt_clear_sel` reader - "]
136pub type ADPLL_LO_UNLOCK_INTRPT_CLEAR_SEL_R = crate::BitReader<bool>;
137#[doc = "Field `adpll_lo_unlock_intrpt_clear_sel` writer - "]
138pub type ADPLL_LO_UNLOCK_INTRPT_CLEAR_SEL_W<'a, const O: u8> =
139 crate::BitWriter<'a, u32, ADPLL1_SPEC, bool, O>;
140#[doc = "Field `adpll_force_inc_fcal_en` reader - "]
141pub type ADPLL_FORCE_INC_FCAL_EN_R = crate::BitReader<bool>;
142#[doc = "Field `adpll_force_inc_fcal_en` writer - "]
143pub type ADPLL_FORCE_INC_FCAL_EN_W<'a, const O: u8> =
144 crate::BitWriter<'a, u32, ADPLL1_SPEC, bool, O>;
145impl R {
146 #[doc = "Bit 0"]
147 #[inline(always)]
148 pub fn adpll_lo_unlock_intrpt_clear(&self) -> ADPLL_LO_UNLOCK_INTRPT_CLEAR_R {
149 ADPLL_LO_UNLOCK_INTRPT_CLEAR_R::new((self.bits & 1) != 0)
150 }
151 #[doc = "Bit 1"]
152 #[inline(always)]
153 pub fn adpll_lo_lock_sel(&self) -> ADPLL_LO_LOCK_SEL_R {
154 ADPLL_LO_LOCK_SEL_R::new(((self.bits >> 1) & 1) != 0)
155 }
156 #[doc = "Bit 2"]
157 #[inline(always)]
158 pub fn adpll_timeout_cnt1_sel(&self) -> ADPLL_TIMEOUT_CNT1_SEL_R {
159 ADPLL_TIMEOUT_CNT1_SEL_R::new(((self.bits >> 2) & 1) != 0)
160 }
161 #[doc = "Bit 3"]
162 #[inline(always)]
163 pub fn adpll_timeout_cnt_sel(&self) -> ADPLL_TIMEOUT_CNT_SEL_R {
164 ADPLL_TIMEOUT_CNT_SEL_R::new(((self.bits >> 3) & 1) != 0)
165 }
166 #[doc = "Bit 4"]
167 #[inline(always)]
168 pub fn adpll_momhold_lmsenb_ext(&self) -> ADPLL_MOMHOLD_LMSENB_EXT_R {
169 ADPLL_MOMHOLD_LMSENB_EXT_R::new(((self.bits >> 4) & 1) != 0)
170 }
171 #[doc = "Bit 5"]
172 #[inline(always)]
173 pub fn adpll_rst_coarse_det_ext(&self) -> ADPLL_RST_COARSE_DET_EXT_R {
174 ADPLL_RST_COARSE_DET_EXT_R::new(((self.bits >> 5) & 1) != 0)
175 }
176 #[doc = "Bit 6"]
177 #[inline(always)]
178 pub fn adpll_rst_spd_det_ext(&self) -> ADPLL_RST_SPD_DET_EXT_R {
179 ADPLL_RST_SPD_DET_EXT_R::new(((self.bits >> 6) & 1) != 0)
180 }
181 #[doc = "Bit 7"]
182 #[inline(always)]
183 pub fn adpll_loop_lock_ext(&self) -> ADPLL_LOOP_LOCK_EXT_R {
184 ADPLL_LOOP_LOCK_EXT_R::new(((self.bits >> 7) & 1) != 0)
185 }
186 #[doc = "Bit 8"]
187 #[inline(always)]
188 pub fn adpll_fcal_done_ext(&self) -> ADPLL_FCAL_DONE_EXT_R {
189 ADPLL_FCAL_DONE_EXT_R::new(((self.bits >> 8) & 1) != 0)
190 }
191 #[doc = "Bit 9"]
192 #[inline(always)]
193 pub fn adpll_fcal_start_ext(&self) -> ADPLL_FCAL_START_EXT_R {
194 ADPLL_FCAL_START_EXT_R::new(((self.bits >> 9) & 1) != 0)
195 }
196 #[doc = "Bit 10"]
197 #[inline(always)]
198 pub fn adpll_lo_lock_directly(&self) -> ADPLL_LO_LOCK_DIRECTLY_R {
199 ADPLL_LO_LOCK_DIRECTLY_R::new(((self.bits >> 10) & 1) != 0)
200 }
201 #[doc = "Bit 11"]
202 #[inline(always)]
203 pub fn adpll_lo_fsm_ext(&self) -> ADPLL_LO_FSM_EXT_R {
204 ADPLL_LO_FSM_EXT_R::new(((self.bits >> 11) & 1) != 0)
205 }
206 #[doc = "Bit 12"]
207 #[inline(always)]
208 pub fn adpll_fsm_en(&self) -> ADPLL_FSM_EN_R {
209 ADPLL_FSM_EN_R::new(((self.bits >> 12) & 1) != 0)
210 }
211 #[doc = "Bit 14"]
212 #[inline(always)]
213 pub fn adpll_lock_fail_en(&self) -> ADPLL_LOCK_FAIL_EN_R {
214 ADPLL_LOCK_FAIL_EN_R::new(((self.bits >> 14) & 1) != 0)
215 }
216 #[doc = "Bit 15"]
217 #[inline(always)]
218 pub fn adpll_abnormal_dealed(&self) -> ADPLL_ABNORMAL_DEALED_R {
219 ADPLL_ABNORMAL_DEALED_R::new(((self.bits >> 15) & 1) != 0)
220 }
221 #[doc = "Bit 18"]
222 #[inline(always)]
223 pub fn adpll_vctrl_det_start_ext(&self) -> ADPLL_VCTRL_DET_START_EXT_R {
224 ADPLL_VCTRL_DET_START_EXT_R::new(((self.bits >> 18) & 1) != 0)
225 }
226 #[doc = "Bit 19"]
227 #[inline(always)]
228 pub fn adpll_vctrl_det_en_ext(&self) -> ADPLL_VCTRL_DET_EN_EXT_R {
229 ADPLL_VCTRL_DET_EN_EXT_R::new(((self.bits >> 19) & 1) != 0)
230 }
231 #[doc = "Bit 20"]
232 #[inline(always)]
233 pub fn adpll_mom_update_en_ext(&self) -> ADPLL_MOM_UPDATE_EN_EXT_R {
234 ADPLL_MOM_UPDATE_EN_EXT_R::new(((self.bits >> 20) & 1) != 0)
235 }
236 #[doc = "Bit 21"]
237 #[inline(always)]
238 pub fn adpll_freqerr_det_start_ext(&self) -> ADPLL_FREQERR_DET_START_EXT_R {
239 ADPLL_FREQERR_DET_START_EXT_R::new(((self.bits >> 21) & 1) != 0)
240 }
241 #[doc = "Bit 22"]
242 #[inline(always)]
243 pub fn adpll_mom_search_en_ext(&self) -> ADPLL_MOM_SEARCH_EN_EXT_R {
244 ADPLL_MOM_SEARCH_EN_EXT_R::new(((self.bits >> 22) & 1) != 0)
245 }
246 #[doc = "Bit 23"]
247 #[inline(always)]
248 pub fn adpll_lo_open(&self) -> ADPLL_LO_OPEN_R {
249 ADPLL_LO_OPEN_R::new(((self.bits >> 23) & 1) != 0)
250 }
251 #[doc = "Bit 24"]
252 #[inline(always)]
253 pub fn adpll_sfreg_sel(&self) -> ADPLL_SFREG_SEL_R {
254 ADPLL_SFREG_SEL_R::new(((self.bits >> 24) & 1) != 0)
255 }
256 #[doc = "Bit 25"]
257 #[inline(always)]
258 pub fn adpll_lo_unlock_intrpt_clear_sel(&self) -> ADPLL_LO_UNLOCK_INTRPT_CLEAR_SEL_R {
259 ADPLL_LO_UNLOCK_INTRPT_CLEAR_SEL_R::new(((self.bits >> 25) & 1) != 0)
260 }
261 #[doc = "Bit 26"]
262 #[inline(always)]
263 pub fn adpll_force_inc_fcal_en(&self) -> ADPLL_FORCE_INC_FCAL_EN_R {
264 ADPLL_FORCE_INC_FCAL_EN_R::new(((self.bits >> 26) & 1) != 0)
265 }
266}
267impl W {
268 #[doc = "Bit 0"]
269 #[inline(always)]
270 #[must_use]
271 pub fn adpll_lo_unlock_intrpt_clear(&mut self) -> ADPLL_LO_UNLOCK_INTRPT_CLEAR_W<0> {
272 ADPLL_LO_UNLOCK_INTRPT_CLEAR_W::new(self)
273 }
274 #[doc = "Bit 1"]
275 #[inline(always)]
276 #[must_use]
277 pub fn adpll_lo_lock_sel(&mut self) -> ADPLL_LO_LOCK_SEL_W<1> {
278 ADPLL_LO_LOCK_SEL_W::new(self)
279 }
280 #[doc = "Bit 2"]
281 #[inline(always)]
282 #[must_use]
283 pub fn adpll_timeout_cnt1_sel(&mut self) -> ADPLL_TIMEOUT_CNT1_SEL_W<2> {
284 ADPLL_TIMEOUT_CNT1_SEL_W::new(self)
285 }
286 #[doc = "Bit 3"]
287 #[inline(always)]
288 #[must_use]
289 pub fn adpll_timeout_cnt_sel(&mut self) -> ADPLL_TIMEOUT_CNT_SEL_W<3> {
290 ADPLL_TIMEOUT_CNT_SEL_W::new(self)
291 }
292 #[doc = "Bit 4"]
293 #[inline(always)]
294 #[must_use]
295 pub fn adpll_momhold_lmsenb_ext(&mut self) -> ADPLL_MOMHOLD_LMSENB_EXT_W<4> {
296 ADPLL_MOMHOLD_LMSENB_EXT_W::new(self)
297 }
298 #[doc = "Bit 5"]
299 #[inline(always)]
300 #[must_use]
301 pub fn adpll_rst_coarse_det_ext(&mut self) -> ADPLL_RST_COARSE_DET_EXT_W<5> {
302 ADPLL_RST_COARSE_DET_EXT_W::new(self)
303 }
304 #[doc = "Bit 6"]
305 #[inline(always)]
306 #[must_use]
307 pub fn adpll_rst_spd_det_ext(&mut self) -> ADPLL_RST_SPD_DET_EXT_W<6> {
308 ADPLL_RST_SPD_DET_EXT_W::new(self)
309 }
310 #[doc = "Bit 7"]
311 #[inline(always)]
312 #[must_use]
313 pub fn adpll_loop_lock_ext(&mut self) -> ADPLL_LOOP_LOCK_EXT_W<7> {
314 ADPLL_LOOP_LOCK_EXT_W::new(self)
315 }
316 #[doc = "Bit 8"]
317 #[inline(always)]
318 #[must_use]
319 pub fn adpll_fcal_done_ext(&mut self) -> ADPLL_FCAL_DONE_EXT_W<8> {
320 ADPLL_FCAL_DONE_EXT_W::new(self)
321 }
322 #[doc = "Bit 9"]
323 #[inline(always)]
324 #[must_use]
325 pub fn adpll_fcal_start_ext(&mut self) -> ADPLL_FCAL_START_EXT_W<9> {
326 ADPLL_FCAL_START_EXT_W::new(self)
327 }
328 #[doc = "Bit 10"]
329 #[inline(always)]
330 #[must_use]
331 pub fn adpll_lo_lock_directly(&mut self) -> ADPLL_LO_LOCK_DIRECTLY_W<10> {
332 ADPLL_LO_LOCK_DIRECTLY_W::new(self)
333 }
334 #[doc = "Bit 11"]
335 #[inline(always)]
336 #[must_use]
337 pub fn adpll_lo_fsm_ext(&mut self) -> ADPLL_LO_FSM_EXT_W<11> {
338 ADPLL_LO_FSM_EXT_W::new(self)
339 }
340 #[doc = "Bit 12"]
341 #[inline(always)]
342 #[must_use]
343 pub fn adpll_fsm_en(&mut self) -> ADPLL_FSM_EN_W<12> {
344 ADPLL_FSM_EN_W::new(self)
345 }
346 #[doc = "Bit 14"]
347 #[inline(always)]
348 #[must_use]
349 pub fn adpll_lock_fail_en(&mut self) -> ADPLL_LOCK_FAIL_EN_W<14> {
350 ADPLL_LOCK_FAIL_EN_W::new(self)
351 }
352 #[doc = "Bit 15"]
353 #[inline(always)]
354 #[must_use]
355 pub fn adpll_abnormal_dealed(&mut self) -> ADPLL_ABNORMAL_DEALED_W<15> {
356 ADPLL_ABNORMAL_DEALED_W::new(self)
357 }
358 #[doc = "Bit 18"]
359 #[inline(always)]
360 #[must_use]
361 pub fn adpll_vctrl_det_start_ext(&mut self) -> ADPLL_VCTRL_DET_START_EXT_W<18> {
362 ADPLL_VCTRL_DET_START_EXT_W::new(self)
363 }
364 #[doc = "Bit 19"]
365 #[inline(always)]
366 #[must_use]
367 pub fn adpll_vctrl_det_en_ext(&mut self) -> ADPLL_VCTRL_DET_EN_EXT_W<19> {
368 ADPLL_VCTRL_DET_EN_EXT_W::new(self)
369 }
370 #[doc = "Bit 20"]
371 #[inline(always)]
372 #[must_use]
373 pub fn adpll_mom_update_en_ext(&mut self) -> ADPLL_MOM_UPDATE_EN_EXT_W<20> {
374 ADPLL_MOM_UPDATE_EN_EXT_W::new(self)
375 }
376 #[doc = "Bit 21"]
377 #[inline(always)]
378 #[must_use]
379 pub fn adpll_freqerr_det_start_ext(&mut self) -> ADPLL_FREQERR_DET_START_EXT_W<21> {
380 ADPLL_FREQERR_DET_START_EXT_W::new(self)
381 }
382 #[doc = "Bit 22"]
383 #[inline(always)]
384 #[must_use]
385 pub fn adpll_mom_search_en_ext(&mut self) -> ADPLL_MOM_SEARCH_EN_EXT_W<22> {
386 ADPLL_MOM_SEARCH_EN_EXT_W::new(self)
387 }
388 #[doc = "Bit 23"]
389 #[inline(always)]
390 #[must_use]
391 pub fn adpll_lo_open(&mut self) -> ADPLL_LO_OPEN_W<23> {
392 ADPLL_LO_OPEN_W::new(self)
393 }
394 #[doc = "Bit 24"]
395 #[inline(always)]
396 #[must_use]
397 pub fn adpll_sfreg_sel(&mut self) -> ADPLL_SFREG_SEL_W<24> {
398 ADPLL_SFREG_SEL_W::new(self)
399 }
400 #[doc = "Bit 25"]
401 #[inline(always)]
402 #[must_use]
403 pub fn adpll_lo_unlock_intrpt_clear_sel(&mut self) -> ADPLL_LO_UNLOCK_INTRPT_CLEAR_SEL_W<25> {
404 ADPLL_LO_UNLOCK_INTRPT_CLEAR_SEL_W::new(self)
405 }
406 #[doc = "Bit 26"]
407 #[inline(always)]
408 #[must_use]
409 pub fn adpll_force_inc_fcal_en(&mut self) -> ADPLL_FORCE_INC_FCAL_EN_W<26> {
410 ADPLL_FORCE_INC_FCAL_EN_W::new(self)
411 }
412 #[doc = "Writes raw bits to the register."]
413 #[inline(always)]
414 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
415 self.0.bits(bits);
416 self
417 }
418}
419#[doc = "adpll1.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [adpll1](index.html) module"]
420pub struct ADPLL1_SPEC;
421impl crate::RegisterSpec for ADPLL1_SPEC {
422 type Ux = u32;
423}
424#[doc = "`read()` method returns [adpll1::R](R) reader structure"]
425impl crate::Readable for ADPLL1_SPEC {
426 type Reader = R;
427}
428#[doc = "`write(|w| ..)` method takes [adpll1::W](W) writer structure"]
429impl crate::Writable for ADPLL1_SPEC {
430 type Writer = W;
431 const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
432 const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
433}
434#[doc = "`reset()` method sets adpll1 to value 0"]
435impl crate::Resettable for ADPLL1_SPEC {
436 const RESET_VALUE: Self::Ux = 0;
437}