bl702_pac/pds/
rc32m_ctrl0.rs1#[doc = "Register `rc32m_ctrl0` reader"]
2pub struct R(crate::R<RC32M_CTRL0_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<RC32M_CTRL0_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<RC32M_CTRL0_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<RC32M_CTRL0_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `rc32m_ctrl0` writer"]
17pub struct W(crate::W<RC32M_CTRL0_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<RC32M_CTRL0_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<RC32M_CTRL0_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<RC32M_CTRL0_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Field `rc32m_cal_done` reader - "]
38pub type RC32M_CAL_DONE_R = crate::BitReader<bool>;
39#[doc = "Field `rc32m_cal_done` writer - "]
40pub type RC32M_CAL_DONE_W<'a, const O: u8> = crate::BitWriter<'a, u32, RC32M_CTRL0_SPEC, bool, O>;
41#[doc = "Field `rc32m_rdy` reader - "]
42pub type RC32M_RDY_R = crate::BitReader<bool>;
43#[doc = "Field `rc32m_rdy` writer - "]
44pub type RC32M_RDY_W<'a, const O: u8> = crate::BitWriter<'a, u32, RC32M_CTRL0_SPEC, bool, O>;
45#[doc = "Field `rc32m_cal_inprogress` reader - "]
46pub type RC32M_CAL_INPROGRESS_R = crate::BitReader<bool>;
47#[doc = "Field `rc32m_cal_inprogress` writer - "]
48pub type RC32M_CAL_INPROGRESS_W<'a, const O: u8> =
49 crate::BitWriter<'a, u32, RC32M_CTRL0_SPEC, bool, O>;
50#[doc = "Field `rc32m_cal_div` reader - "]
51pub type RC32M_CAL_DIV_R = crate::FieldReader<u8, u8>;
52#[doc = "Field `rc32m_cal_div` writer - "]
53pub type RC32M_CAL_DIV_W<'a, const O: u8> =
54 crate::FieldWriter<'a, u32, RC32M_CTRL0_SPEC, u8, u8, 2, O>;
55#[doc = "Field `rc32m_cal_precharge` reader - "]
56pub type RC32M_CAL_PRECHARGE_R = crate::BitReader<bool>;
57#[doc = "Field `rc32m_cal_precharge` writer - "]
58pub type RC32M_CAL_PRECHARGE_W<'a, const O: u8> =
59 crate::BitWriter<'a, u32, RC32M_CTRL0_SPEC, bool, O>;
60#[doc = "Field `rc32m_dig_code_fr_cal` reader - "]
61pub type RC32M_DIG_CODE_FR_CAL_R = crate::FieldReader<u8, u8>;
62#[doc = "Field `rc32m_dig_code_fr_cal` writer - "]
63pub type RC32M_DIG_CODE_FR_CAL_W<'a, const O: u8> =
64 crate::FieldWriter<'a, u32, RC32M_CTRL0_SPEC, u8, u8, 8, O>;
65#[doc = "Field `rc32m_allow_cal` reader - "]
66pub type RC32M_ALLOW_CAL_R = crate::BitReader<bool>;
67#[doc = "Field `rc32m_allow_cal` writer - "]
68pub type RC32M_ALLOW_CAL_W<'a, const O: u8> = crate::BitWriter<'a, u32, RC32M_CTRL0_SPEC, bool, O>;
69#[doc = "Field `rc32m_refclk_half` reader - "]
70pub type RC32M_REFCLK_HALF_R = crate::BitReader<bool>;
71#[doc = "Field `rc32m_refclk_half` writer - "]
72pub type RC32M_REFCLK_HALF_W<'a, const O: u8> =
73 crate::BitWriter<'a, u32, RC32M_CTRL0_SPEC, bool, O>;
74#[doc = "Field `rc32m_ext_code_en` reader - "]
75pub type RC32M_EXT_CODE_EN_R = crate::BitReader<bool>;
76#[doc = "Field `rc32m_ext_code_en` writer - "]
77pub type RC32M_EXT_CODE_EN_W<'a, const O: u8> =
78 crate::BitWriter<'a, u32, RC32M_CTRL0_SPEC, bool, O>;
79#[doc = "Field `rc32m_cal_en` reader - "]
80pub type RC32M_CAL_EN_R = crate::BitReader<bool>;
81#[doc = "Field `rc32m_cal_en` writer - "]
82pub type RC32M_CAL_EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, RC32M_CTRL0_SPEC, bool, O>;
83#[doc = "Field `rc32m_pd` reader - "]
84pub type RC32M_PD_R = crate::BitReader<bool>;
85#[doc = "Field `rc32m_pd` writer - "]
86pub type RC32M_PD_W<'a, const O: u8> = crate::BitWriter<'a, u32, RC32M_CTRL0_SPEC, bool, O>;
87#[doc = "Field `rc32m_code_fr_ext` reader - "]
88pub type RC32M_CODE_FR_EXT_R = crate::FieldReader<u8, u8>;
89#[doc = "Field `rc32m_code_fr_ext` writer - "]
90pub type RC32M_CODE_FR_EXT_W<'a, const O: u8> =
91 crate::FieldWriter<'a, u32, RC32M_CTRL0_SPEC, u8, u8, 8, O>;
92impl R {
93 #[doc = "Bit 0"]
94 #[inline(always)]
95 pub fn rc32m_cal_done(&self) -> RC32M_CAL_DONE_R {
96 RC32M_CAL_DONE_R::new((self.bits & 1) != 0)
97 }
98 #[doc = "Bit 1"]
99 #[inline(always)]
100 pub fn rc32m_rdy(&self) -> RC32M_RDY_R {
101 RC32M_RDY_R::new(((self.bits >> 1) & 1) != 0)
102 }
103 #[doc = "Bit 2"]
104 #[inline(always)]
105 pub fn rc32m_cal_inprogress(&self) -> RC32M_CAL_INPROGRESS_R {
106 RC32M_CAL_INPROGRESS_R::new(((self.bits >> 2) & 1) != 0)
107 }
108 #[doc = "Bits 3:4"]
109 #[inline(always)]
110 pub fn rc32m_cal_div(&self) -> RC32M_CAL_DIV_R {
111 RC32M_CAL_DIV_R::new(((self.bits >> 3) & 3) as u8)
112 }
113 #[doc = "Bit 5"]
114 #[inline(always)]
115 pub fn rc32m_cal_precharge(&self) -> RC32M_CAL_PRECHARGE_R {
116 RC32M_CAL_PRECHARGE_R::new(((self.bits >> 5) & 1) != 0)
117 }
118 #[doc = "Bits 6:13"]
119 #[inline(always)]
120 pub fn rc32m_dig_code_fr_cal(&self) -> RC32M_DIG_CODE_FR_CAL_R {
121 RC32M_DIG_CODE_FR_CAL_R::new(((self.bits >> 6) & 0xff) as u8)
122 }
123 #[doc = "Bit 17"]
124 #[inline(always)]
125 pub fn rc32m_allow_cal(&self) -> RC32M_ALLOW_CAL_R {
126 RC32M_ALLOW_CAL_R::new(((self.bits >> 17) & 1) != 0)
127 }
128 #[doc = "Bit 18"]
129 #[inline(always)]
130 pub fn rc32m_refclk_half(&self) -> RC32M_REFCLK_HALF_R {
131 RC32M_REFCLK_HALF_R::new(((self.bits >> 18) & 1) != 0)
132 }
133 #[doc = "Bit 19"]
134 #[inline(always)]
135 pub fn rc32m_ext_code_en(&self) -> RC32M_EXT_CODE_EN_R {
136 RC32M_EXT_CODE_EN_R::new(((self.bits >> 19) & 1) != 0)
137 }
138 #[doc = "Bit 20"]
139 #[inline(always)]
140 pub fn rc32m_cal_en(&self) -> RC32M_CAL_EN_R {
141 RC32M_CAL_EN_R::new(((self.bits >> 20) & 1) != 0)
142 }
143 #[doc = "Bit 21"]
144 #[inline(always)]
145 pub fn rc32m_pd(&self) -> RC32M_PD_R {
146 RC32M_PD_R::new(((self.bits >> 21) & 1) != 0)
147 }
148 #[doc = "Bits 22:29"]
149 #[inline(always)]
150 pub fn rc32m_code_fr_ext(&self) -> RC32M_CODE_FR_EXT_R {
151 RC32M_CODE_FR_EXT_R::new(((self.bits >> 22) & 0xff) as u8)
152 }
153}
154impl W {
155 #[doc = "Bit 0"]
156 #[inline(always)]
157 #[must_use]
158 pub fn rc32m_cal_done(&mut self) -> RC32M_CAL_DONE_W<0> {
159 RC32M_CAL_DONE_W::new(self)
160 }
161 #[doc = "Bit 1"]
162 #[inline(always)]
163 #[must_use]
164 pub fn rc32m_rdy(&mut self) -> RC32M_RDY_W<1> {
165 RC32M_RDY_W::new(self)
166 }
167 #[doc = "Bit 2"]
168 #[inline(always)]
169 #[must_use]
170 pub fn rc32m_cal_inprogress(&mut self) -> RC32M_CAL_INPROGRESS_W<2> {
171 RC32M_CAL_INPROGRESS_W::new(self)
172 }
173 #[doc = "Bits 3:4"]
174 #[inline(always)]
175 #[must_use]
176 pub fn rc32m_cal_div(&mut self) -> RC32M_CAL_DIV_W<3> {
177 RC32M_CAL_DIV_W::new(self)
178 }
179 #[doc = "Bit 5"]
180 #[inline(always)]
181 #[must_use]
182 pub fn rc32m_cal_precharge(&mut self) -> RC32M_CAL_PRECHARGE_W<5> {
183 RC32M_CAL_PRECHARGE_W::new(self)
184 }
185 #[doc = "Bits 6:13"]
186 #[inline(always)]
187 #[must_use]
188 pub fn rc32m_dig_code_fr_cal(&mut self) -> RC32M_DIG_CODE_FR_CAL_W<6> {
189 RC32M_DIG_CODE_FR_CAL_W::new(self)
190 }
191 #[doc = "Bit 17"]
192 #[inline(always)]
193 #[must_use]
194 pub fn rc32m_allow_cal(&mut self) -> RC32M_ALLOW_CAL_W<17> {
195 RC32M_ALLOW_CAL_W::new(self)
196 }
197 #[doc = "Bit 18"]
198 #[inline(always)]
199 #[must_use]
200 pub fn rc32m_refclk_half(&mut self) -> RC32M_REFCLK_HALF_W<18> {
201 RC32M_REFCLK_HALF_W::new(self)
202 }
203 #[doc = "Bit 19"]
204 #[inline(always)]
205 #[must_use]
206 pub fn rc32m_ext_code_en(&mut self) -> RC32M_EXT_CODE_EN_W<19> {
207 RC32M_EXT_CODE_EN_W::new(self)
208 }
209 #[doc = "Bit 20"]
210 #[inline(always)]
211 #[must_use]
212 pub fn rc32m_cal_en(&mut self) -> RC32M_CAL_EN_W<20> {
213 RC32M_CAL_EN_W::new(self)
214 }
215 #[doc = "Bit 21"]
216 #[inline(always)]
217 #[must_use]
218 pub fn rc32m_pd(&mut self) -> RC32M_PD_W<21> {
219 RC32M_PD_W::new(self)
220 }
221 #[doc = "Bits 22:29"]
222 #[inline(always)]
223 #[must_use]
224 pub fn rc32m_code_fr_ext(&mut self) -> RC32M_CODE_FR_EXT_W<22> {
225 RC32M_CODE_FR_EXT_W::new(self)
226 }
227 #[doc = "Writes raw bits to the register."]
228 #[inline(always)]
229 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
230 self.0.bits(bits);
231 self
232 }
233}
234#[doc = "rc32m_ctrl0.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rc32m_ctrl0](index.html) module"]
235pub struct RC32M_CTRL0_SPEC;
236impl crate::RegisterSpec for RC32M_CTRL0_SPEC {
237 type Ux = u32;
238}
239#[doc = "`read()` method returns [rc32m_ctrl0::R](R) reader structure"]
240impl crate::Readable for RC32M_CTRL0_SPEC {
241 type Reader = R;
242}
243#[doc = "`write(|w| ..)` method takes [rc32m_ctrl0::W](W) writer structure"]
244impl crate::Writable for RC32M_CTRL0_SPEC {
245 type Writer = W;
246 const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
247 const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
248}
249#[doc = "`reset()` method sets rc32m_ctrl0 to value 0"]
250impl crate::Resettable for RC32M_CTRL0_SPEC {
251 const RESET_VALUE: Self::Ux = 0;
252}