1#[doc = "Register `PDS_CTL` reader"]
2pub struct R(crate::R<PDS_CTL_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<PDS_CTL_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<PDS_CTL_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<PDS_CTL_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `PDS_CTL` writer"]
17pub struct W(crate::W<PDS_CTL_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<PDS_CTL_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<PDS_CTL_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<PDS_CTL_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Field `pds_start_ps` reader - "]
38pub type PDS_START_PS_R = crate::BitReader<bool>;
39#[doc = "Field `pds_start_ps` writer - "]
40pub type PDS_START_PS_W<'a, const O: u8> = crate::BitWriter<'a, u32, PDS_CTL_SPEC, bool, O>;
41#[doc = "Field `cr_sleep_forever` reader - "]
42pub type CR_SLEEP_FOREVER_R = crate::BitReader<bool>;
43#[doc = "Field `cr_sleep_forever` writer - "]
44pub type CR_SLEEP_FOREVER_W<'a, const O: u8> = crate::BitWriter<'a, u32, PDS_CTL_SPEC, bool, O>;
45#[doc = "Field `cr_xtal_force_off` reader - "]
46pub type CR_XTAL_FORCE_OFF_R = crate::BitReader<bool>;
47#[doc = "Field `cr_xtal_force_off` writer - "]
48pub type CR_XTAL_FORCE_OFF_W<'a, const O: u8> = crate::BitWriter<'a, u32, PDS_CTL_SPEC, bool, O>;
49#[doc = "Field `cr_wifi_pds_save_state` reader - "]
50pub type CR_WIFI_PDS_SAVE_STATE_R = crate::BitReader<bool>;
51#[doc = "Field `cr_wifi_pds_save_state` writer - "]
52pub type CR_WIFI_PDS_SAVE_STATE_W<'a, const O: u8> =
53 crate::BitWriter<'a, u32, PDS_CTL_SPEC, bool, O>;
54#[doc = "Field `cr_pds_pd_dcdc18` reader - "]
55pub type CR_PDS_PD_DCDC18_R = crate::BitReader<bool>;
56#[doc = "Field `cr_pds_pd_dcdc18` writer - "]
57pub type CR_PDS_PD_DCDC18_W<'a, const O: u8> = crate::BitWriter<'a, u32, PDS_CTL_SPEC, bool, O>;
58#[doc = "Field `cr_pds_pd_bg_sys` reader - "]
59pub type CR_PDS_PD_BG_SYS_R = crate::BitReader<bool>;
60#[doc = "Field `cr_pds_pd_bg_sys` writer - "]
61pub type CR_PDS_PD_BG_SYS_W<'a, const O: u8> = crate::BitWriter<'a, u32, PDS_CTL_SPEC, bool, O>;
62#[doc = "Field `cr_pds_ctrl_gpio_ie_pu_pd` reader - "]
63pub type CR_PDS_CTRL_GPIO_IE_PU_PD_R = crate::BitReader<bool>;
64#[doc = "Field `cr_pds_ctrl_gpio_ie_pu_pd` writer - "]
65pub type CR_PDS_CTRL_GPIO_IE_PU_PD_W<'a, const O: u8> =
66 crate::BitWriter<'a, u32, PDS_CTL_SPEC, bool, O>;
67#[doc = "Field `cr_pds_ctrl_pu_flash` reader - "]
68pub type CR_PDS_CTRL_PU_FLASH_R = crate::BitReader<bool>;
69#[doc = "Field `cr_pds_ctrl_pu_flash` writer - "]
70pub type CR_PDS_CTRL_PU_FLASH_W<'a, const O: u8> = crate::BitWriter<'a, u32, PDS_CTL_SPEC, bool, O>;
71#[doc = "Field `cr_pds_gate_clk` reader - "]
72pub type CR_PDS_GATE_CLK_R = crate::BitReader<bool>;
73#[doc = "Field `cr_pds_gate_clk` writer - "]
74pub type CR_PDS_GATE_CLK_W<'a, const O: u8> = crate::BitWriter<'a, u32, PDS_CTL_SPEC, bool, O>;
75#[doc = "Field `cr_pds_mem_stby` reader - "]
76pub type CR_PDS_MEM_STBY_R = crate::BitReader<bool>;
77#[doc = "Field `cr_pds_mem_stby` writer - "]
78pub type CR_PDS_MEM_STBY_W<'a, const O: u8> = crate::BitWriter<'a, u32, PDS_CTL_SPEC, bool, O>;
79#[doc = "Field `cr_sw_pu_flash` reader - "]
80pub type CR_SW_PU_FLASH_R = crate::BitReader<bool>;
81#[doc = "Field `cr_sw_pu_flash` writer - "]
82pub type CR_SW_PU_FLASH_W<'a, const O: u8> = crate::BitWriter<'a, u32, PDS_CTL_SPEC, bool, O>;
83#[doc = "Field `cr_pds_iso_en` reader - "]
84pub type CR_PDS_ISO_EN_R = crate::BitReader<bool>;
85#[doc = "Field `cr_pds_iso_en` writer - "]
86pub type CR_PDS_ISO_EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, PDS_CTL_SPEC, bool, O>;
87#[doc = "Field `cr_pds_wait_xtal_rdy` reader - "]
88pub type CR_PDS_WAIT_XTAL_RDY_R = crate::BitReader<bool>;
89#[doc = "Field `cr_pds_wait_xtal_rdy` writer - "]
90pub type CR_PDS_WAIT_XTAL_RDY_W<'a, const O: u8> = crate::BitWriter<'a, u32, PDS_CTL_SPEC, bool, O>;
91#[doc = "Field `cr_pds_pwr_off` reader - "]
92pub type CR_PDS_PWR_OFF_R = crate::BitReader<bool>;
93#[doc = "Field `cr_pds_pwr_off` writer - "]
94pub type CR_PDS_PWR_OFF_W<'a, const O: u8> = crate::BitWriter<'a, u32, PDS_CTL_SPEC, bool, O>;
95#[doc = "Field `cr_pds_pd_xtal` reader - "]
96pub type CR_PDS_PD_XTAL_R = crate::BitReader<bool>;
97#[doc = "Field `cr_pds_pd_xtal` writer - "]
98pub type CR_PDS_PD_XTAL_W<'a, const O: u8> = crate::BitWriter<'a, u32, PDS_CTL_SPEC, bool, O>;
99#[doc = "Field `cr_pds_soc_enb_force_on` reader - "]
100pub type CR_PDS_SOC_ENB_FORCE_ON_R = crate::BitReader<bool>;
101#[doc = "Field `cr_pds_soc_enb_force_on` writer - "]
102pub type CR_PDS_SOC_ENB_FORCE_ON_W<'a, const O: u8> =
103 crate::BitWriter<'a, u32, PDS_CTL_SPEC, bool, O>;
104#[doc = "Field `cr_pds_rst_soc_en` reader - "]
105pub type CR_PDS_RST_SOC_EN_R = crate::BitReader<bool>;
106#[doc = "Field `cr_pds_rst_soc_en` writer - "]
107pub type CR_PDS_RST_SOC_EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, PDS_CTL_SPEC, bool, O>;
108#[doc = "Field `cr_pds_rc32m_off_dis` reader - "]
109pub type CR_PDS_RC32M_OFF_DIS_R = crate::BitReader<bool>;
110#[doc = "Field `cr_pds_rc32m_off_dis` writer - "]
111pub type CR_PDS_RC32M_OFF_DIS_W<'a, const O: u8> = crate::BitWriter<'a, u32, PDS_CTL_SPEC, bool, O>;
112#[doc = "Field `cr_pds_ldo_vsel_en` reader - "]
113pub type CR_PDS_LDO_VSEL_EN_R = crate::BitReader<bool>;
114#[doc = "Field `cr_pds_ldo_vsel_en` writer - "]
115pub type CR_PDS_LDO_VSEL_EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, PDS_CTL_SPEC, bool, O>;
116#[doc = "Field `cr_pds_ram_lp_with_clk_en` reader - "]
117pub type CR_PDS_RAM_LP_WITH_CLK_EN_R = crate::BitReader<bool>;
118#[doc = "Field `cr_pds_ram_lp_with_clk_en` writer - "]
119pub type CR_PDS_RAM_LP_WITH_CLK_EN_W<'a, const O: u8> =
120 crate::BitWriter<'a, u32, PDS_CTL_SPEC, bool, O>;
121#[doc = "Field `cr_np_wfi_mask` reader - "]
122pub type CR_NP_WFI_MASK_R = crate::BitReader<bool>;
123#[doc = "Field `cr_np_wfi_mask` writer - "]
124pub type CR_NP_WFI_MASK_W<'a, const O: u8> = crate::BitWriter<'a, u32, PDS_CTL_SPEC, bool, O>;
125#[doc = "Field `cr_pds_pd_ldo11` reader - "]
126pub type CR_PDS_PD_LDO11_R = crate::BitReader<bool>;
127#[doc = "Field `cr_pds_pd_ldo11` writer - "]
128pub type CR_PDS_PD_LDO11_W<'a, const O: u8> = crate::BitWriter<'a, u32, PDS_CTL_SPEC, bool, O>;
129#[doc = "Field `cr_pds_force_ram_clk_en` reader - "]
130pub type CR_PDS_FORCE_RAM_CLK_EN_R = crate::BitReader<bool>;
131#[doc = "Field `cr_pds_force_ram_clk_en` writer - "]
132pub type CR_PDS_FORCE_RAM_CLK_EN_W<'a, const O: u8> =
133 crate::BitWriter<'a, u32, PDS_CTL_SPEC, bool, O>;
134#[doc = "Field `cr_pds_ldo_vol` reader - "]
135pub type CR_PDS_LDO_VOL_R = crate::FieldReader<u8, u8>;
136#[doc = "Field `cr_pds_ldo_vol` writer - "]
137pub type CR_PDS_LDO_VOL_W<'a, const O: u8> =
138 crate::FieldWriter<'a, u32, PDS_CTL_SPEC, u8, u8, 4, O>;
139#[doc = "Field `cr_pds_ctrl_rf` reader - "]
140pub type CR_PDS_CTRL_RF_R = crate::FieldReader<u8, u8>;
141#[doc = "Field `cr_pds_ctrl_rf` writer - "]
142pub type CR_PDS_CTRL_RF_W<'a, const O: u8> =
143 crate::FieldWriter<'a, u32, PDS_CTL_SPEC, u8, u8, 2, O>;
144#[doc = "Field `cr_pds_ctrl_pll` reader - "]
145pub type CR_PDS_CTRL_PLL_R = crate::FieldReader<u8, u8>;
146#[doc = "Field `cr_pds_ctrl_pll` writer - "]
147pub type CR_PDS_CTRL_PLL_W<'a, const O: u8> =
148 crate::FieldWriter<'a, u32, PDS_CTL_SPEC, u8, u8, 2, O>;
149impl R {
150 #[doc = "Bit 0"]
151 #[inline(always)]
152 pub fn pds_start_ps(&self) -> PDS_START_PS_R {
153 PDS_START_PS_R::new((self.bits & 1) != 0)
154 }
155 #[doc = "Bit 1"]
156 #[inline(always)]
157 pub fn cr_sleep_forever(&self) -> CR_SLEEP_FOREVER_R {
158 CR_SLEEP_FOREVER_R::new(((self.bits >> 1) & 1) != 0)
159 }
160 #[doc = "Bit 2"]
161 #[inline(always)]
162 pub fn cr_xtal_force_off(&self) -> CR_XTAL_FORCE_OFF_R {
163 CR_XTAL_FORCE_OFF_R::new(((self.bits >> 2) & 1) != 0)
164 }
165 #[doc = "Bit 3"]
166 #[inline(always)]
167 pub fn cr_wifi_pds_save_state(&self) -> CR_WIFI_PDS_SAVE_STATE_R {
168 CR_WIFI_PDS_SAVE_STATE_R::new(((self.bits >> 3) & 1) != 0)
169 }
170 #[doc = "Bit 4"]
171 #[inline(always)]
172 pub fn cr_pds_pd_dcdc18(&self) -> CR_PDS_PD_DCDC18_R {
173 CR_PDS_PD_DCDC18_R::new(((self.bits >> 4) & 1) != 0)
174 }
175 #[doc = "Bit 5"]
176 #[inline(always)]
177 pub fn cr_pds_pd_bg_sys(&self) -> CR_PDS_PD_BG_SYS_R {
178 CR_PDS_PD_BG_SYS_R::new(((self.bits >> 5) & 1) != 0)
179 }
180 #[doc = "Bit 6"]
181 #[inline(always)]
182 pub fn cr_pds_ctrl_gpio_ie_pu_pd(&self) -> CR_PDS_CTRL_GPIO_IE_PU_PD_R {
183 CR_PDS_CTRL_GPIO_IE_PU_PD_R::new(((self.bits >> 6) & 1) != 0)
184 }
185 #[doc = "Bit 7"]
186 #[inline(always)]
187 pub fn cr_pds_ctrl_pu_flash(&self) -> CR_PDS_CTRL_PU_FLASH_R {
188 CR_PDS_CTRL_PU_FLASH_R::new(((self.bits >> 7) & 1) != 0)
189 }
190 #[doc = "Bit 8"]
191 #[inline(always)]
192 pub fn cr_pds_gate_clk(&self) -> CR_PDS_GATE_CLK_R {
193 CR_PDS_GATE_CLK_R::new(((self.bits >> 8) & 1) != 0)
194 }
195 #[doc = "Bit 9"]
196 #[inline(always)]
197 pub fn cr_pds_mem_stby(&self) -> CR_PDS_MEM_STBY_R {
198 CR_PDS_MEM_STBY_R::new(((self.bits >> 9) & 1) != 0)
199 }
200 #[doc = "Bit 10"]
201 #[inline(always)]
202 pub fn cr_sw_pu_flash(&self) -> CR_SW_PU_FLASH_R {
203 CR_SW_PU_FLASH_R::new(((self.bits >> 10) & 1) != 0)
204 }
205 #[doc = "Bit 11"]
206 #[inline(always)]
207 pub fn cr_pds_iso_en(&self) -> CR_PDS_ISO_EN_R {
208 CR_PDS_ISO_EN_R::new(((self.bits >> 11) & 1) != 0)
209 }
210 #[doc = "Bit 12"]
211 #[inline(always)]
212 pub fn cr_pds_wait_xtal_rdy(&self) -> CR_PDS_WAIT_XTAL_RDY_R {
213 CR_PDS_WAIT_XTAL_RDY_R::new(((self.bits >> 12) & 1) != 0)
214 }
215 #[doc = "Bit 13"]
216 #[inline(always)]
217 pub fn cr_pds_pwr_off(&self) -> CR_PDS_PWR_OFF_R {
218 CR_PDS_PWR_OFF_R::new(((self.bits >> 13) & 1) != 0)
219 }
220 #[doc = "Bit 14"]
221 #[inline(always)]
222 pub fn cr_pds_pd_xtal(&self) -> CR_PDS_PD_XTAL_R {
223 CR_PDS_PD_XTAL_R::new(((self.bits >> 14) & 1) != 0)
224 }
225 #[doc = "Bit 15"]
226 #[inline(always)]
227 pub fn cr_pds_soc_enb_force_on(&self) -> CR_PDS_SOC_ENB_FORCE_ON_R {
228 CR_PDS_SOC_ENB_FORCE_ON_R::new(((self.bits >> 15) & 1) != 0)
229 }
230 #[doc = "Bit 16"]
231 #[inline(always)]
232 pub fn cr_pds_rst_soc_en(&self) -> CR_PDS_RST_SOC_EN_R {
233 CR_PDS_RST_SOC_EN_R::new(((self.bits >> 16) & 1) != 0)
234 }
235 #[doc = "Bit 17"]
236 #[inline(always)]
237 pub fn cr_pds_rc32m_off_dis(&self) -> CR_PDS_RC32M_OFF_DIS_R {
238 CR_PDS_RC32M_OFF_DIS_R::new(((self.bits >> 17) & 1) != 0)
239 }
240 #[doc = "Bit 18"]
241 #[inline(always)]
242 pub fn cr_pds_ldo_vsel_en(&self) -> CR_PDS_LDO_VSEL_EN_R {
243 CR_PDS_LDO_VSEL_EN_R::new(((self.bits >> 18) & 1) != 0)
244 }
245 #[doc = "Bit 19"]
246 #[inline(always)]
247 pub fn cr_pds_ram_lp_with_clk_en(&self) -> CR_PDS_RAM_LP_WITH_CLK_EN_R {
248 CR_PDS_RAM_LP_WITH_CLK_EN_R::new(((self.bits >> 19) & 1) != 0)
249 }
250 #[doc = "Bit 21"]
251 #[inline(always)]
252 pub fn cr_np_wfi_mask(&self) -> CR_NP_WFI_MASK_R {
253 CR_NP_WFI_MASK_R::new(((self.bits >> 21) & 1) != 0)
254 }
255 #[doc = "Bit 22"]
256 #[inline(always)]
257 pub fn cr_pds_pd_ldo11(&self) -> CR_PDS_PD_LDO11_R {
258 CR_PDS_PD_LDO11_R::new(((self.bits >> 22) & 1) != 0)
259 }
260 #[doc = "Bit 23"]
261 #[inline(always)]
262 pub fn cr_pds_force_ram_clk_en(&self) -> CR_PDS_FORCE_RAM_CLK_EN_R {
263 CR_PDS_FORCE_RAM_CLK_EN_R::new(((self.bits >> 23) & 1) != 0)
264 }
265 #[doc = "Bits 24:27"]
266 #[inline(always)]
267 pub fn cr_pds_ldo_vol(&self) -> CR_PDS_LDO_VOL_R {
268 CR_PDS_LDO_VOL_R::new(((self.bits >> 24) & 0x0f) as u8)
269 }
270 #[doc = "Bits 28:29"]
271 #[inline(always)]
272 pub fn cr_pds_ctrl_rf(&self) -> CR_PDS_CTRL_RF_R {
273 CR_PDS_CTRL_RF_R::new(((self.bits >> 28) & 3) as u8)
274 }
275 #[doc = "Bits 30:31"]
276 #[inline(always)]
277 pub fn cr_pds_ctrl_pll(&self) -> CR_PDS_CTRL_PLL_R {
278 CR_PDS_CTRL_PLL_R::new(((self.bits >> 30) & 3) as u8)
279 }
280}
281impl W {
282 #[doc = "Bit 0"]
283 #[inline(always)]
284 #[must_use]
285 pub fn pds_start_ps(&mut self) -> PDS_START_PS_W<0> {
286 PDS_START_PS_W::new(self)
287 }
288 #[doc = "Bit 1"]
289 #[inline(always)]
290 #[must_use]
291 pub fn cr_sleep_forever(&mut self) -> CR_SLEEP_FOREVER_W<1> {
292 CR_SLEEP_FOREVER_W::new(self)
293 }
294 #[doc = "Bit 2"]
295 #[inline(always)]
296 #[must_use]
297 pub fn cr_xtal_force_off(&mut self) -> CR_XTAL_FORCE_OFF_W<2> {
298 CR_XTAL_FORCE_OFF_W::new(self)
299 }
300 #[doc = "Bit 3"]
301 #[inline(always)]
302 #[must_use]
303 pub fn cr_wifi_pds_save_state(&mut self) -> CR_WIFI_PDS_SAVE_STATE_W<3> {
304 CR_WIFI_PDS_SAVE_STATE_W::new(self)
305 }
306 #[doc = "Bit 4"]
307 #[inline(always)]
308 #[must_use]
309 pub fn cr_pds_pd_dcdc18(&mut self) -> CR_PDS_PD_DCDC18_W<4> {
310 CR_PDS_PD_DCDC18_W::new(self)
311 }
312 #[doc = "Bit 5"]
313 #[inline(always)]
314 #[must_use]
315 pub fn cr_pds_pd_bg_sys(&mut self) -> CR_PDS_PD_BG_SYS_W<5> {
316 CR_PDS_PD_BG_SYS_W::new(self)
317 }
318 #[doc = "Bit 6"]
319 #[inline(always)]
320 #[must_use]
321 pub fn cr_pds_ctrl_gpio_ie_pu_pd(&mut self) -> CR_PDS_CTRL_GPIO_IE_PU_PD_W<6> {
322 CR_PDS_CTRL_GPIO_IE_PU_PD_W::new(self)
323 }
324 #[doc = "Bit 7"]
325 #[inline(always)]
326 #[must_use]
327 pub fn cr_pds_ctrl_pu_flash(&mut self) -> CR_PDS_CTRL_PU_FLASH_W<7> {
328 CR_PDS_CTRL_PU_FLASH_W::new(self)
329 }
330 #[doc = "Bit 8"]
331 #[inline(always)]
332 #[must_use]
333 pub fn cr_pds_gate_clk(&mut self) -> CR_PDS_GATE_CLK_W<8> {
334 CR_PDS_GATE_CLK_W::new(self)
335 }
336 #[doc = "Bit 9"]
337 #[inline(always)]
338 #[must_use]
339 pub fn cr_pds_mem_stby(&mut self) -> CR_PDS_MEM_STBY_W<9> {
340 CR_PDS_MEM_STBY_W::new(self)
341 }
342 #[doc = "Bit 10"]
343 #[inline(always)]
344 #[must_use]
345 pub fn cr_sw_pu_flash(&mut self) -> CR_SW_PU_FLASH_W<10> {
346 CR_SW_PU_FLASH_W::new(self)
347 }
348 #[doc = "Bit 11"]
349 #[inline(always)]
350 #[must_use]
351 pub fn cr_pds_iso_en(&mut self) -> CR_PDS_ISO_EN_W<11> {
352 CR_PDS_ISO_EN_W::new(self)
353 }
354 #[doc = "Bit 12"]
355 #[inline(always)]
356 #[must_use]
357 pub fn cr_pds_wait_xtal_rdy(&mut self) -> CR_PDS_WAIT_XTAL_RDY_W<12> {
358 CR_PDS_WAIT_XTAL_RDY_W::new(self)
359 }
360 #[doc = "Bit 13"]
361 #[inline(always)]
362 #[must_use]
363 pub fn cr_pds_pwr_off(&mut self) -> CR_PDS_PWR_OFF_W<13> {
364 CR_PDS_PWR_OFF_W::new(self)
365 }
366 #[doc = "Bit 14"]
367 #[inline(always)]
368 #[must_use]
369 pub fn cr_pds_pd_xtal(&mut self) -> CR_PDS_PD_XTAL_W<14> {
370 CR_PDS_PD_XTAL_W::new(self)
371 }
372 #[doc = "Bit 15"]
373 #[inline(always)]
374 #[must_use]
375 pub fn cr_pds_soc_enb_force_on(&mut self) -> CR_PDS_SOC_ENB_FORCE_ON_W<15> {
376 CR_PDS_SOC_ENB_FORCE_ON_W::new(self)
377 }
378 #[doc = "Bit 16"]
379 #[inline(always)]
380 #[must_use]
381 pub fn cr_pds_rst_soc_en(&mut self) -> CR_PDS_RST_SOC_EN_W<16> {
382 CR_PDS_RST_SOC_EN_W::new(self)
383 }
384 #[doc = "Bit 17"]
385 #[inline(always)]
386 #[must_use]
387 pub fn cr_pds_rc32m_off_dis(&mut self) -> CR_PDS_RC32M_OFF_DIS_W<17> {
388 CR_PDS_RC32M_OFF_DIS_W::new(self)
389 }
390 #[doc = "Bit 18"]
391 #[inline(always)]
392 #[must_use]
393 pub fn cr_pds_ldo_vsel_en(&mut self) -> CR_PDS_LDO_VSEL_EN_W<18> {
394 CR_PDS_LDO_VSEL_EN_W::new(self)
395 }
396 #[doc = "Bit 19"]
397 #[inline(always)]
398 #[must_use]
399 pub fn cr_pds_ram_lp_with_clk_en(&mut self) -> CR_PDS_RAM_LP_WITH_CLK_EN_W<19> {
400 CR_PDS_RAM_LP_WITH_CLK_EN_W::new(self)
401 }
402 #[doc = "Bit 21"]
403 #[inline(always)]
404 #[must_use]
405 pub fn cr_np_wfi_mask(&mut self) -> CR_NP_WFI_MASK_W<21> {
406 CR_NP_WFI_MASK_W::new(self)
407 }
408 #[doc = "Bit 22"]
409 #[inline(always)]
410 #[must_use]
411 pub fn cr_pds_pd_ldo11(&mut self) -> CR_PDS_PD_LDO11_W<22> {
412 CR_PDS_PD_LDO11_W::new(self)
413 }
414 #[doc = "Bit 23"]
415 #[inline(always)]
416 #[must_use]
417 pub fn cr_pds_force_ram_clk_en(&mut self) -> CR_PDS_FORCE_RAM_CLK_EN_W<23> {
418 CR_PDS_FORCE_RAM_CLK_EN_W::new(self)
419 }
420 #[doc = "Bits 24:27"]
421 #[inline(always)]
422 #[must_use]
423 pub fn cr_pds_ldo_vol(&mut self) -> CR_PDS_LDO_VOL_W<24> {
424 CR_PDS_LDO_VOL_W::new(self)
425 }
426 #[doc = "Bits 28:29"]
427 #[inline(always)]
428 #[must_use]
429 pub fn cr_pds_ctrl_rf(&mut self) -> CR_PDS_CTRL_RF_W<28> {
430 CR_PDS_CTRL_RF_W::new(self)
431 }
432 #[doc = "Bits 30:31"]
433 #[inline(always)]
434 #[must_use]
435 pub fn cr_pds_ctrl_pll(&mut self) -> CR_PDS_CTRL_PLL_W<30> {
436 CR_PDS_CTRL_PLL_W::new(self)
437 }
438 #[doc = "Writes raw bits to the register."]
439 #[inline(always)]
440 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
441 self.0.bits(bits);
442 self
443 }
444}
445#[doc = "PDS_CTL.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [pds_ctl](index.html) module"]
446pub struct PDS_CTL_SPEC;
447impl crate::RegisterSpec for PDS_CTL_SPEC {
448 type Ux = u32;
449}
450#[doc = "`read()` method returns [pds_ctl::R](R) reader structure"]
451impl crate::Readable for PDS_CTL_SPEC {
452 type Reader = R;
453}
454#[doc = "`write(|w| ..)` method takes [pds_ctl::W](W) writer structure"]
455impl crate::Writable for PDS_CTL_SPEC {
456 type Writer = W;
457 const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
458 const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
459}
460#[doc = "`reset()` method sets PDS_CTL to value 0"]
461impl crate::Resettable for PDS_CTL_SPEC {
462 const RESET_VALUE: Self::Ux = 0;
463}