bl702_pac/pds/
clkpll_top_ctrl.rs1#[doc = "Register `clkpll_top_ctrl` reader"]
2pub struct R(crate::R<CLKPLL_TOP_CTRL_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<CLKPLL_TOP_CTRL_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<CLKPLL_TOP_CTRL_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<CLKPLL_TOP_CTRL_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `clkpll_top_ctrl` writer"]
17pub struct W(crate::W<CLKPLL_TOP_CTRL_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<CLKPLL_TOP_CTRL_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<CLKPLL_TOP_CTRL_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<CLKPLL_TOP_CTRL_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Field `clkpll_postdiv` reader - "]
38pub type CLKPLL_POSTDIV_R = crate::FieldReader<u8, u8>;
39#[doc = "Field `clkpll_postdiv` writer - "]
40pub type CLKPLL_POSTDIV_W<'a, const O: u8> =
41 crate::FieldWriter<'a, u32, CLKPLL_TOP_CTRL_SPEC, u8, u8, 7, O>;
42#[doc = "Field `clkpll_refdiv_ratio` reader - "]
43pub type CLKPLL_REFDIV_RATIO_R = crate::FieldReader<u8, u8>;
44#[doc = "Field `clkpll_refdiv_ratio` writer - "]
45pub type CLKPLL_REFDIV_RATIO_W<'a, const O: u8> =
46 crate::FieldWriter<'a, u32, CLKPLL_TOP_CTRL_SPEC, u8, u8, 4, O>;
47#[doc = "Field `clkpll_xtal_rc32m_sel` reader - "]
48pub type CLKPLL_XTAL_RC32M_SEL_R = crate::BitReader<bool>;
49#[doc = "Field `clkpll_xtal_rc32m_sel` writer - "]
50pub type CLKPLL_XTAL_RC32M_SEL_W<'a, const O: u8> =
51 crate::BitWriter<'a, u32, CLKPLL_TOP_CTRL_SPEC, bool, O>;
52#[doc = "Field `clkpll_refclk_sel` reader - "]
53pub type CLKPLL_REFCLK_SEL_R = crate::BitReader<bool>;
54#[doc = "Field `clkpll_refclk_sel` writer - "]
55pub type CLKPLL_REFCLK_SEL_W<'a, const O: u8> =
56 crate::BitWriter<'a, u32, CLKPLL_TOP_CTRL_SPEC, bool, O>;
57#[doc = "Field `clkpll_vg11_sel` reader - "]
58pub type CLKPLL_VG11_SEL_R = crate::FieldReader<u8, u8>;
59#[doc = "Field `clkpll_vg11_sel` writer - "]
60pub type CLKPLL_VG11_SEL_W<'a, const O: u8> =
61 crate::FieldWriter<'a, u32, CLKPLL_TOP_CTRL_SPEC, u8, u8, 2, O>;
62#[doc = "Field `clkpll_resv` reader - "]
63pub type CLKPLL_RESV_R = crate::FieldReader<u8, u8>;
64#[doc = "Field `clkpll_resv` writer - "]
65pub type CLKPLL_RESV_W<'a, const O: u8> =
66 crate::FieldWriter<'a, u32, CLKPLL_TOP_CTRL_SPEC, u8, u8, 2, O>;
67impl R {
68 #[doc = "Bits 0:6"]
69 #[inline(always)]
70 pub fn clkpll_postdiv(&self) -> CLKPLL_POSTDIV_R {
71 CLKPLL_POSTDIV_R::new((self.bits & 0x7f) as u8)
72 }
73 #[doc = "Bits 8:11"]
74 #[inline(always)]
75 pub fn clkpll_refdiv_ratio(&self) -> CLKPLL_REFDIV_RATIO_R {
76 CLKPLL_REFDIV_RATIO_R::new(((self.bits >> 8) & 0x0f) as u8)
77 }
78 #[doc = "Bit 12"]
79 #[inline(always)]
80 pub fn clkpll_xtal_rc32m_sel(&self) -> CLKPLL_XTAL_RC32M_SEL_R {
81 CLKPLL_XTAL_RC32M_SEL_R::new(((self.bits >> 12) & 1) != 0)
82 }
83 #[doc = "Bit 16"]
84 #[inline(always)]
85 pub fn clkpll_refclk_sel(&self) -> CLKPLL_REFCLK_SEL_R {
86 CLKPLL_REFCLK_SEL_R::new(((self.bits >> 16) & 1) != 0)
87 }
88 #[doc = "Bits 20:21"]
89 #[inline(always)]
90 pub fn clkpll_vg11_sel(&self) -> CLKPLL_VG11_SEL_R {
91 CLKPLL_VG11_SEL_R::new(((self.bits >> 20) & 3) as u8)
92 }
93 #[doc = "Bits 24:25"]
94 #[inline(always)]
95 pub fn clkpll_resv(&self) -> CLKPLL_RESV_R {
96 CLKPLL_RESV_R::new(((self.bits >> 24) & 3) as u8)
97 }
98}
99impl W {
100 #[doc = "Bits 0:6"]
101 #[inline(always)]
102 #[must_use]
103 pub fn clkpll_postdiv(&mut self) -> CLKPLL_POSTDIV_W<0> {
104 CLKPLL_POSTDIV_W::new(self)
105 }
106 #[doc = "Bits 8:11"]
107 #[inline(always)]
108 #[must_use]
109 pub fn clkpll_refdiv_ratio(&mut self) -> CLKPLL_REFDIV_RATIO_W<8> {
110 CLKPLL_REFDIV_RATIO_W::new(self)
111 }
112 #[doc = "Bit 12"]
113 #[inline(always)]
114 #[must_use]
115 pub fn clkpll_xtal_rc32m_sel(&mut self) -> CLKPLL_XTAL_RC32M_SEL_W<12> {
116 CLKPLL_XTAL_RC32M_SEL_W::new(self)
117 }
118 #[doc = "Bit 16"]
119 #[inline(always)]
120 #[must_use]
121 pub fn clkpll_refclk_sel(&mut self) -> CLKPLL_REFCLK_SEL_W<16> {
122 CLKPLL_REFCLK_SEL_W::new(self)
123 }
124 #[doc = "Bits 20:21"]
125 #[inline(always)]
126 #[must_use]
127 pub fn clkpll_vg11_sel(&mut self) -> CLKPLL_VG11_SEL_W<20> {
128 CLKPLL_VG11_SEL_W::new(self)
129 }
130 #[doc = "Bits 24:25"]
131 #[inline(always)]
132 #[must_use]
133 pub fn clkpll_resv(&mut self) -> CLKPLL_RESV_W<24> {
134 CLKPLL_RESV_W::new(self)
135 }
136 #[doc = "Writes raw bits to the register."]
137 #[inline(always)]
138 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
139 self.0.bits(bits);
140 self
141 }
142}
143#[doc = "clkpll_top_ctrl.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [clkpll_top_ctrl](index.html) module"]
144pub struct CLKPLL_TOP_CTRL_SPEC;
145impl crate::RegisterSpec for CLKPLL_TOP_CTRL_SPEC {
146 type Ux = u32;
147}
148#[doc = "`read()` method returns [clkpll_top_ctrl::R](R) reader structure"]
149impl crate::Readable for CLKPLL_TOP_CTRL_SPEC {
150 type Reader = R;
151}
152#[doc = "`write(|w| ..)` method takes [clkpll_top_ctrl::W](W) writer structure"]
153impl crate::Writable for CLKPLL_TOP_CTRL_SPEC {
154 type Writer = W;
155 const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
156 const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
157}
158#[doc = "`reset()` method sets clkpll_top_ctrl to value 0"]
159impl crate::Resettable for CLKPLL_TOP_CTRL_SPEC {
160 const RESET_VALUE: Self::Ux = 0;
161}