bl702_pac/pds/
clkpll_cp.rs1#[doc = "Register `clkpll_cp` reader"]
2pub struct R(crate::R<CLKPLL_CP_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<CLKPLL_CP_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<CLKPLL_CP_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<CLKPLL_CP_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `clkpll_cp` writer"]
17pub struct W(crate::W<CLKPLL_CP_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<CLKPLL_CP_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<CLKPLL_CP_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<CLKPLL_CP_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Field `clkpll_sel_cp_bias` reader - "]
38pub type CLKPLL_SEL_CP_BIAS_R = crate::BitReader<bool>;
39#[doc = "Field `clkpll_sel_cp_bias` writer - "]
40pub type CLKPLL_SEL_CP_BIAS_W<'a, const O: u8> = crate::BitWriter<'a, u32, CLKPLL_CP_SPEC, bool, O>;
41#[doc = "Field `clkpll_icp_5u` reader - "]
42pub type CLKPLL_ICP_5U_R = crate::FieldReader<u8, u8>;
43#[doc = "Field `clkpll_icp_5u` writer - "]
44pub type CLKPLL_ICP_5U_W<'a, const O: u8> =
45 crate::FieldWriter<'a, u32, CLKPLL_CP_SPEC, u8, u8, 2, O>;
46#[doc = "Field `clkpll_icp_1u` reader - "]
47pub type CLKPLL_ICP_1U_R = crate::FieldReader<u8, u8>;
48#[doc = "Field `clkpll_icp_1u` writer - "]
49pub type CLKPLL_ICP_1U_W<'a, const O: u8> =
50 crate::FieldWriter<'a, u32, CLKPLL_CP_SPEC, u8, u8, 2, O>;
51#[doc = "Field `clkpll_int_frac_sw` reader - "]
52pub type CLKPLL_INT_FRAC_SW_R = crate::BitReader<bool>;
53#[doc = "Field `clkpll_int_frac_sw` writer - "]
54pub type CLKPLL_INT_FRAC_SW_W<'a, const O: u8> = crate::BitWriter<'a, u32, CLKPLL_CP_SPEC, bool, O>;
55#[doc = "Field `clkpll_cp_startup_en` reader - "]
56pub type CLKPLL_CP_STARTUP_EN_R = crate::BitReader<bool>;
57#[doc = "Field `clkpll_cp_startup_en` writer - "]
58pub type CLKPLL_CP_STARTUP_EN_W<'a, const O: u8> =
59 crate::BitWriter<'a, u32, CLKPLL_CP_SPEC, bool, O>;
60#[doc = "Field `clkpll_cp_opamp_en` reader - "]
61pub type CLKPLL_CP_OPAMP_EN_R = crate::BitReader<bool>;
62#[doc = "Field `clkpll_cp_opamp_en` writer - "]
63pub type CLKPLL_CP_OPAMP_EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CLKPLL_CP_SPEC, bool, O>;
64impl R {
65 #[doc = "Bit 0"]
66 #[inline(always)]
67 pub fn clkpll_sel_cp_bias(&self) -> CLKPLL_SEL_CP_BIAS_R {
68 CLKPLL_SEL_CP_BIAS_R::new((self.bits & 1) != 0)
69 }
70 #[doc = "Bits 4:5"]
71 #[inline(always)]
72 pub fn clkpll_icp_5u(&self) -> CLKPLL_ICP_5U_R {
73 CLKPLL_ICP_5U_R::new(((self.bits >> 4) & 3) as u8)
74 }
75 #[doc = "Bits 6:7"]
76 #[inline(always)]
77 pub fn clkpll_icp_1u(&self) -> CLKPLL_ICP_1U_R {
78 CLKPLL_ICP_1U_R::new(((self.bits >> 6) & 3) as u8)
79 }
80 #[doc = "Bit 8"]
81 #[inline(always)]
82 pub fn clkpll_int_frac_sw(&self) -> CLKPLL_INT_FRAC_SW_R {
83 CLKPLL_INT_FRAC_SW_R::new(((self.bits >> 8) & 1) != 0)
84 }
85 #[doc = "Bit 9"]
86 #[inline(always)]
87 pub fn clkpll_cp_startup_en(&self) -> CLKPLL_CP_STARTUP_EN_R {
88 CLKPLL_CP_STARTUP_EN_R::new(((self.bits >> 9) & 1) != 0)
89 }
90 #[doc = "Bit 10"]
91 #[inline(always)]
92 pub fn clkpll_cp_opamp_en(&self) -> CLKPLL_CP_OPAMP_EN_R {
93 CLKPLL_CP_OPAMP_EN_R::new(((self.bits >> 10) & 1) != 0)
94 }
95}
96impl W {
97 #[doc = "Bit 0"]
98 #[inline(always)]
99 #[must_use]
100 pub fn clkpll_sel_cp_bias(&mut self) -> CLKPLL_SEL_CP_BIAS_W<0> {
101 CLKPLL_SEL_CP_BIAS_W::new(self)
102 }
103 #[doc = "Bits 4:5"]
104 #[inline(always)]
105 #[must_use]
106 pub fn clkpll_icp_5u(&mut self) -> CLKPLL_ICP_5U_W<4> {
107 CLKPLL_ICP_5U_W::new(self)
108 }
109 #[doc = "Bits 6:7"]
110 #[inline(always)]
111 #[must_use]
112 pub fn clkpll_icp_1u(&mut self) -> CLKPLL_ICP_1U_W<6> {
113 CLKPLL_ICP_1U_W::new(self)
114 }
115 #[doc = "Bit 8"]
116 #[inline(always)]
117 #[must_use]
118 pub fn clkpll_int_frac_sw(&mut self) -> CLKPLL_INT_FRAC_SW_W<8> {
119 CLKPLL_INT_FRAC_SW_W::new(self)
120 }
121 #[doc = "Bit 9"]
122 #[inline(always)]
123 #[must_use]
124 pub fn clkpll_cp_startup_en(&mut self) -> CLKPLL_CP_STARTUP_EN_W<9> {
125 CLKPLL_CP_STARTUP_EN_W::new(self)
126 }
127 #[doc = "Bit 10"]
128 #[inline(always)]
129 #[must_use]
130 pub fn clkpll_cp_opamp_en(&mut self) -> CLKPLL_CP_OPAMP_EN_W<10> {
131 CLKPLL_CP_OPAMP_EN_W::new(self)
132 }
133 #[doc = "Writes raw bits to the register."]
134 #[inline(always)]
135 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
136 self.0.bits(bits);
137 self
138 }
139}
140#[doc = "clkpll_cp.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [clkpll_cp](index.html) module"]
141pub struct CLKPLL_CP_SPEC;
142impl crate::RegisterSpec for CLKPLL_CP_SPEC {
143 type Ux = u32;
144}
145#[doc = "`read()` method returns [clkpll_cp::R](R) reader structure"]
146impl crate::Readable for CLKPLL_CP_SPEC {
147 type Reader = R;
148}
149#[doc = "`write(|w| ..)` method takes [clkpll_cp::W](W) writer structure"]
150impl crate::Writable for CLKPLL_CP_SPEC {
151 type Writer = W;
152 const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
153 const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
154}
155#[doc = "`reset()` method sets clkpll_cp to value 0"]
156impl crate::Resettable for CLKPLL_CP_SPEC {
157 const RESET_VALUE: Self::Ux = 0;
158}