bl702_pac/l1c/
l1c_bmx_err_addr_en.rs

1#[doc = "Register `l1c_bmx_err_addr_en` reader"]
2pub struct R(crate::R<L1C_BMX_ERR_ADDR_EN_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<L1C_BMX_ERR_ADDR_EN_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<L1C_BMX_ERR_ADDR_EN_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<L1C_BMX_ERR_ADDR_EN_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `l1c_bmx_err_addr_en` writer"]
17pub struct W(crate::W<L1C_BMX_ERR_ADDR_EN_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<L1C_BMX_ERR_ADDR_EN_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<L1C_BMX_ERR_ADDR_EN_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<L1C_BMX_ERR_ADDR_EN_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `l1c_bmx_err_addr_dis` reader - "]
38pub type L1C_BMX_ERR_ADDR_DIS_R = crate::BitReader<bool>;
39#[doc = "Field `l1c_bmx_err_addr_dis` writer - "]
40pub type L1C_BMX_ERR_ADDR_DIS_W<'a, const O: u8> =
41    crate::BitWriter<'a, u32, L1C_BMX_ERR_ADDR_EN_SPEC, bool, O>;
42#[doc = "Field `l1c_bmx_err_dec` reader - "]
43pub type L1C_BMX_ERR_DEC_R = crate::BitReader<bool>;
44#[doc = "Field `l1c_bmx_err_dec` writer - "]
45pub type L1C_BMX_ERR_DEC_W<'a, const O: u8> =
46    crate::BitWriter<'a, u32, L1C_BMX_ERR_ADDR_EN_SPEC, bool, O>;
47#[doc = "Field `l1c_bmx_err_tz` reader - "]
48pub type L1C_BMX_ERR_TZ_R = crate::BitReader<bool>;
49#[doc = "Field `l1c_bmx_err_tz` writer - "]
50pub type L1C_BMX_ERR_TZ_W<'a, const O: u8> =
51    crate::BitWriter<'a, u32, L1C_BMX_ERR_ADDR_EN_SPEC, bool, O>;
52#[doc = "Field `l1c_hsel_option` reader - "]
53pub type L1C_HSEL_OPTION_R = crate::FieldReader<u8, u8>;
54#[doc = "Field `l1c_hsel_option` writer - "]
55pub type L1C_HSEL_OPTION_W<'a, const O: u8> =
56    crate::FieldWriter<'a, u32, L1C_BMX_ERR_ADDR_EN_SPEC, u8, u8, 4, O>;
57impl R {
58    #[doc = "Bit 0"]
59    #[inline(always)]
60    pub fn l1c_bmx_err_addr_dis(&self) -> L1C_BMX_ERR_ADDR_DIS_R {
61        L1C_BMX_ERR_ADDR_DIS_R::new((self.bits & 1) != 0)
62    }
63    #[doc = "Bit 4"]
64    #[inline(always)]
65    pub fn l1c_bmx_err_dec(&self) -> L1C_BMX_ERR_DEC_R {
66        L1C_BMX_ERR_DEC_R::new(((self.bits >> 4) & 1) != 0)
67    }
68    #[doc = "Bit 5"]
69    #[inline(always)]
70    pub fn l1c_bmx_err_tz(&self) -> L1C_BMX_ERR_TZ_R {
71        L1C_BMX_ERR_TZ_R::new(((self.bits >> 5) & 1) != 0)
72    }
73    #[doc = "Bits 16:19"]
74    #[inline(always)]
75    pub fn l1c_hsel_option(&self) -> L1C_HSEL_OPTION_R {
76        L1C_HSEL_OPTION_R::new(((self.bits >> 16) & 0x0f) as u8)
77    }
78}
79impl W {
80    #[doc = "Bit 0"]
81    #[inline(always)]
82    #[must_use]
83    pub fn l1c_bmx_err_addr_dis(&mut self) -> L1C_BMX_ERR_ADDR_DIS_W<0> {
84        L1C_BMX_ERR_ADDR_DIS_W::new(self)
85    }
86    #[doc = "Bit 4"]
87    #[inline(always)]
88    #[must_use]
89    pub fn l1c_bmx_err_dec(&mut self) -> L1C_BMX_ERR_DEC_W<4> {
90        L1C_BMX_ERR_DEC_W::new(self)
91    }
92    #[doc = "Bit 5"]
93    #[inline(always)]
94    #[must_use]
95    pub fn l1c_bmx_err_tz(&mut self) -> L1C_BMX_ERR_TZ_W<5> {
96        L1C_BMX_ERR_TZ_W::new(self)
97    }
98    #[doc = "Bits 16:19"]
99    #[inline(always)]
100    #[must_use]
101    pub fn l1c_hsel_option(&mut self) -> L1C_HSEL_OPTION_W<16> {
102        L1C_HSEL_OPTION_W::new(self)
103    }
104    #[doc = "Writes raw bits to the register."]
105    #[inline(always)]
106    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
107        self.0.bits(bits);
108        self
109    }
110}
111#[doc = "l1c_bmx_err_addr_en.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [l1c_bmx_err_addr_en](index.html) module"]
112pub struct L1C_BMX_ERR_ADDR_EN_SPEC;
113impl crate::RegisterSpec for L1C_BMX_ERR_ADDR_EN_SPEC {
114    type Ux = u32;
115}
116#[doc = "`read()` method returns [l1c_bmx_err_addr_en::R](R) reader structure"]
117impl crate::Readable for L1C_BMX_ERR_ADDR_EN_SPEC {
118    type Reader = R;
119}
120#[doc = "`write(|w| ..)` method takes [l1c_bmx_err_addr_en::W](W) writer structure"]
121impl crate::Writable for L1C_BMX_ERR_ADDR_EN_SPEC {
122    type Writer = W;
123    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
124    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
125}
126#[doc = "`reset()` method sets l1c_bmx_err_addr_en to value 0"]
127impl crate::Resettable for L1C_BMX_ERR_ADDR_EN_SPEC {
128    const RESET_VALUE: Self::Ux = 0;
129}
bl702_pac/l1c/l1c_bmx_err_addr_en.rs

bl702_pac/l1c/
l1c_bmx_err_addr_en.rs
