bl702_pac/ir/
irtx_pulse_width.rs1#[doc = "Register `irtx_pulse_width` reader"]
2pub struct R(crate::R<IRTX_PULSE_WIDTH_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<IRTX_PULSE_WIDTH_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<IRTX_PULSE_WIDTH_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<IRTX_PULSE_WIDTH_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `irtx_pulse_width` writer"]
17pub struct W(crate::W<IRTX_PULSE_WIDTH_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<IRTX_PULSE_WIDTH_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<IRTX_PULSE_WIDTH_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<IRTX_PULSE_WIDTH_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Field `cr_irtx_pw_unit` reader - "]
38pub type CR_IRTX_PW_UNIT_R = crate::FieldReader<u16, u16>;
39#[doc = "Field `cr_irtx_pw_unit` writer - "]
40pub type CR_IRTX_PW_UNIT_W<'a, const O: u8> =
41 crate::FieldWriter<'a, u32, IRTX_PULSE_WIDTH_SPEC, u16, u16, 12, O>;
42#[doc = "Field `cr_irtx_mod_ph0_w` reader - "]
43pub type CR_IRTX_MOD_PH0_W_R = crate::FieldReader<u8, u8>;
44#[doc = "Field `cr_irtx_mod_ph0_w` writer - "]
45pub type CR_IRTX_MOD_PH0_W_W<'a, const O: u8> =
46 crate::FieldWriter<'a, u32, IRTX_PULSE_WIDTH_SPEC, u8, u8, 8, O>;
47#[doc = "Field `cr_irtx_mod_ph1_w` reader - "]
48pub type CR_IRTX_MOD_PH1_W_R = crate::FieldReader<u8, u8>;
49#[doc = "Field `cr_irtx_mod_ph1_w` writer - "]
50pub type CR_IRTX_MOD_PH1_W_W<'a, const O: u8> =
51 crate::FieldWriter<'a, u32, IRTX_PULSE_WIDTH_SPEC, u8, u8, 8, O>;
52impl R {
53 #[doc = "Bits 0:11"]
54 #[inline(always)]
55 pub fn cr_irtx_pw_unit(&self) -> CR_IRTX_PW_UNIT_R {
56 CR_IRTX_PW_UNIT_R::new((self.bits & 0x0fff) as u16)
57 }
58 #[doc = "Bits 16:23"]
59 #[inline(always)]
60 pub fn cr_irtx_mod_ph0_w(&self) -> CR_IRTX_MOD_PH0_W_R {
61 CR_IRTX_MOD_PH0_W_R::new(((self.bits >> 16) & 0xff) as u8)
62 }
63 #[doc = "Bits 24:31"]
64 #[inline(always)]
65 pub fn cr_irtx_mod_ph1_w(&self) -> CR_IRTX_MOD_PH1_W_R {
66 CR_IRTX_MOD_PH1_W_R::new(((self.bits >> 24) & 0xff) as u8)
67 }
68}
69impl W {
70 #[doc = "Bits 0:11"]
71 #[inline(always)]
72 #[must_use]
73 pub fn cr_irtx_pw_unit(&mut self) -> CR_IRTX_PW_UNIT_W<0> {
74 CR_IRTX_PW_UNIT_W::new(self)
75 }
76 #[doc = "Bits 16:23"]
77 #[inline(always)]
78 #[must_use]
79 pub fn cr_irtx_mod_ph0_w(&mut self) -> CR_IRTX_MOD_PH0_W_W<16> {
80 CR_IRTX_MOD_PH0_W_W::new(self)
81 }
82 #[doc = "Bits 24:31"]
83 #[inline(always)]
84 #[must_use]
85 pub fn cr_irtx_mod_ph1_w(&mut self) -> CR_IRTX_MOD_PH1_W_W<24> {
86 CR_IRTX_MOD_PH1_W_W::new(self)
87 }
88 #[doc = "Writes raw bits to the register."]
89 #[inline(always)]
90 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
91 self.0.bits(bits);
92 self
93 }
94}
95#[doc = "irtx_pulse_width.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [irtx_pulse_width](index.html) module"]
96pub struct IRTX_PULSE_WIDTH_SPEC;
97impl crate::RegisterSpec for IRTX_PULSE_WIDTH_SPEC {
98 type Ux = u32;
99}
100#[doc = "`read()` method returns [irtx_pulse_width::R](R) reader structure"]
101impl crate::Readable for IRTX_PULSE_WIDTH_SPEC {
102 type Reader = R;
103}
104#[doc = "`write(|w| ..)` method takes [irtx_pulse_width::W](W) writer structure"]
105impl crate::Writable for IRTX_PULSE_WIDTH_SPEC {
106 type Writer = W;
107 const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
108 const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
109}
110#[doc = "`reset()` method sets irtx_pulse_width to value 0"]
111impl crate::Resettable for IRTX_PULSE_WIDTH_SPEC {
112 const RESET_VALUE: Self::Ux = 0;
113}