bl702_pac/ir/
irtx_config.rs

1#[doc = "Register `irtx_config` reader"]
2pub struct R(crate::R<IRTX_CONFIG_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<IRTX_CONFIG_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<IRTX_CONFIG_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<IRTX_CONFIG_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `irtx_config` writer"]
17pub struct W(crate::W<IRTX_CONFIG_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<IRTX_CONFIG_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<IRTX_CONFIG_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<IRTX_CONFIG_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `cr_irtx_en` reader - "]
38pub type CR_IRTX_EN_R = crate::BitReader<bool>;
39#[doc = "Field `cr_irtx_en` writer - "]
40pub type CR_IRTX_EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, IRTX_CONFIG_SPEC, bool, O>;
41#[doc = "Field `cr_irtx_out_inv` reader - "]
42pub type CR_IRTX_OUT_INV_R = crate::BitReader<bool>;
43#[doc = "Field `cr_irtx_out_inv` writer - "]
44pub type CR_IRTX_OUT_INV_W<'a, const O: u8> = crate::BitWriter<'a, u32, IRTX_CONFIG_SPEC, bool, O>;
45#[doc = "Field `cr_irtx_mod_en` reader - "]
46pub type CR_IRTX_MOD_EN_R = crate::BitReader<bool>;
47#[doc = "Field `cr_irtx_mod_en` writer - "]
48pub type CR_IRTX_MOD_EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, IRTX_CONFIG_SPEC, bool, O>;
49#[doc = "Field `cr_irtx_swm_en` reader - "]
50pub type CR_IRTX_SWM_EN_R = crate::BitReader<bool>;
51#[doc = "Field `cr_irtx_swm_en` writer - "]
52pub type CR_IRTX_SWM_EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, IRTX_CONFIG_SPEC, bool, O>;
53#[doc = "Field `cr_irtx_data_en` reader - "]
54pub type CR_IRTX_DATA_EN_R = crate::BitReader<bool>;
55#[doc = "Field `cr_irtx_data_en` writer - "]
56pub type CR_IRTX_DATA_EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, IRTX_CONFIG_SPEC, bool, O>;
57#[doc = "Field `cr_irtx_logic0_hl_inv` reader - "]
58pub type CR_IRTX_LOGIC0_HL_INV_R = crate::BitReader<bool>;
59#[doc = "Field `cr_irtx_logic0_hl_inv` writer - "]
60pub type CR_IRTX_LOGIC0_HL_INV_W<'a, const O: u8> =
61    crate::BitWriter<'a, u32, IRTX_CONFIG_SPEC, bool, O>;
62#[doc = "Field `cr_irtx_logic1_hl_inv` reader - "]
63pub type CR_IRTX_LOGIC1_HL_INV_R = crate::BitReader<bool>;
64#[doc = "Field `cr_irtx_logic1_hl_inv` writer - "]
65pub type CR_IRTX_LOGIC1_HL_INV_W<'a, const O: u8> =
66    crate::BitWriter<'a, u32, IRTX_CONFIG_SPEC, bool, O>;
67#[doc = "Field `cr_irtx_head_en` reader - "]
68pub type CR_IRTX_HEAD_EN_R = crate::BitReader<bool>;
69#[doc = "Field `cr_irtx_head_en` writer - "]
70pub type CR_IRTX_HEAD_EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, IRTX_CONFIG_SPEC, bool, O>;
71#[doc = "Field `cr_irtx_head_hl_inv` reader - "]
72pub type CR_IRTX_HEAD_HL_INV_R = crate::BitReader<bool>;
73#[doc = "Field `cr_irtx_head_hl_inv` writer - "]
74pub type CR_IRTX_HEAD_HL_INV_W<'a, const O: u8> =
75    crate::BitWriter<'a, u32, IRTX_CONFIG_SPEC, bool, O>;
76#[doc = "Field `cr_irtx_tail_en` reader - "]
77pub type CR_IRTX_TAIL_EN_R = crate::BitReader<bool>;
78#[doc = "Field `cr_irtx_tail_en` writer - "]
79pub type CR_IRTX_TAIL_EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, IRTX_CONFIG_SPEC, bool, O>;
80#[doc = "Field `cr_irtx_tail_hl_inv` reader - "]
81pub type CR_IRTX_TAIL_HL_INV_R = crate::BitReader<bool>;
82#[doc = "Field `cr_irtx_tail_hl_inv` writer - "]
83pub type CR_IRTX_TAIL_HL_INV_W<'a, const O: u8> =
84    crate::BitWriter<'a, u32, IRTX_CONFIG_SPEC, bool, O>;
85#[doc = "Field `cr_irtx_data_num` reader - "]
86pub type CR_IRTX_DATA_NUM_R = crate::FieldReader<u8, u8>;
87#[doc = "Field `cr_irtx_data_num` writer - "]
88pub type CR_IRTX_DATA_NUM_W<'a, const O: u8> =
89    crate::FieldWriter<'a, u32, IRTX_CONFIG_SPEC, u8, u8, 6, O>;
90impl R {
91    #[doc = "Bit 0"]
92    #[inline(always)]
93    pub fn cr_irtx_en(&self) -> CR_IRTX_EN_R {
94        CR_IRTX_EN_R::new((self.bits & 1) != 0)
95    }
96    #[doc = "Bit 1"]
97    #[inline(always)]
98    pub fn cr_irtx_out_inv(&self) -> CR_IRTX_OUT_INV_R {
99        CR_IRTX_OUT_INV_R::new(((self.bits >> 1) & 1) != 0)
100    }
101    #[doc = "Bit 2"]
102    #[inline(always)]
103    pub fn cr_irtx_mod_en(&self) -> CR_IRTX_MOD_EN_R {
104        CR_IRTX_MOD_EN_R::new(((self.bits >> 2) & 1) != 0)
105    }
106    #[doc = "Bit 3"]
107    #[inline(always)]
108    pub fn cr_irtx_swm_en(&self) -> CR_IRTX_SWM_EN_R {
109        CR_IRTX_SWM_EN_R::new(((self.bits >> 3) & 1) != 0)
110    }
111    #[doc = "Bit 4"]
112    #[inline(always)]
113    pub fn cr_irtx_data_en(&self) -> CR_IRTX_DATA_EN_R {
114        CR_IRTX_DATA_EN_R::new(((self.bits >> 4) & 1) != 0)
115    }
116    #[doc = "Bit 5"]
117    #[inline(always)]
118    pub fn cr_irtx_logic0_hl_inv(&self) -> CR_IRTX_LOGIC0_HL_INV_R {
119        CR_IRTX_LOGIC0_HL_INV_R::new(((self.bits >> 5) & 1) != 0)
120    }
121    #[doc = "Bit 6"]
122    #[inline(always)]
123    pub fn cr_irtx_logic1_hl_inv(&self) -> CR_IRTX_LOGIC1_HL_INV_R {
124        CR_IRTX_LOGIC1_HL_INV_R::new(((self.bits >> 6) & 1) != 0)
125    }
126    #[doc = "Bit 8"]
127    #[inline(always)]
128    pub fn cr_irtx_head_en(&self) -> CR_IRTX_HEAD_EN_R {
129        CR_IRTX_HEAD_EN_R::new(((self.bits >> 8) & 1) != 0)
130    }
131    #[doc = "Bit 9"]
132    #[inline(always)]
133    pub fn cr_irtx_head_hl_inv(&self) -> CR_IRTX_HEAD_HL_INV_R {
134        CR_IRTX_HEAD_HL_INV_R::new(((self.bits >> 9) & 1) != 0)
135    }
136    #[doc = "Bit 10"]
137    #[inline(always)]
138    pub fn cr_irtx_tail_en(&self) -> CR_IRTX_TAIL_EN_R {
139        CR_IRTX_TAIL_EN_R::new(((self.bits >> 10) & 1) != 0)
140    }
141    #[doc = "Bit 11"]
142    #[inline(always)]
143    pub fn cr_irtx_tail_hl_inv(&self) -> CR_IRTX_TAIL_HL_INV_R {
144        CR_IRTX_TAIL_HL_INV_R::new(((self.bits >> 11) & 1) != 0)
145    }
146    #[doc = "Bits 12:17"]
147    #[inline(always)]
148    pub fn cr_irtx_data_num(&self) -> CR_IRTX_DATA_NUM_R {
149        CR_IRTX_DATA_NUM_R::new(((self.bits >> 12) & 0x3f) as u8)
150    }
151}
152impl W {
153    #[doc = "Bit 0"]
154    #[inline(always)]
155    #[must_use]
156    pub fn cr_irtx_en(&mut self) -> CR_IRTX_EN_W<0> {
157        CR_IRTX_EN_W::new(self)
158    }
159    #[doc = "Bit 1"]
160    #[inline(always)]
161    #[must_use]
162    pub fn cr_irtx_out_inv(&mut self) -> CR_IRTX_OUT_INV_W<1> {
163        CR_IRTX_OUT_INV_W::new(self)
164    }
165    #[doc = "Bit 2"]
166    #[inline(always)]
167    #[must_use]
168    pub fn cr_irtx_mod_en(&mut self) -> CR_IRTX_MOD_EN_W<2> {
169        CR_IRTX_MOD_EN_W::new(self)
170    }
171    #[doc = "Bit 3"]
172    #[inline(always)]
173    #[must_use]
174    pub fn cr_irtx_swm_en(&mut self) -> CR_IRTX_SWM_EN_W<3> {
175        CR_IRTX_SWM_EN_W::new(self)
176    }
177    #[doc = "Bit 4"]
178    #[inline(always)]
179    #[must_use]
180    pub fn cr_irtx_data_en(&mut self) -> CR_IRTX_DATA_EN_W<4> {
181        CR_IRTX_DATA_EN_W::new(self)
182    }
183    #[doc = "Bit 5"]
184    #[inline(always)]
185    #[must_use]
186    pub fn cr_irtx_logic0_hl_inv(&mut self) -> CR_IRTX_LOGIC0_HL_INV_W<5> {
187        CR_IRTX_LOGIC0_HL_INV_W::new(self)
188    }
189    #[doc = "Bit 6"]
190    #[inline(always)]
191    #[must_use]
192    pub fn cr_irtx_logic1_hl_inv(&mut self) -> CR_IRTX_LOGIC1_HL_INV_W<6> {
193        CR_IRTX_LOGIC1_HL_INV_W::new(self)
194    }
195    #[doc = "Bit 8"]
196    #[inline(always)]
197    #[must_use]
198    pub fn cr_irtx_head_en(&mut self) -> CR_IRTX_HEAD_EN_W<8> {
199        CR_IRTX_HEAD_EN_W::new(self)
200    }
201    #[doc = "Bit 9"]
202    #[inline(always)]
203    #[must_use]
204    pub fn cr_irtx_head_hl_inv(&mut self) -> CR_IRTX_HEAD_HL_INV_W<9> {
205        CR_IRTX_HEAD_HL_INV_W::new(self)
206    }
207    #[doc = "Bit 10"]
208    #[inline(always)]
209    #[must_use]
210    pub fn cr_irtx_tail_en(&mut self) -> CR_IRTX_TAIL_EN_W<10> {
211        CR_IRTX_TAIL_EN_W::new(self)
212    }
213    #[doc = "Bit 11"]
214    #[inline(always)]
215    #[must_use]
216    pub fn cr_irtx_tail_hl_inv(&mut self) -> CR_IRTX_TAIL_HL_INV_W<11> {
217        CR_IRTX_TAIL_HL_INV_W::new(self)
218    }
219    #[doc = "Bits 12:17"]
220    #[inline(always)]
221    #[must_use]
222    pub fn cr_irtx_data_num(&mut self) -> CR_IRTX_DATA_NUM_W<12> {
223        CR_IRTX_DATA_NUM_W::new(self)
224    }
225    #[doc = "Writes raw bits to the register."]
226    #[inline(always)]
227    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
228        self.0.bits(bits);
229        self
230    }
231}
232#[doc = "irtx_config.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [irtx_config](index.html) module"]
233pub struct IRTX_CONFIG_SPEC;
234impl crate::RegisterSpec for IRTX_CONFIG_SPEC {
235    type Ux = u32;
236}
237#[doc = "`read()` method returns [irtx_config::R](R) reader structure"]
238impl crate::Readable for IRTX_CONFIG_SPEC {
239    type Reader = R;
240}
241#[doc = "`write(|w| ..)` method takes [irtx_config::W](W) writer structure"]
242impl crate::Writable for IRTX_CONFIG_SPEC {
243    type Writer = W;
244    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
245    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
246}
247#[doc = "`reset()` method sets irtx_config to value 0"]
248impl crate::Resettable for IRTX_CONFIG_SPEC {
249    const RESET_VALUE: Self::Ux = 0;
250}
bl702_pac/ir/irtx_config.rs

bl702_pac/ir/
irtx_config.rs
