bl702_pac/hbn/
rc32k_ctrl0.rs

1#[doc = "Register `rc32k_ctrl0` reader"]
2pub struct R(crate::R<RC32K_CTRL0_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<RC32K_CTRL0_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<RC32K_CTRL0_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<RC32K_CTRL0_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `rc32k_ctrl0` writer"]
17pub struct W(crate::W<RC32K_CTRL0_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<RC32K_CTRL0_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<RC32K_CTRL0_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<RC32K_CTRL0_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `rc32k_cal_done` reader - "]
38pub type RC32K_CAL_DONE_R = crate::BitReader<bool>;
39#[doc = "Field `rc32k_cal_done` writer - "]
40pub type RC32K_CAL_DONE_W<'a, const O: u8> = crate::BitWriter<'a, u32, RC32K_CTRL0_SPEC, bool, O>;
41#[doc = "Field `rc32k_rdy` reader - "]
42pub type RC32K_RDY_R = crate::BitReader<bool>;
43#[doc = "Field `rc32k_rdy` writer - "]
44pub type RC32K_RDY_W<'a, const O: u8> = crate::BitWriter<'a, u32, RC32K_CTRL0_SPEC, bool, O>;
45#[doc = "Field `rc32k_cal_inprogress` reader - "]
46pub type RC32K_CAL_INPROGRESS_R = crate::BitReader<bool>;
47#[doc = "Field `rc32k_cal_inprogress` writer - "]
48pub type RC32K_CAL_INPROGRESS_W<'a, const O: u8> =
49    crate::BitWriter<'a, u32, RC32K_CTRL0_SPEC, bool, O>;
50#[doc = "Field `rc32k_cal_div` reader - "]
51pub type RC32K_CAL_DIV_R = crate::FieldReader<u8, u8>;
52#[doc = "Field `rc32k_cal_div` writer - "]
53pub type RC32K_CAL_DIV_W<'a, const O: u8> =
54    crate::FieldWriter<'a, u32, RC32K_CTRL0_SPEC, u8, u8, 2, O>;
55#[doc = "Field `rc32k_cal_precharge` reader - "]
56pub type RC32K_CAL_PRECHARGE_R = crate::BitReader<bool>;
57#[doc = "Field `rc32k_cal_precharge` writer - "]
58pub type RC32K_CAL_PRECHARGE_W<'a, const O: u8> =
59    crate::BitWriter<'a, u32, RC32K_CTRL0_SPEC, bool, O>;
60#[doc = "Field `rc32k_dig_code_fr_cal` reader - "]
61pub type RC32K_DIG_CODE_FR_CAL_R = crate::FieldReader<u16, u16>;
62#[doc = "Field `rc32k_dig_code_fr_cal` writer - "]
63pub type RC32K_DIG_CODE_FR_CAL_W<'a, const O: u8> =
64    crate::FieldWriter<'a, u32, RC32K_CTRL0_SPEC, u16, u16, 10, O>;
65#[doc = "Field `rc32k_vref_dly` reader - "]
66pub type RC32K_VREF_DLY_R = crate::FieldReader<u8, u8>;
67#[doc = "Field `rc32k_vref_dly` writer - "]
68pub type RC32K_VREF_DLY_W<'a, const O: u8> =
69    crate::FieldWriter<'a, u32, RC32K_CTRL0_SPEC, u8, u8, 2, O>;
70#[doc = "Field `rc32k_allow_cal` reader - "]
71pub type RC32K_ALLOW_CAL_R = crate::BitReader<bool>;
72#[doc = "Field `rc32k_allow_cal` writer - "]
73pub type RC32K_ALLOW_CAL_W<'a, const O: u8> = crate::BitWriter<'a, u32, RC32K_CTRL0_SPEC, bool, O>;
74#[doc = "Field `rc32k_ext_code_en` reader - "]
75pub type RC32K_EXT_CODE_EN_R = crate::BitReader<bool>;
76#[doc = "Field `rc32k_ext_code_en` writer - "]
77pub type RC32K_EXT_CODE_EN_W<'a, const O: u8> =
78    crate::BitWriter<'a, u32, RC32K_CTRL0_SPEC, bool, O>;
79#[doc = "Field `rc32k_cal_en` reader - "]
80pub type RC32K_CAL_EN_R = crate::BitReader<bool>;
81#[doc = "Field `rc32k_cal_en` writer - "]
82pub type RC32K_CAL_EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, RC32K_CTRL0_SPEC, bool, O>;
83#[doc = "Field `rc32k_code_fr_ext` reader - "]
84pub type RC32K_CODE_FR_EXT_R = crate::FieldReader<u16, u16>;
85#[doc = "Field `rc32k_code_fr_ext` writer - "]
86pub type RC32K_CODE_FR_EXT_W<'a, const O: u8> =
87    crate::FieldWriter<'a, u32, RC32K_CTRL0_SPEC, u16, u16, 10, O>;
88impl R {
89    #[doc = "Bit 0"]
90    #[inline(always)]
91    pub fn rc32k_cal_done(&self) -> RC32K_CAL_DONE_R {
92        RC32K_CAL_DONE_R::new((self.bits & 1) != 0)
93    }
94    #[doc = "Bit 1"]
95    #[inline(always)]
96    pub fn rc32k_rdy(&self) -> RC32K_RDY_R {
97        RC32K_RDY_R::new(((self.bits >> 1) & 1) != 0)
98    }
99    #[doc = "Bit 2"]
100    #[inline(always)]
101    pub fn rc32k_cal_inprogress(&self) -> RC32K_CAL_INPROGRESS_R {
102        RC32K_CAL_INPROGRESS_R::new(((self.bits >> 2) & 1) != 0)
103    }
104    #[doc = "Bits 3:4"]
105    #[inline(always)]
106    pub fn rc32k_cal_div(&self) -> RC32K_CAL_DIV_R {
107        RC32K_CAL_DIV_R::new(((self.bits >> 3) & 3) as u8)
108    }
109    #[doc = "Bit 5"]
110    #[inline(always)]
111    pub fn rc32k_cal_precharge(&self) -> RC32K_CAL_PRECHARGE_R {
112        RC32K_CAL_PRECHARGE_R::new(((self.bits >> 5) & 1) != 0)
113    }
114    #[doc = "Bits 6:15"]
115    #[inline(always)]
116    pub fn rc32k_dig_code_fr_cal(&self) -> RC32K_DIG_CODE_FR_CAL_R {
117        RC32K_DIG_CODE_FR_CAL_R::new(((self.bits >> 6) & 0x03ff) as u16)
118    }
119    #[doc = "Bits 16:17"]
120    #[inline(always)]
121    pub fn rc32k_vref_dly(&self) -> RC32K_VREF_DLY_R {
122        RC32K_VREF_DLY_R::new(((self.bits >> 16) & 3) as u8)
123    }
124    #[doc = "Bit 18"]
125    #[inline(always)]
126    pub fn rc32k_allow_cal(&self) -> RC32K_ALLOW_CAL_R {
127        RC32K_ALLOW_CAL_R::new(((self.bits >> 18) & 1) != 0)
128    }
129    #[doc = "Bit 19"]
130    #[inline(always)]
131    pub fn rc32k_ext_code_en(&self) -> RC32K_EXT_CODE_EN_R {
132        RC32K_EXT_CODE_EN_R::new(((self.bits >> 19) & 1) != 0)
133    }
134    #[doc = "Bit 20"]
135    #[inline(always)]
136    pub fn rc32k_cal_en(&self) -> RC32K_CAL_EN_R {
137        RC32K_CAL_EN_R::new(((self.bits >> 20) & 1) != 0)
138    }
139    #[doc = "Bits 22:31"]
140    #[inline(always)]
141    pub fn rc32k_code_fr_ext(&self) -> RC32K_CODE_FR_EXT_R {
142        RC32K_CODE_FR_EXT_R::new(((self.bits >> 22) & 0x03ff) as u16)
143    }
144}
145impl W {
146    #[doc = "Bit 0"]
147    #[inline(always)]
148    #[must_use]
149    pub fn rc32k_cal_done(&mut self) -> RC32K_CAL_DONE_W<0> {
150        RC32K_CAL_DONE_W::new(self)
151    }
152    #[doc = "Bit 1"]
153    #[inline(always)]
154    #[must_use]
155    pub fn rc32k_rdy(&mut self) -> RC32K_RDY_W<1> {
156        RC32K_RDY_W::new(self)
157    }
158    #[doc = "Bit 2"]
159    #[inline(always)]
160    #[must_use]
161    pub fn rc32k_cal_inprogress(&mut self) -> RC32K_CAL_INPROGRESS_W<2> {
162        RC32K_CAL_INPROGRESS_W::new(self)
163    }
164    #[doc = "Bits 3:4"]
165    #[inline(always)]
166    #[must_use]
167    pub fn rc32k_cal_div(&mut self) -> RC32K_CAL_DIV_W<3> {
168        RC32K_CAL_DIV_W::new(self)
169    }
170    #[doc = "Bit 5"]
171    #[inline(always)]
172    #[must_use]
173    pub fn rc32k_cal_precharge(&mut self) -> RC32K_CAL_PRECHARGE_W<5> {
174        RC32K_CAL_PRECHARGE_W::new(self)
175    }
176    #[doc = "Bits 6:15"]
177    #[inline(always)]
178    #[must_use]
179    pub fn rc32k_dig_code_fr_cal(&mut self) -> RC32K_DIG_CODE_FR_CAL_W<6> {
180        RC32K_DIG_CODE_FR_CAL_W::new(self)
181    }
182    #[doc = "Bits 16:17"]
183    #[inline(always)]
184    #[must_use]
185    pub fn rc32k_vref_dly(&mut self) -> RC32K_VREF_DLY_W<16> {
186        RC32K_VREF_DLY_W::new(self)
187    }
188    #[doc = "Bit 18"]
189    #[inline(always)]
190    #[must_use]
191    pub fn rc32k_allow_cal(&mut self) -> RC32K_ALLOW_CAL_W<18> {
192        RC32K_ALLOW_CAL_W::new(self)
193    }
194    #[doc = "Bit 19"]
195    #[inline(always)]
196    #[must_use]
197    pub fn rc32k_ext_code_en(&mut self) -> RC32K_EXT_CODE_EN_W<19> {
198        RC32K_EXT_CODE_EN_W::new(self)
199    }
200    #[doc = "Bit 20"]
201    #[inline(always)]
202    #[must_use]
203    pub fn rc32k_cal_en(&mut self) -> RC32K_CAL_EN_W<20> {
204        RC32K_CAL_EN_W::new(self)
205    }
206    #[doc = "Bits 22:31"]
207    #[inline(always)]
208    #[must_use]
209    pub fn rc32k_code_fr_ext(&mut self) -> RC32K_CODE_FR_EXT_W<22> {
210        RC32K_CODE_FR_EXT_W::new(self)
211    }
212    #[doc = "Writes raw bits to the register."]
213    #[inline(always)]
214    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
215        self.0.bits(bits);
216        self
217    }
218}
219#[doc = "rc32k_ctrl0.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rc32k_ctrl0](index.html) module"]
220pub struct RC32K_CTRL0_SPEC;
221impl crate::RegisterSpec for RC32K_CTRL0_SPEC {
222    type Ux = u32;
223}
224#[doc = "`read()` method returns [rc32k_ctrl0::R](R) reader structure"]
225impl crate::Readable for RC32K_CTRL0_SPEC {
226    type Reader = R;
227}
228#[doc = "`write(|w| ..)` method takes [rc32k_ctrl0::W](W) writer structure"]
229impl crate::Writable for RC32K_CTRL0_SPEC {
230    type Writer = W;
231    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
232    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
233}
234#[doc = "`reset()` method sets rc32k_ctrl0 to value 0"]
235impl crate::Resettable for RC32K_CTRL0_SPEC {
236    const RESET_VALUE: Self::Ux = 0;
237}