bl702_pac/glb/
tzc_glb_ctrl_0.rs

1#[doc = "Register `tzc_glb_ctrl_0` reader"]
2pub struct R(crate::R<TZC_GLB_CTRL_0_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<TZC_GLB_CTRL_0_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<TZC_GLB_CTRL_0_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<TZC_GLB_CTRL_0_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `tzc_glb_ctrl_0` writer"]
17pub struct W(crate::W<TZC_GLB_CTRL_0_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<TZC_GLB_CTRL_0_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<TZC_GLB_CTRL_0_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<TZC_GLB_CTRL_0_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `tzc_glb_swrst_s00_lock` reader - "]
38pub type TZC_GLB_SWRST_S00_LOCK_R = crate::BitReader<bool>;
39#[doc = "Field `tzc_glb_swrst_s00_lock` writer - "]
40pub type TZC_GLB_SWRST_S00_LOCK_W<'a, const O: u8> =
41    crate::BitWriter<'a, u32, TZC_GLB_CTRL_0_SPEC, bool, O>;
42#[doc = "Field `tzc_glb_swrst_s01_lock` reader - "]
43pub type TZC_GLB_SWRST_S01_LOCK_R = crate::BitReader<bool>;
44#[doc = "Field `tzc_glb_swrst_s01_lock` writer - "]
45pub type TZC_GLB_SWRST_S01_LOCK_W<'a, const O: u8> =
46    crate::BitWriter<'a, u32, TZC_GLB_CTRL_0_SPEC, bool, O>;
47#[doc = "Field `tzc_glb_swrst_s30_lock` reader - "]
48pub type TZC_GLB_SWRST_S30_LOCK_R = crate::BitReader<bool>;
49#[doc = "Field `tzc_glb_swrst_s30_lock` writer - "]
50pub type TZC_GLB_SWRST_S30_LOCK_W<'a, const O: u8> =
51    crate::BitWriter<'a, u32, TZC_GLB_CTRL_0_SPEC, bool, O>;
52#[doc = "Field `tzc_glb_ctrl_pwron_rst_lock` reader - "]
53pub type TZC_GLB_CTRL_PWRON_RST_LOCK_R = crate::BitReader<bool>;
54#[doc = "Field `tzc_glb_ctrl_pwron_rst_lock` writer - "]
55pub type TZC_GLB_CTRL_PWRON_RST_LOCK_W<'a, const O: u8> =
56    crate::BitWriter<'a, u32, TZC_GLB_CTRL_0_SPEC, bool, O>;
57#[doc = "Field `tzc_glb_ctrl_cpu_reset_lock` reader - "]
58pub type TZC_GLB_CTRL_CPU_RESET_LOCK_R = crate::BitReader<bool>;
59#[doc = "Field `tzc_glb_ctrl_cpu_reset_lock` writer - "]
60pub type TZC_GLB_CTRL_CPU_RESET_LOCK_W<'a, const O: u8> =
61    crate::BitWriter<'a, u32, TZC_GLB_CTRL_0_SPEC, bool, O>;
62#[doc = "Field `tzc_glb_ctrl_sys_reset_lock` reader - "]
63pub type TZC_GLB_CTRL_SYS_RESET_LOCK_R = crate::BitReader<bool>;
64#[doc = "Field `tzc_glb_ctrl_sys_reset_lock` writer - "]
65pub type TZC_GLB_CTRL_SYS_RESET_LOCK_W<'a, const O: u8> =
66    crate::BitWriter<'a, u32, TZC_GLB_CTRL_0_SPEC, bool, O>;
67#[doc = "Field `tzc_glb_ctrl_ungated_ap_lock` reader - "]
68pub type TZC_GLB_CTRL_UNGATED_AP_LOCK_R = crate::BitReader<bool>;
69#[doc = "Field `tzc_glb_ctrl_ungated_ap_lock` writer - "]
70pub type TZC_GLB_CTRL_UNGATED_AP_LOCK_W<'a, const O: u8> =
71    crate::BitWriter<'a, u32, TZC_GLB_CTRL_0_SPEC, bool, O>;
72#[doc = "Field `tzc_glb_misc_lock` reader - "]
73pub type TZC_GLB_MISC_LOCK_R = crate::BitReader<bool>;
74#[doc = "Field `tzc_glb_misc_lock` writer - "]
75pub type TZC_GLB_MISC_LOCK_W<'a, const O: u8> =
76    crate::BitWriter<'a, u32, TZC_GLB_CTRL_0_SPEC, bool, O>;
77#[doc = "Field `tzc_glb_sram_lock` reader - "]
78pub type TZC_GLB_SRAM_LOCK_R = crate::BitReader<bool>;
79#[doc = "Field `tzc_glb_sram_lock` writer - "]
80pub type TZC_GLB_SRAM_LOCK_W<'a, const O: u8> =
81    crate::BitWriter<'a, u32, TZC_GLB_CTRL_0_SPEC, bool, O>;
82#[doc = "Field `tzc_glb_l2c_lock` reader - "]
83pub type TZC_GLB_L2C_LOCK_R = crate::BitReader<bool>;
84#[doc = "Field `tzc_glb_l2c_lock` writer - "]
85pub type TZC_GLB_L2C_LOCK_W<'a, const O: u8> =
86    crate::BitWriter<'a, u32, TZC_GLB_CTRL_0_SPEC, bool, O>;
87#[doc = "Field `tzc_glb_bmx_lock` reader - "]
88pub type TZC_GLB_BMX_LOCK_R = crate::BitReader<bool>;
89#[doc = "Field `tzc_glb_bmx_lock` writer - "]
90pub type TZC_GLB_BMX_LOCK_W<'a, const O: u8> =
91    crate::BitWriter<'a, u32, TZC_GLB_CTRL_0_SPEC, bool, O>;
92#[doc = "Field `tzc_glb_dbg_lock` reader - "]
93pub type TZC_GLB_DBG_LOCK_R = crate::BitReader<bool>;
94#[doc = "Field `tzc_glb_dbg_lock` writer - "]
95pub type TZC_GLB_DBG_LOCK_W<'a, const O: u8> =
96    crate::BitWriter<'a, u32, TZC_GLB_CTRL_0_SPEC, bool, O>;
97#[doc = "Field `tzc_glb_mbist_lock` reader - "]
98pub type TZC_GLB_MBIST_LOCK_R = crate::BitReader<bool>;
99#[doc = "Field `tzc_glb_mbist_lock` writer - "]
100pub type TZC_GLB_MBIST_LOCK_W<'a, const O: u8> =
101    crate::BitWriter<'a, u32, TZC_GLB_CTRL_0_SPEC, bool, O>;
102#[doc = "Field `tzc_glb_clk_lock` reader - "]
103pub type TZC_GLB_CLK_LOCK_R = crate::BitReader<bool>;
104#[doc = "Field `tzc_glb_clk_lock` writer - "]
105pub type TZC_GLB_CLK_LOCK_W<'a, const O: u8> =
106    crate::BitWriter<'a, u32, TZC_GLB_CTRL_0_SPEC, bool, O>;
107impl R {
108    #[doc = "Bit 0"]
109    #[inline(always)]
110    pub fn tzc_glb_swrst_s00_lock(&self) -> TZC_GLB_SWRST_S00_LOCK_R {
111        TZC_GLB_SWRST_S00_LOCK_R::new((self.bits & 1) != 0)
112    }
113    #[doc = "Bit 1"]
114    #[inline(always)]
115    pub fn tzc_glb_swrst_s01_lock(&self) -> TZC_GLB_SWRST_S01_LOCK_R {
116        TZC_GLB_SWRST_S01_LOCK_R::new(((self.bits >> 1) & 1) != 0)
117    }
118    #[doc = "Bit 8"]
119    #[inline(always)]
120    pub fn tzc_glb_swrst_s30_lock(&self) -> TZC_GLB_SWRST_S30_LOCK_R {
121        TZC_GLB_SWRST_S30_LOCK_R::new(((self.bits >> 8) & 1) != 0)
122    }
123    #[doc = "Bit 12"]
124    #[inline(always)]
125    pub fn tzc_glb_ctrl_pwron_rst_lock(&self) -> TZC_GLB_CTRL_PWRON_RST_LOCK_R {
126        TZC_GLB_CTRL_PWRON_RST_LOCK_R::new(((self.bits >> 12) & 1) != 0)
127    }
128    #[doc = "Bit 13"]
129    #[inline(always)]
130    pub fn tzc_glb_ctrl_cpu_reset_lock(&self) -> TZC_GLB_CTRL_CPU_RESET_LOCK_R {
131        TZC_GLB_CTRL_CPU_RESET_LOCK_R::new(((self.bits >> 13) & 1) != 0)
132    }
133    #[doc = "Bit 14"]
134    #[inline(always)]
135    pub fn tzc_glb_ctrl_sys_reset_lock(&self) -> TZC_GLB_CTRL_SYS_RESET_LOCK_R {
136        TZC_GLB_CTRL_SYS_RESET_LOCK_R::new(((self.bits >> 14) & 1) != 0)
137    }
138    #[doc = "Bit 15"]
139    #[inline(always)]
140    pub fn tzc_glb_ctrl_ungated_ap_lock(&self) -> TZC_GLB_CTRL_UNGATED_AP_LOCK_R {
141        TZC_GLB_CTRL_UNGATED_AP_LOCK_R::new(((self.bits >> 15) & 1) != 0)
142    }
143    #[doc = "Bit 25"]
144    #[inline(always)]
145    pub fn tzc_glb_misc_lock(&self) -> TZC_GLB_MISC_LOCK_R {
146        TZC_GLB_MISC_LOCK_R::new(((self.bits >> 25) & 1) != 0)
147    }
148    #[doc = "Bit 26"]
149    #[inline(always)]
150    pub fn tzc_glb_sram_lock(&self) -> TZC_GLB_SRAM_LOCK_R {
151        TZC_GLB_SRAM_LOCK_R::new(((self.bits >> 26) & 1) != 0)
152    }
153    #[doc = "Bit 27"]
154    #[inline(always)]
155    pub fn tzc_glb_l2c_lock(&self) -> TZC_GLB_L2C_LOCK_R {
156        TZC_GLB_L2C_LOCK_R::new(((self.bits >> 27) & 1) != 0)
157    }
158    #[doc = "Bit 28"]
159    #[inline(always)]
160    pub fn tzc_glb_bmx_lock(&self) -> TZC_GLB_BMX_LOCK_R {
161        TZC_GLB_BMX_LOCK_R::new(((self.bits >> 28) & 1) != 0)
162    }
163    #[doc = "Bit 29"]
164    #[inline(always)]
165    pub fn tzc_glb_dbg_lock(&self) -> TZC_GLB_DBG_LOCK_R {
166        TZC_GLB_DBG_LOCK_R::new(((self.bits >> 29) & 1) != 0)
167    }
168    #[doc = "Bit 30"]
169    #[inline(always)]
170    pub fn tzc_glb_mbist_lock(&self) -> TZC_GLB_MBIST_LOCK_R {
171        TZC_GLB_MBIST_LOCK_R::new(((self.bits >> 30) & 1) != 0)
172    }
173    #[doc = "Bit 31"]
174    #[inline(always)]
175    pub fn tzc_glb_clk_lock(&self) -> TZC_GLB_CLK_LOCK_R {
176        TZC_GLB_CLK_LOCK_R::new(((self.bits >> 31) & 1) != 0)
177    }
178}
179impl W {
180    #[doc = "Bit 0"]
181    #[inline(always)]
182    #[must_use]
183    pub fn tzc_glb_swrst_s00_lock(&mut self) -> TZC_GLB_SWRST_S00_LOCK_W<0> {
184        TZC_GLB_SWRST_S00_LOCK_W::new(self)
185    }
186    #[doc = "Bit 1"]
187    #[inline(always)]
188    #[must_use]
189    pub fn tzc_glb_swrst_s01_lock(&mut self) -> TZC_GLB_SWRST_S01_LOCK_W<1> {
190        TZC_GLB_SWRST_S01_LOCK_W::new(self)
191    }
192    #[doc = "Bit 8"]
193    #[inline(always)]
194    #[must_use]
195    pub fn tzc_glb_swrst_s30_lock(&mut self) -> TZC_GLB_SWRST_S30_LOCK_W<8> {
196        TZC_GLB_SWRST_S30_LOCK_W::new(self)
197    }
198    #[doc = "Bit 12"]
199    #[inline(always)]
200    #[must_use]
201    pub fn tzc_glb_ctrl_pwron_rst_lock(&mut self) -> TZC_GLB_CTRL_PWRON_RST_LOCK_W<12> {
202        TZC_GLB_CTRL_PWRON_RST_LOCK_W::new(self)
203    }
204    #[doc = "Bit 13"]
205    #[inline(always)]
206    #[must_use]
207    pub fn tzc_glb_ctrl_cpu_reset_lock(&mut self) -> TZC_GLB_CTRL_CPU_RESET_LOCK_W<13> {
208        TZC_GLB_CTRL_CPU_RESET_LOCK_W::new(self)
209    }
210    #[doc = "Bit 14"]
211    #[inline(always)]
212    #[must_use]
213    pub fn tzc_glb_ctrl_sys_reset_lock(&mut self) -> TZC_GLB_CTRL_SYS_RESET_LOCK_W<14> {
214        TZC_GLB_CTRL_SYS_RESET_LOCK_W::new(self)
215    }
216    #[doc = "Bit 15"]
217    #[inline(always)]
218    #[must_use]
219    pub fn tzc_glb_ctrl_ungated_ap_lock(&mut self) -> TZC_GLB_CTRL_UNGATED_AP_LOCK_W<15> {
220        TZC_GLB_CTRL_UNGATED_AP_LOCK_W::new(self)
221    }
222    #[doc = "Bit 25"]
223    #[inline(always)]
224    #[must_use]
225    pub fn tzc_glb_misc_lock(&mut self) -> TZC_GLB_MISC_LOCK_W<25> {
226        TZC_GLB_MISC_LOCK_W::new(self)
227    }
228    #[doc = "Bit 26"]
229    #[inline(always)]
230    #[must_use]
231    pub fn tzc_glb_sram_lock(&mut self) -> TZC_GLB_SRAM_LOCK_W<26> {
232        TZC_GLB_SRAM_LOCK_W::new(self)
233    }
234    #[doc = "Bit 27"]
235    #[inline(always)]
236    #[must_use]
237    pub fn tzc_glb_l2c_lock(&mut self) -> TZC_GLB_L2C_LOCK_W<27> {
238        TZC_GLB_L2C_LOCK_W::new(self)
239    }
240    #[doc = "Bit 28"]
241    #[inline(always)]
242    #[must_use]
243    pub fn tzc_glb_bmx_lock(&mut self) -> TZC_GLB_BMX_LOCK_W<28> {
244        TZC_GLB_BMX_LOCK_W::new(self)
245    }
246    #[doc = "Bit 29"]
247    #[inline(always)]
248    #[must_use]
249    pub fn tzc_glb_dbg_lock(&mut self) -> TZC_GLB_DBG_LOCK_W<29> {
250        TZC_GLB_DBG_LOCK_W::new(self)
251    }
252    #[doc = "Bit 30"]
253    #[inline(always)]
254    #[must_use]
255    pub fn tzc_glb_mbist_lock(&mut self) -> TZC_GLB_MBIST_LOCK_W<30> {
256        TZC_GLB_MBIST_LOCK_W::new(self)
257    }
258    #[doc = "Bit 31"]
259    #[inline(always)]
260    #[must_use]
261    pub fn tzc_glb_clk_lock(&mut self) -> TZC_GLB_CLK_LOCK_W<31> {
262        TZC_GLB_CLK_LOCK_W::new(self)
263    }
264    #[doc = "Writes raw bits to the register."]
265    #[inline(always)]
266    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
267        self.0.bits(bits);
268        self
269    }
270}
271#[doc = "tzc_glb_ctrl_0.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tzc_glb_ctrl_0](index.html) module"]
272pub struct TZC_GLB_CTRL_0_SPEC;
273impl crate::RegisterSpec for TZC_GLB_CTRL_0_SPEC {
274    type Ux = u32;
275}
276#[doc = "`read()` method returns [tzc_glb_ctrl_0::R](R) reader structure"]
277impl crate::Readable for TZC_GLB_CTRL_0_SPEC {
278    type Reader = R;
279}
280#[doc = "`write(|w| ..)` method takes [tzc_glb_ctrl_0::W](W) writer structure"]
281impl crate::Writable for TZC_GLB_CTRL_0_SPEC {
282    type Writer = W;
283    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
284    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
285}
286#[doc = "`reset()` method sets tzc_glb_ctrl_0 to value 0"]
287impl crate::Resettable for TZC_GLB_CTRL_0_SPEC {
288    const RESET_VALUE: Self::Ux = 0;
289}
bl702_pac/glb/tzc_glb_ctrl_0.rs

bl702_pac/glb/
tzc_glb_ctrl_0.rs
