bl702_pac/glb/
mbist_stat.rs1#[doc = "Register `MBIST_STAT` reader"]
2pub struct R(crate::R<MBIST_STAT_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<MBIST_STAT_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<MBIST_STAT_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<MBIST_STAT_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `MBIST_STAT` writer"]
17pub struct W(crate::W<MBIST_STAT_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<MBIST_STAT_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<MBIST_STAT_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<MBIST_STAT_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Field `irom_mbist_done` reader - "]
38pub type IROM_MBIST_DONE_R = crate::BitReader<bool>;
39#[doc = "Field `irom_mbist_done` writer - "]
40pub type IROM_MBIST_DONE_W<'a, const O: u8> = crate::BitWriter<'a, u32, MBIST_STAT_SPEC, bool, O>;
41#[doc = "Field `hsram_mem_mbist_done` reader - "]
42pub type HSRAM_MEM_MBIST_DONE_R = crate::BitReader<bool>;
43#[doc = "Field `hsram_mem_mbist_done` writer - "]
44pub type HSRAM_MEM_MBIST_DONE_W<'a, const O: u8> =
45 crate::BitWriter<'a, u32, MBIST_STAT_SPEC, bool, O>;
46#[doc = "Field `hsram_cache_mbist_done` reader - "]
47pub type HSRAM_CACHE_MBIST_DONE_R = crate::BitReader<bool>;
48#[doc = "Field `hsram_cache_mbist_done` writer - "]
49pub type HSRAM_CACHE_MBIST_DONE_W<'a, const O: u8> =
50 crate::BitWriter<'a, u32, MBIST_STAT_SPEC, bool, O>;
51#[doc = "Field `tag_mbist_done` reader - "]
52pub type TAG_MBIST_DONE_R = crate::BitReader<bool>;
53#[doc = "Field `tag_mbist_done` writer - "]
54pub type TAG_MBIST_DONE_W<'a, const O: u8> = crate::BitWriter<'a, u32, MBIST_STAT_SPEC, bool, O>;
55#[doc = "Field `ocram_mbist_done` reader - "]
56pub type OCRAM_MBIST_DONE_R = crate::BitReader<bool>;
57#[doc = "Field `ocram_mbist_done` writer - "]
58pub type OCRAM_MBIST_DONE_W<'a, const O: u8> = crate::BitWriter<'a, u32, MBIST_STAT_SPEC, bool, O>;
59#[doc = "Field `em_ram_mbist_done` reader - "]
60pub type EM_RAM_MBIST_DONE_R = crate::BitReader<bool>;
61#[doc = "Field `em_ram_mbist_done` writer - "]
62pub type EM_RAM_MBIST_DONE_W<'a, const O: u8> = crate::BitWriter<'a, u32, MBIST_STAT_SPEC, bool, O>;
63#[doc = "Field `irom_mbist_fail` reader - "]
64pub type IROM_MBIST_FAIL_R = crate::BitReader<bool>;
65#[doc = "Field `irom_mbist_fail` writer - "]
66pub type IROM_MBIST_FAIL_W<'a, const O: u8> = crate::BitWriter<'a, u32, MBIST_STAT_SPEC, bool, O>;
67#[doc = "Field `hsram_mem_mbist_fail` reader - "]
68pub type HSRAM_MEM_MBIST_FAIL_R = crate::BitReader<bool>;
69#[doc = "Field `hsram_mem_mbist_fail` writer - "]
70pub type HSRAM_MEM_MBIST_FAIL_W<'a, const O: u8> =
71 crate::BitWriter<'a, u32, MBIST_STAT_SPEC, bool, O>;
72#[doc = "Field `hsram_cache_mbist_fail` reader - "]
73pub type HSRAM_CACHE_MBIST_FAIL_R = crate::BitReader<bool>;
74#[doc = "Field `hsram_cache_mbist_fail` writer - "]
75pub type HSRAM_CACHE_MBIST_FAIL_W<'a, const O: u8> =
76 crate::BitWriter<'a, u32, MBIST_STAT_SPEC, bool, O>;
77#[doc = "Field `tag_mbist_fail` reader - "]
78pub type TAG_MBIST_FAIL_R = crate::BitReader<bool>;
79#[doc = "Field `tag_mbist_fail` writer - "]
80pub type TAG_MBIST_FAIL_W<'a, const O: u8> = crate::BitWriter<'a, u32, MBIST_STAT_SPEC, bool, O>;
81#[doc = "Field `ocram_mbist_fail` reader - "]
82pub type OCRAM_MBIST_FAIL_R = crate::BitReader<bool>;
83#[doc = "Field `ocram_mbist_fail` writer - "]
84pub type OCRAM_MBIST_FAIL_W<'a, const O: u8> = crate::BitWriter<'a, u32, MBIST_STAT_SPEC, bool, O>;
85#[doc = "Field `em_ram_mbist_fail` reader - "]
86pub type EM_RAM_MBIST_FAIL_R = crate::BitReader<bool>;
87#[doc = "Field `em_ram_mbist_fail` writer - "]
88pub type EM_RAM_MBIST_FAIL_W<'a, const O: u8> = crate::BitWriter<'a, u32, MBIST_STAT_SPEC, bool, O>;
89impl R {
90 #[doc = "Bit 0"]
91 #[inline(always)]
92 pub fn irom_mbist_done(&self) -> IROM_MBIST_DONE_R {
93 IROM_MBIST_DONE_R::new((self.bits & 1) != 0)
94 }
95 #[doc = "Bit 1"]
96 #[inline(always)]
97 pub fn hsram_mem_mbist_done(&self) -> HSRAM_MEM_MBIST_DONE_R {
98 HSRAM_MEM_MBIST_DONE_R::new(((self.bits >> 1) & 1) != 0)
99 }
100 #[doc = "Bit 2"]
101 #[inline(always)]
102 pub fn hsram_cache_mbist_done(&self) -> HSRAM_CACHE_MBIST_DONE_R {
103 HSRAM_CACHE_MBIST_DONE_R::new(((self.bits >> 2) & 1) != 0)
104 }
105 #[doc = "Bit 3"]
106 #[inline(always)]
107 pub fn tag_mbist_done(&self) -> TAG_MBIST_DONE_R {
108 TAG_MBIST_DONE_R::new(((self.bits >> 3) & 1) != 0)
109 }
110 #[doc = "Bit 4"]
111 #[inline(always)]
112 pub fn ocram_mbist_done(&self) -> OCRAM_MBIST_DONE_R {
113 OCRAM_MBIST_DONE_R::new(((self.bits >> 4) & 1) != 0)
114 }
115 #[doc = "Bit 5"]
116 #[inline(always)]
117 pub fn em_ram_mbist_done(&self) -> EM_RAM_MBIST_DONE_R {
118 EM_RAM_MBIST_DONE_R::new(((self.bits >> 5) & 1) != 0)
119 }
120 #[doc = "Bit 16"]
121 #[inline(always)]
122 pub fn irom_mbist_fail(&self) -> IROM_MBIST_FAIL_R {
123 IROM_MBIST_FAIL_R::new(((self.bits >> 16) & 1) != 0)
124 }
125 #[doc = "Bit 17"]
126 #[inline(always)]
127 pub fn hsram_mem_mbist_fail(&self) -> HSRAM_MEM_MBIST_FAIL_R {
128 HSRAM_MEM_MBIST_FAIL_R::new(((self.bits >> 17) & 1) != 0)
129 }
130 #[doc = "Bit 18"]
131 #[inline(always)]
132 pub fn hsram_cache_mbist_fail(&self) -> HSRAM_CACHE_MBIST_FAIL_R {
133 HSRAM_CACHE_MBIST_FAIL_R::new(((self.bits >> 18) & 1) != 0)
134 }
135 #[doc = "Bit 19"]
136 #[inline(always)]
137 pub fn tag_mbist_fail(&self) -> TAG_MBIST_FAIL_R {
138 TAG_MBIST_FAIL_R::new(((self.bits >> 19) & 1) != 0)
139 }
140 #[doc = "Bit 20"]
141 #[inline(always)]
142 pub fn ocram_mbist_fail(&self) -> OCRAM_MBIST_FAIL_R {
143 OCRAM_MBIST_FAIL_R::new(((self.bits >> 20) & 1) != 0)
144 }
145 #[doc = "Bit 21"]
146 #[inline(always)]
147 pub fn em_ram_mbist_fail(&self) -> EM_RAM_MBIST_FAIL_R {
148 EM_RAM_MBIST_FAIL_R::new(((self.bits >> 21) & 1) != 0)
149 }
150}
151impl W {
152 #[doc = "Bit 0"]
153 #[inline(always)]
154 #[must_use]
155 pub fn irom_mbist_done(&mut self) -> IROM_MBIST_DONE_W<0> {
156 IROM_MBIST_DONE_W::new(self)
157 }
158 #[doc = "Bit 1"]
159 #[inline(always)]
160 #[must_use]
161 pub fn hsram_mem_mbist_done(&mut self) -> HSRAM_MEM_MBIST_DONE_W<1> {
162 HSRAM_MEM_MBIST_DONE_W::new(self)
163 }
164 #[doc = "Bit 2"]
165 #[inline(always)]
166 #[must_use]
167 pub fn hsram_cache_mbist_done(&mut self) -> HSRAM_CACHE_MBIST_DONE_W<2> {
168 HSRAM_CACHE_MBIST_DONE_W::new(self)
169 }
170 #[doc = "Bit 3"]
171 #[inline(always)]
172 #[must_use]
173 pub fn tag_mbist_done(&mut self) -> TAG_MBIST_DONE_W<3> {
174 TAG_MBIST_DONE_W::new(self)
175 }
176 #[doc = "Bit 4"]
177 #[inline(always)]
178 #[must_use]
179 pub fn ocram_mbist_done(&mut self) -> OCRAM_MBIST_DONE_W<4> {
180 OCRAM_MBIST_DONE_W::new(self)
181 }
182 #[doc = "Bit 5"]
183 #[inline(always)]
184 #[must_use]
185 pub fn em_ram_mbist_done(&mut self) -> EM_RAM_MBIST_DONE_W<5> {
186 EM_RAM_MBIST_DONE_W::new(self)
187 }
188 #[doc = "Bit 16"]
189 #[inline(always)]
190 #[must_use]
191 pub fn irom_mbist_fail(&mut self) -> IROM_MBIST_FAIL_W<16> {
192 IROM_MBIST_FAIL_W::new(self)
193 }
194 #[doc = "Bit 17"]
195 #[inline(always)]
196 #[must_use]
197 pub fn hsram_mem_mbist_fail(&mut self) -> HSRAM_MEM_MBIST_FAIL_W<17> {
198 HSRAM_MEM_MBIST_FAIL_W::new(self)
199 }
200 #[doc = "Bit 18"]
201 #[inline(always)]
202 #[must_use]
203 pub fn hsram_cache_mbist_fail(&mut self) -> HSRAM_CACHE_MBIST_FAIL_W<18> {
204 HSRAM_CACHE_MBIST_FAIL_W::new(self)
205 }
206 #[doc = "Bit 19"]
207 #[inline(always)]
208 #[must_use]
209 pub fn tag_mbist_fail(&mut self) -> TAG_MBIST_FAIL_W<19> {
210 TAG_MBIST_FAIL_W::new(self)
211 }
212 #[doc = "Bit 20"]
213 #[inline(always)]
214 #[must_use]
215 pub fn ocram_mbist_fail(&mut self) -> OCRAM_MBIST_FAIL_W<20> {
216 OCRAM_MBIST_FAIL_W::new(self)
217 }
218 #[doc = "Bit 21"]
219 #[inline(always)]
220 #[must_use]
221 pub fn em_ram_mbist_fail(&mut self) -> EM_RAM_MBIST_FAIL_W<21> {
222 EM_RAM_MBIST_FAIL_W::new(self)
223 }
224 #[doc = "Writes raw bits to the register."]
225 #[inline(always)]
226 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
227 self.0.bits(bits);
228 self
229 }
230}
231#[doc = "MBIST_STAT.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [mbist_stat](index.html) module"]
232pub struct MBIST_STAT_SPEC;
233impl crate::RegisterSpec for MBIST_STAT_SPEC {
234 type Ux = u32;
235}
236#[doc = "`read()` method returns [mbist_stat::R](R) reader structure"]
237impl crate::Readable for MBIST_STAT_SPEC {
238 type Reader = R;
239}
240#[doc = "`write(|w| ..)` method takes [mbist_stat::W](W) writer structure"]
241impl crate::Writable for MBIST_STAT_SPEC {
242 type Writer = W;
243 const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
244 const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
245}
246#[doc = "`reset()` method sets MBIST_STAT to value 0"]
247impl crate::Resettable for MBIST_STAT_SPEC {
248 const RESET_VALUE: Self::Ux = 0;
249}