bl702_pac/glb/
cgen_cfg1.rs

1#[doc = "Register `cgen_cfg1` reader"]
2pub struct R(crate::R<CGEN_CFG1_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<CGEN_CFG1_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<CGEN_CFG1_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<CGEN_CFG1_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `cgen_cfg1` writer"]
17pub struct W(crate::W<CGEN_CFG1_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<CGEN_CFG1_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<CGEN_CFG1_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<CGEN_CFG1_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `GLB` reader - GLB"]
38pub type GLB_R = crate::BitReader<bool>;
39#[doc = "Field `GLB` writer - GLB"]
40pub type GLB_W<'a, const O: u8> = crate::BitWriter<'a, u32, CGEN_CFG1_SPEC, bool, O>;
41#[doc = "Field `MIX` reader - MIX"]
42pub type MIX_R = crate::BitReader<bool>;
43#[doc = "Field `MIX` writer - MIX"]
44pub type MIX_W<'a, const O: u8> = crate::BitWriter<'a, u32, CGEN_CFG1_SPEC, bool, O>;
45#[doc = "Field `GPIP` reader - gpip (gpadc, gpdac) clock ungate enable"]
46pub type GPIP_R = crate::BitReader<bool>;
47#[doc = "Field `GPIP` writer - gpip (gpadc, gpdac) clock ungate enable"]
48pub type GPIP_W<'a, const O: u8> = crate::BitWriter<'a, u32, CGEN_CFG1_SPEC, bool, O>;
49#[doc = "Field `SEC_DBG` reader - sec_dbg clock ungate enable"]
50pub type SEC_DBG_R = crate::BitReader<bool>;
51#[doc = "Field `SEC_DBG` writer - sec_dbg clock ungate enable"]
52pub type SEC_DBG_W<'a, const O: u8> = crate::BitWriter<'a, u32, CGEN_CFG1_SPEC, bool, O>;
53#[doc = "Field `SEC` reader - sec_eng clock ungate enable"]
54pub type SEC_R = crate::BitReader<bool>;
55#[doc = "Field `SEC` writer - sec_eng clock ungate enable"]
56pub type SEC_W<'a, const O: u8> = crate::BitWriter<'a, u32, CGEN_CFG1_SPEC, bool, O>;
57#[doc = "Field `TZ1` reader - TZC clock ungate enable"]
58pub type TZ1_R = crate::BitReader<bool>;
59#[doc = "Field `TZ1` writer - TZC clock ungate enable"]
60pub type TZ1_W<'a, const O: u8> = crate::BitWriter<'a, u32, CGEN_CFG1_SPEC, bool, O>;
61#[doc = "Field `TZ2` reader - TZC2 clock ungate enable"]
62pub type TZ2_R = crate::BitReader<bool>;
63#[doc = "Field `TZ2` writer - TZC2 clock ungate enable"]
64pub type TZ2_W<'a, const O: u8> = crate::BitWriter<'a, u32, CGEN_CFG1_SPEC, bool, O>;
65#[doc = "Field `EFUSE` reader - ef_ctrl clock ungate enable"]
66pub type EFUSE_R = crate::BitReader<bool>;
67#[doc = "Field `EFUSE` writer - ef_ctrl clock ungate enable"]
68pub type EFUSE_W<'a, const O: u8> = crate::BitWriter<'a, u32, CGEN_CFG1_SPEC, bool, O>;
69#[doc = "Field `CCI` reader - CCI (efuse?)"]
70pub type CCI_R = crate::BitReader<bool>;
71#[doc = "Field `CCI` writer - CCI (efuse?)"]
72pub type CCI_W<'a, const O: u8> = crate::BitWriter<'a, u32, CGEN_CFG1_SPEC, bool, O>;
73#[doc = "Field `L1C` reader - L1C (efuse?)"]
74pub type L1C_R = crate::BitReader<bool>;
75#[doc = "Field `L1C` writer - L1C (efuse?)"]
76pub type L1C_W<'a, const O: u8> = crate::BitWriter<'a, u32, CGEN_CFG1_SPEC, bool, O>;
77#[doc = "Field `S1A_ALL` reader - S1A_ALL (efuse?)"]
78pub type S1A_ALL_R = crate::BitReader<bool>;
79#[doc = "Field `S1A_ALL` writer - S1A_ALL (efuse?)"]
80pub type S1A_ALL_W<'a, const O: u8> = crate::BitWriter<'a, u32, CGEN_CFG1_SPEC, bool, O>;
81#[doc = "Field `SFC` reader - sf_ctrl clock ungate enable"]
82pub type SFC_R = crate::BitReader<bool>;
83#[doc = "Field `SFC` writer - sf_ctrl clock ungate enable"]
84pub type SFC_W<'a, const O: u8> = crate::BitWriter<'a, u32, CGEN_CFG1_SPEC, bool, O>;
85#[doc = "Field `DMA` reader - DMA clock ungate enable"]
86pub type DMA_R = crate::BitReader<bool>;
87#[doc = "Field `DMA` writer - DMA clock ungate enable"]
88pub type DMA_W<'a, const O: u8> = crate::BitWriter<'a, u32, CGEN_CFG1_SPEC, bool, O>;
89#[doc = "Field `EMAC` reader - EMAC clock ungate enable"]
90pub type EMAC_R = crate::BitReader<bool>;
91#[doc = "Field `EMAC` writer - EMAC clock ungate enable"]
92pub type EMAC_W<'a, const O: u8> = crate::BitWriter<'a, u32, CGEN_CFG1_SPEC, bool, O>;
93#[doc = "Field `PDS_HBN_AON_HBNRAM` reader - DS_HBN_AON_HBNRAM"]
94pub type PDS_HBN_AON_HBNRAM_R = crate::BitReader<bool>;
95#[doc = "Field `PDS_HBN_AON_HBNRAM` writer - DS_HBN_AON_HBNRAM"]
96pub type PDS_HBN_AON_HBNRAM_W<'a, const O: u8> = crate::BitWriter<'a, u32, CGEN_CFG1_SPEC, bool, O>;
97#[doc = "Field `RSVD0F` reader - RSVD0F"]
98pub type RSVD0F_R = crate::BitReader<bool>;
99#[doc = "Field `RSVD0F` writer - RSVD0F"]
100pub type RSVD0F_W<'a, const O: u8> = crate::BitWriter<'a, u32, CGEN_CFG1_SPEC, bool, O>;
101#[doc = "Field `UART0` reader - uart0 clock ungate enable"]
102pub type UART0_R = crate::BitReader<bool>;
103#[doc = "Field `UART0` writer - uart0 clock ungate enable"]
104pub type UART0_W<'a, const O: u8> = crate::BitWriter<'a, u32, CGEN_CFG1_SPEC, bool, O>;
105#[doc = "Field `UART1` reader - uart1 clock ungate enable"]
106pub type UART1_R = crate::BitReader<bool>;
107#[doc = "Field `UART1` writer - uart1 clock ungate enable"]
108pub type UART1_W<'a, const O: u8> = crate::BitWriter<'a, u32, CGEN_CFG1_SPEC, bool, O>;
109#[doc = "Field `SPI` reader - spi clock ungate enable"]
110pub type SPI_R = crate::BitReader<bool>;
111#[doc = "Field `SPI` writer - spi clock ungate enable"]
112pub type SPI_W<'a, const O: u8> = crate::BitWriter<'a, u32, CGEN_CFG1_SPEC, bool, O>;
113#[doc = "Field `I2C` reader - i2c clock ungate enable"]
114pub type I2C_R = crate::BitReader<bool>;
115#[doc = "Field `I2C` writer - i2c clock ungate enable"]
116pub type I2C_W<'a, const O: u8> = crate::BitWriter<'a, u32, CGEN_CFG1_SPEC, bool, O>;
117#[doc = "Field `PWM` reader - pwm clock ungate enable"]
118pub type PWM_R = crate::BitReader<bool>;
119#[doc = "Field `PWM` writer - pwm clock ungate enable"]
120pub type PWM_W<'a, const O: u8> = crate::BitWriter<'a, u32, CGEN_CFG1_SPEC, bool, O>;
121#[doc = "Field `TMR` reader - timer clock ungate enable"]
122pub type TMR_R = crate::BitReader<bool>;
123#[doc = "Field `TMR` writer - timer clock ungate enable"]
124pub type TMR_W<'a, const O: u8> = crate::BitWriter<'a, u32, CGEN_CFG1_SPEC, bool, O>;
125#[doc = "Field `IRR` reader - ir_remote clock ungate enable"]
126pub type IRR_R = crate::BitReader<bool>;
127#[doc = "Field `IRR` writer - ir_remote clock ungate enable"]
128pub type IRR_W<'a, const O: u8> = crate::BitWriter<'a, u32, CGEN_CFG1_SPEC, bool, O>;
129#[doc = "Field `CKS` reader - checksum clock ungate enable"]
130pub type CKS_R = crate::BitReader<bool>;
131#[doc = "Field `CKS` writer - checksum clock ungate enable"]
132pub type CKS_W<'a, const O: u8> = crate::BitWriter<'a, u32, CGEN_CFG1_SPEC, bool, O>;
133#[doc = "Field `QDEC` reader - qdec0 clock ungate enable"]
134pub type QDEC_R = crate::BitReader<bool>;
135#[doc = "Field `QDEC` writer - qdec0 clock ungate enable"]
136pub type QDEC_W<'a, const O: u8> = crate::BitWriter<'a, u32, CGEN_CFG1_SPEC, bool, O>;
137#[doc = "Field `KYS` reader - KYS"]
138pub type KYS_R = crate::BitReader<bool>;
139#[doc = "Field `KYS` writer - KYS"]
140pub type KYS_W<'a, const O: u8> = crate::BitWriter<'a, u32, CGEN_CFG1_SPEC, bool, O>;
141#[doc = "Field `I2S` reader - i2s and qdec2 clock ungate enable"]
142pub type I2S_R = crate::BitReader<bool>;
143#[doc = "Field `I2S` writer - i2s and qdec2 clock ungate enable"]
144pub type I2S_W<'a, const O: u8> = crate::BitWriter<'a, u32, CGEN_CFG1_SPEC, bool, O>;
145#[doc = "Field `RSVD1B` reader - RSVD1B"]
146pub type RSVD1B_R = crate::BitReader<bool>;
147#[doc = "Field `RSVD1B` writer - RSVD1B"]
148pub type RSVD1B_W<'a, const O: u8> = crate::BitWriter<'a, u32, CGEN_CFG1_SPEC, bool, O>;
149#[doc = "Field `USB` reader - usb clock ungate enable"]
150pub type USB_R = crate::BitReader<bool>;
151#[doc = "Field `USB` writer - usb clock ungate enable"]
152pub type USB_W<'a, const O: u8> = crate::BitWriter<'a, u32, CGEN_CFG1_SPEC, bool, O>;
153#[doc = "Field `CAM` reader - CAM"]
154pub type CAM_R = crate::BitReader<bool>;
155#[doc = "Field `CAM` writer - CAM"]
156pub type CAM_W<'a, const O: u8> = crate::BitWriter<'a, u32, CGEN_CFG1_SPEC, bool, O>;
157#[doc = "Field `MJPEG` reader - MJPEG"]
158pub type MJPEG_R = crate::BitReader<bool>;
159#[doc = "Field `MJPEG` writer - MJPEG"]
160pub type MJPEG_W<'a, const O: u8> = crate::BitWriter<'a, u32, CGEN_CFG1_SPEC, bool, O>;
161#[doc = "Field `MAX` reader - MAX"]
162pub type MAX_R = crate::BitReader<bool>;
163#[doc = "Field `MAX` writer - MAX"]
164pub type MAX_W<'a, const O: u8> = crate::BitWriter<'a, u32, CGEN_CFG1_SPEC, bool, O>;
165impl R {
166    #[doc = "Bit 0 - GLB"]
167    #[inline(always)]
168    pub fn glb(&self) -> GLB_R {
169        GLB_R::new((self.bits & 1) != 0)
170    }
171    #[doc = "Bit 1 - MIX"]
172    #[inline(always)]
173    pub fn mix(&self) -> MIX_R {
174        MIX_R::new(((self.bits >> 1) & 1) != 0)
175    }
176    #[doc = "Bit 2 - gpip (gpadc, gpdac) clock ungate enable"]
177    #[inline(always)]
178    pub fn gpip(&self) -> GPIP_R {
179        GPIP_R::new(((self.bits >> 2) & 1) != 0)
180    }
181    #[doc = "Bit 3 - sec_dbg clock ungate enable"]
182    #[inline(always)]
183    pub fn sec_dbg(&self) -> SEC_DBG_R {
184        SEC_DBG_R::new(((self.bits >> 3) & 1) != 0)
185    }
186    #[doc = "Bit 4 - sec_eng clock ungate enable"]
187    #[inline(always)]
188    pub fn sec(&self) -> SEC_R {
189        SEC_R::new(((self.bits >> 4) & 1) != 0)
190    }
191    #[doc = "Bit 5 - TZC clock ungate enable"]
192    #[inline(always)]
193    pub fn tz1(&self) -> TZ1_R {
194        TZ1_R::new(((self.bits >> 5) & 1) != 0)
195    }
196    #[doc = "Bit 6 - TZC2 clock ungate enable"]
197    #[inline(always)]
198    pub fn tz2(&self) -> TZ2_R {
199        TZ2_R::new(((self.bits >> 6) & 1) != 0)
200    }
201    #[doc = "Bit 7 - ef_ctrl clock ungate enable"]
202    #[inline(always)]
203    pub fn efuse(&self) -> EFUSE_R {
204        EFUSE_R::new(((self.bits >> 7) & 1) != 0)
205    }
206    #[doc = "Bit 8 - CCI (efuse?)"]
207    #[inline(always)]
208    pub fn cci(&self) -> CCI_R {
209        CCI_R::new(((self.bits >> 8) & 1) != 0)
210    }
211    #[doc = "Bit 9 - L1C (efuse?)"]
212    #[inline(always)]
213    pub fn l1c(&self) -> L1C_R {
214        L1C_R::new(((self.bits >> 9) & 1) != 0)
215    }
216    #[doc = "Bit 10 - S1A_ALL (efuse?)"]
217    #[inline(always)]
218    pub fn s1a_all(&self) -> S1A_ALL_R {
219        S1A_ALL_R::new(((self.bits >> 10) & 1) != 0)
220    }
221    #[doc = "Bit 11 - sf_ctrl clock ungate enable"]
222    #[inline(always)]
223    pub fn sfc(&self) -> SFC_R {
224        SFC_R::new(((self.bits >> 11) & 1) != 0)
225    }
226    #[doc = "Bit 12 - DMA clock ungate enable"]
227    #[inline(always)]
228    pub fn dma(&self) -> DMA_R {
229        DMA_R::new(((self.bits >> 12) & 1) != 0)
230    }
231    #[doc = "Bit 13 - EMAC clock ungate enable"]
232    #[inline(always)]
233    pub fn emac(&self) -> EMAC_R {
234        EMAC_R::new(((self.bits >> 13) & 1) != 0)
235    }
236    #[doc = "Bit 14 - DS_HBN_AON_HBNRAM"]
237    #[inline(always)]
238    pub fn pds_hbn_aon_hbnram(&self) -> PDS_HBN_AON_HBNRAM_R {
239        PDS_HBN_AON_HBNRAM_R::new(((self.bits >> 14) & 1) != 0)
240    }
241    #[doc = "Bit 15 - RSVD0F"]
242    #[inline(always)]
243    pub fn rsvd0f(&self) -> RSVD0F_R {
244        RSVD0F_R::new(((self.bits >> 15) & 1) != 0)
245    }
246    #[doc = "Bit 16 - uart0 clock ungate enable"]
247    #[inline(always)]
248    pub fn uart0(&self) -> UART0_R {
249        UART0_R::new(((self.bits >> 16) & 1) != 0)
250    }
251    #[doc = "Bit 17 - uart1 clock ungate enable"]
252    #[inline(always)]
253    pub fn uart1(&self) -> UART1_R {
254        UART1_R::new(((self.bits >> 17) & 1) != 0)
255    }
256    #[doc = "Bit 18 - spi clock ungate enable"]
257    #[inline(always)]
258    pub fn spi(&self) -> SPI_R {
259        SPI_R::new(((self.bits >> 18) & 1) != 0)
260    }
261    #[doc = "Bit 19 - i2c clock ungate enable"]
262    #[inline(always)]
263    pub fn i2c(&self) -> I2C_R {
264        I2C_R::new(((self.bits >> 19) & 1) != 0)
265    }
266    #[doc = "Bit 20 - pwm clock ungate enable"]
267    #[inline(always)]
268    pub fn pwm(&self) -> PWM_R {
269        PWM_R::new(((self.bits >> 20) & 1) != 0)
270    }
271    #[doc = "Bit 21 - timer clock ungate enable"]
272    #[inline(always)]
273    pub fn tmr(&self) -> TMR_R {
274        TMR_R::new(((self.bits >> 21) & 1) != 0)
275    }
276    #[doc = "Bit 22 - ir_remote clock ungate enable"]
277    #[inline(always)]
278    pub fn irr(&self) -> IRR_R {
279        IRR_R::new(((self.bits >> 22) & 1) != 0)
280    }
281    #[doc = "Bit 23 - checksum clock ungate enable"]
282    #[inline(always)]
283    pub fn cks(&self) -> CKS_R {
284        CKS_R::new(((self.bits >> 23) & 1) != 0)
285    }
286    #[doc = "Bit 24 - qdec0 clock ungate enable"]
287    #[inline(always)]
288    pub fn qdec(&self) -> QDEC_R {
289        QDEC_R::new(((self.bits >> 24) & 1) != 0)
290    }
291    #[doc = "Bit 25 - KYS"]
292    #[inline(always)]
293    pub fn kys(&self) -> KYS_R {
294        KYS_R::new(((self.bits >> 25) & 1) != 0)
295    }
296    #[doc = "Bit 26 - i2s and qdec2 clock ungate enable"]
297    #[inline(always)]
298    pub fn i2s(&self) -> I2S_R {
299        I2S_R::new(((self.bits >> 26) & 1) != 0)
300    }
301    #[doc = "Bit 27 - RSVD1B"]
302    #[inline(always)]
303    pub fn rsvd1b(&self) -> RSVD1B_R {
304        RSVD1B_R::new(((self.bits >> 27) & 1) != 0)
305    }
306    #[doc = "Bit 28 - usb clock ungate enable"]
307    #[inline(always)]
308    pub fn usb(&self) -> USB_R {
309        USB_R::new(((self.bits >> 28) & 1) != 0)
310    }
311    #[doc = "Bit 29 - CAM"]
312    #[inline(always)]
313    pub fn cam(&self) -> CAM_R {
314        CAM_R::new(((self.bits >> 29) & 1) != 0)
315    }
316    #[doc = "Bit 30 - MJPEG"]
317    #[inline(always)]
318    pub fn mjpeg(&self) -> MJPEG_R {
319        MJPEG_R::new(((self.bits >> 30) & 1) != 0)
320    }
321    #[doc = "Bit 31 - MAX"]
322    #[inline(always)]
323    pub fn max(&self) -> MAX_R {
324        MAX_R::new(((self.bits >> 31) & 1) != 0)
325    }
326}
327impl W {
328    #[doc = "Bit 0 - GLB"]
329    #[inline(always)]
330    #[must_use]
331    pub fn glb(&mut self) -> GLB_W<0> {
332        GLB_W::new(self)
333    }
334    #[doc = "Bit 1 - MIX"]
335    #[inline(always)]
336    #[must_use]
337    pub fn mix(&mut self) -> MIX_W<1> {
338        MIX_W::new(self)
339    }
340    #[doc = "Bit 2 - gpip (gpadc, gpdac) clock ungate enable"]
341    #[inline(always)]
342    #[must_use]
343    pub fn gpip(&mut self) -> GPIP_W<2> {
344        GPIP_W::new(self)
345    }
346    #[doc = "Bit 3 - sec_dbg clock ungate enable"]
347    #[inline(always)]
348    #[must_use]
349    pub fn sec_dbg(&mut self) -> SEC_DBG_W<3> {
350        SEC_DBG_W::new(self)
351    }
352    #[doc = "Bit 4 - sec_eng clock ungate enable"]
353    #[inline(always)]
354    #[must_use]
355    pub fn sec(&mut self) -> SEC_W<4> {
356        SEC_W::new(self)
357    }
358    #[doc = "Bit 5 - TZC clock ungate enable"]
359    #[inline(always)]
360    #[must_use]
361    pub fn tz1(&mut self) -> TZ1_W<5> {
362        TZ1_W::new(self)
363    }
364    #[doc = "Bit 6 - TZC2 clock ungate enable"]
365    #[inline(always)]
366    #[must_use]
367    pub fn tz2(&mut self) -> TZ2_W<6> {
368        TZ2_W::new(self)
369    }
370    #[doc = "Bit 7 - ef_ctrl clock ungate enable"]
371    #[inline(always)]
372    #[must_use]
373    pub fn efuse(&mut self) -> EFUSE_W<7> {
374        EFUSE_W::new(self)
375    }
376    #[doc = "Bit 8 - CCI (efuse?)"]
377    #[inline(always)]
378    #[must_use]
379    pub fn cci(&mut self) -> CCI_W<8> {
380        CCI_W::new(self)
381    }
382    #[doc = "Bit 9 - L1C (efuse?)"]
383    #[inline(always)]
384    #[must_use]
385    pub fn l1c(&mut self) -> L1C_W<9> {
386        L1C_W::new(self)
387    }
388    #[doc = "Bit 10 - S1A_ALL (efuse?)"]
389    #[inline(always)]
390    #[must_use]
391    pub fn s1a_all(&mut self) -> S1A_ALL_W<10> {
392        S1A_ALL_W::new(self)
393    }
394    #[doc = "Bit 11 - sf_ctrl clock ungate enable"]
395    #[inline(always)]
396    #[must_use]
397    pub fn sfc(&mut self) -> SFC_W<11> {
398        SFC_W::new(self)
399    }
400    #[doc = "Bit 12 - DMA clock ungate enable"]
401    #[inline(always)]
402    #[must_use]
403    pub fn dma(&mut self) -> DMA_W<12> {
404        DMA_W::new(self)
405    }
406    #[doc = "Bit 13 - EMAC clock ungate enable"]
407    #[inline(always)]
408    #[must_use]
409    pub fn emac(&mut self) -> EMAC_W<13> {
410        EMAC_W::new(self)
411    }
412    #[doc = "Bit 14 - DS_HBN_AON_HBNRAM"]
413    #[inline(always)]
414    #[must_use]
415    pub fn pds_hbn_aon_hbnram(&mut self) -> PDS_HBN_AON_HBNRAM_W<14> {
416        PDS_HBN_AON_HBNRAM_W::new(self)
417    }
418    #[doc = "Bit 15 - RSVD0F"]
419    #[inline(always)]
420    #[must_use]
421    pub fn rsvd0f(&mut self) -> RSVD0F_W<15> {
422        RSVD0F_W::new(self)
423    }
424    #[doc = "Bit 16 - uart0 clock ungate enable"]
425    #[inline(always)]
426    #[must_use]
427    pub fn uart0(&mut self) -> UART0_W<16> {
428        UART0_W::new(self)
429    }
430    #[doc = "Bit 17 - uart1 clock ungate enable"]
431    #[inline(always)]
432    #[must_use]
433    pub fn uart1(&mut self) -> UART1_W<17> {
434        UART1_W::new(self)
435    }
436    #[doc = "Bit 18 - spi clock ungate enable"]
437    #[inline(always)]
438    #[must_use]
439    pub fn spi(&mut self) -> SPI_W<18> {
440        SPI_W::new(self)
441    }
442    #[doc = "Bit 19 - i2c clock ungate enable"]
443    #[inline(always)]
444    #[must_use]
445    pub fn i2c(&mut self) -> I2C_W<19> {
446        I2C_W::new(self)
447    }
448    #[doc = "Bit 20 - pwm clock ungate enable"]
449    #[inline(always)]
450    #[must_use]
451    pub fn pwm(&mut self) -> PWM_W<20> {
452        PWM_W::new(self)
453    }
454    #[doc = "Bit 21 - timer clock ungate enable"]
455    #[inline(always)]
456    #[must_use]
457    pub fn tmr(&mut self) -> TMR_W<21> {
458        TMR_W::new(self)
459    }
460    #[doc = "Bit 22 - ir_remote clock ungate enable"]
461    #[inline(always)]
462    #[must_use]
463    pub fn irr(&mut self) -> IRR_W<22> {
464        IRR_W::new(self)
465    }
466    #[doc = "Bit 23 - checksum clock ungate enable"]
467    #[inline(always)]
468    #[must_use]
469    pub fn cks(&mut self) -> CKS_W<23> {
470        CKS_W::new(self)
471    }
472    #[doc = "Bit 24 - qdec0 clock ungate enable"]
473    #[inline(always)]
474    #[must_use]
475    pub fn qdec(&mut self) -> QDEC_W<24> {
476        QDEC_W::new(self)
477    }
478    #[doc = "Bit 25 - KYS"]
479    #[inline(always)]
480    #[must_use]
481    pub fn kys(&mut self) -> KYS_W<25> {
482        KYS_W::new(self)
483    }
484    #[doc = "Bit 26 - i2s and qdec2 clock ungate enable"]
485    #[inline(always)]
486    #[must_use]
487    pub fn i2s(&mut self) -> I2S_W<26> {
488        I2S_W::new(self)
489    }
490    #[doc = "Bit 27 - RSVD1B"]
491    #[inline(always)]
492    #[must_use]
493    pub fn rsvd1b(&mut self) -> RSVD1B_W<27> {
494        RSVD1B_W::new(self)
495    }
496    #[doc = "Bit 28 - usb clock ungate enable"]
497    #[inline(always)]
498    #[must_use]
499    pub fn usb(&mut self) -> USB_W<28> {
500        USB_W::new(self)
501    }
502    #[doc = "Bit 29 - CAM"]
503    #[inline(always)]
504    #[must_use]
505    pub fn cam(&mut self) -> CAM_W<29> {
506        CAM_W::new(self)
507    }
508    #[doc = "Bit 30 - MJPEG"]
509    #[inline(always)]
510    #[must_use]
511    pub fn mjpeg(&mut self) -> MJPEG_W<30> {
512        MJPEG_W::new(self)
513    }
514    #[doc = "Bit 31 - MAX"]
515    #[inline(always)]
516    #[must_use]
517    pub fn max(&mut self) -> MAX_W<31> {
518        MAX_W::new(self)
519    }
520    #[doc = "Writes raw bits to the register."]
521    #[inline(always)]
522    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
523        self.0.bits(bits);
524        self
525    }
526}
527#[doc = "cgen_cfg1.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cgen_cfg1](index.html) module"]
528pub struct CGEN_CFG1_SPEC;
529impl crate::RegisterSpec for CGEN_CFG1_SPEC {
530    type Ux = u32;
531}
532#[doc = "`read()` method returns [cgen_cfg1::R](R) reader structure"]
533impl crate::Readable for CGEN_CFG1_SPEC {
534    type Reader = R;
535}
536#[doc = "`write(|w| ..)` method takes [cgen_cfg1::W](W) writer structure"]
537impl crate::Writable for CGEN_CFG1_SPEC {
538    type Writer = W;
539    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
540    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
541}
542#[doc = "`reset()` method sets cgen_cfg1 to value 0"]
543impl crate::Resettable for CGEN_CFG1_SPEC {
544    const RESET_VALUE: Self::Ux = 0;
545}
bl702_pac/glb/cgen_cfg1.rs

bl702_pac/glb/
cgen_cfg1.rs
