bl702_pac/glb/
bmx_cfg2.rs

1#[doc = "Register `bmx_cfg2` reader"]
2pub struct R(crate::R<BMX_CFG2_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<BMX_CFG2_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<BMX_CFG2_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<BMX_CFG2_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `bmx_cfg2` writer"]
17pub struct W(crate::W<BMX_CFG2_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<BMX_CFG2_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<BMX_CFG2_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<BMX_CFG2_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `bmx_err_addr_dis` reader - "]
38pub type BMX_ERR_ADDR_DIS_R = crate::BitReader<bool>;
39#[doc = "Field `bmx_err_addr_dis` writer - "]
40pub type BMX_ERR_ADDR_DIS_W<'a, const O: u8> = crate::BitWriter<'a, u32, BMX_CFG2_SPEC, bool, O>;
41#[doc = "Field `bmx_err_dec` reader - "]
42pub type BMX_ERR_DEC_R = crate::BitReader<bool>;
43#[doc = "Field `bmx_err_dec` writer - "]
44pub type BMX_ERR_DEC_W<'a, const O: u8> = crate::BitWriter<'a, u32, BMX_CFG2_SPEC, bool, O>;
45#[doc = "Field `bmx_err_tz` reader - "]
46pub type BMX_ERR_TZ_R = crate::BitReader<bool>;
47#[doc = "Field `bmx_err_tz` writer - "]
48pub type BMX_ERR_TZ_W<'a, const O: u8> = crate::BitWriter<'a, u32, BMX_CFG2_SPEC, bool, O>;
49#[doc = "Field `reg_w_thre_bmx` reader - "]
50pub type REG_W_THRE_BMX_R = crate::FieldReader<u8, u8>;
51#[doc = "Field `reg_w_thre_bmx` writer - "]
52pub type REG_W_THRE_BMX_W<'a, const O: u8> =
53    crate::FieldWriter<'a, u32, BMX_CFG2_SPEC, u8, u8, 2, O>;
54#[doc = "Field `reg_w_thre_l1c` reader - "]
55pub type REG_W_THRE_L1C_R = crate::FieldReader<u8, u8>;
56#[doc = "Field `reg_w_thre_l1c` writer - "]
57pub type REG_W_THRE_L1C_W<'a, const O: u8> =
58    crate::FieldWriter<'a, u32, BMX_CFG2_SPEC, u8, u8, 2, O>;
59#[doc = "Field `bmx_dbg_sel` reader - "]
60pub type BMX_DBG_SEL_R = crate::FieldReader<u8, u8>;
61#[doc = "Field `bmx_dbg_sel` writer - "]
62pub type BMX_DBG_SEL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, BMX_CFG2_SPEC, u8, u8, 4, O>;
63impl R {
64    #[doc = "Bit 0"]
65    #[inline(always)]
66    pub fn bmx_err_addr_dis(&self) -> BMX_ERR_ADDR_DIS_R {
67        BMX_ERR_ADDR_DIS_R::new((self.bits & 1) != 0)
68    }
69    #[doc = "Bit 4"]
70    #[inline(always)]
71    pub fn bmx_err_dec(&self) -> BMX_ERR_DEC_R {
72        BMX_ERR_DEC_R::new(((self.bits >> 4) & 1) != 0)
73    }
74    #[doc = "Bit 5"]
75    #[inline(always)]
76    pub fn bmx_err_tz(&self) -> BMX_ERR_TZ_R {
77        BMX_ERR_TZ_R::new(((self.bits >> 5) & 1) != 0)
78    }
79    #[doc = "Bits 8:9"]
80    #[inline(always)]
81    pub fn reg_w_thre_bmx(&self) -> REG_W_THRE_BMX_R {
82        REG_W_THRE_BMX_R::new(((self.bits >> 8) & 3) as u8)
83    }
84    #[doc = "Bits 10:11"]
85    #[inline(always)]
86    pub fn reg_w_thre_l1c(&self) -> REG_W_THRE_L1C_R {
87        REG_W_THRE_L1C_R::new(((self.bits >> 10) & 3) as u8)
88    }
89    #[doc = "Bits 28:31"]
90    #[inline(always)]
91    pub fn bmx_dbg_sel(&self) -> BMX_DBG_SEL_R {
92        BMX_DBG_SEL_R::new(((self.bits >> 28) & 0x0f) as u8)
93    }
94}
95impl W {
96    #[doc = "Bit 0"]
97    #[inline(always)]
98    #[must_use]
99    pub fn bmx_err_addr_dis(&mut self) -> BMX_ERR_ADDR_DIS_W<0> {
100        BMX_ERR_ADDR_DIS_W::new(self)
101    }
102    #[doc = "Bit 4"]
103    #[inline(always)]
104    #[must_use]
105    pub fn bmx_err_dec(&mut self) -> BMX_ERR_DEC_W<4> {
106        BMX_ERR_DEC_W::new(self)
107    }
108    #[doc = "Bit 5"]
109    #[inline(always)]
110    #[must_use]
111    pub fn bmx_err_tz(&mut self) -> BMX_ERR_TZ_W<5> {
112        BMX_ERR_TZ_W::new(self)
113    }
114    #[doc = "Bits 8:9"]
115    #[inline(always)]
116    #[must_use]
117    pub fn reg_w_thre_bmx(&mut self) -> REG_W_THRE_BMX_W<8> {
118        REG_W_THRE_BMX_W::new(self)
119    }
120    #[doc = "Bits 10:11"]
121    #[inline(always)]
122    #[must_use]
123    pub fn reg_w_thre_l1c(&mut self) -> REG_W_THRE_L1C_W<10> {
124        REG_W_THRE_L1C_W::new(self)
125    }
126    #[doc = "Bits 28:31"]
127    #[inline(always)]
128    #[must_use]
129    pub fn bmx_dbg_sel(&mut self) -> BMX_DBG_SEL_W<28> {
130        BMX_DBG_SEL_W::new(self)
131    }
132    #[doc = "Writes raw bits to the register."]
133    #[inline(always)]
134    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
135        self.0.bits(bits);
136        self
137    }
138}
139#[doc = "bmx_cfg2.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [bmx_cfg2](index.html) module"]
140pub struct BMX_CFG2_SPEC;
141impl crate::RegisterSpec for BMX_CFG2_SPEC {
142    type Ux = u32;
143}
144#[doc = "`read()` method returns [bmx_cfg2::R](R) reader structure"]
145impl crate::Readable for BMX_CFG2_SPEC {
146    type Reader = R;
147}
148#[doc = "`write(|w| ..)` method takes [bmx_cfg2::W](W) writer structure"]
149impl crate::Writable for BMX_CFG2_SPEC {
150    type Writer = W;
151    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
152    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
153}
154#[doc = "`reset()` method sets bmx_cfg2 to value 0"]
155impl crate::Resettable for BMX_CFG2_SPEC {
156    const RESET_VALUE: Self::Ux = 0;
157}
bl702_pac/glb/bmx_cfg2.rs

bl702_pac/glb/
bmx_cfg2.rs
