bl702_pac/emac/
int_mask.rs

1#[doc = "Register `INT_MASK` reader"]
2pub struct R(crate::R<INT_MASK_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<INT_MASK_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<INT_MASK_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<INT_MASK_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `INT_MASK` writer"]
17pub struct W(crate::W<INT_MASK_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<INT_MASK_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<INT_MASK_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<INT_MASK_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `TXB_M` reader - "]
38pub type TXB_M_R = crate::BitReader<bool>;
39#[doc = "Field `TXB_M` writer - "]
40pub type TXB_M_W<'a, const O: u8> = crate::BitWriter<'a, u32, INT_MASK_SPEC, bool, O>;
41#[doc = "Field `TXE_M` reader - "]
42pub type TXE_M_R = crate::BitReader<bool>;
43#[doc = "Field `TXE_M` writer - "]
44pub type TXE_M_W<'a, const O: u8> = crate::BitWriter<'a, u32, INT_MASK_SPEC, bool, O>;
45#[doc = "Field `RXB_M` reader - "]
46pub type RXB_M_R = crate::BitReader<bool>;
47#[doc = "Field `RXB_M` writer - "]
48pub type RXB_M_W<'a, const O: u8> = crate::BitWriter<'a, u32, INT_MASK_SPEC, bool, O>;
49#[doc = "Field `RXE_M` reader - "]
50pub type RXE_M_R = crate::BitReader<bool>;
51#[doc = "Field `RXE_M` writer - "]
52pub type RXE_M_W<'a, const O: u8> = crate::BitWriter<'a, u32, INT_MASK_SPEC, bool, O>;
53#[doc = "Field `BUSY_M` reader - "]
54pub type BUSY_M_R = crate::BitReader<bool>;
55#[doc = "Field `BUSY_M` writer - "]
56pub type BUSY_M_W<'a, const O: u8> = crate::BitWriter<'a, u32, INT_MASK_SPEC, bool, O>;
57#[doc = "Field `TXC_M` reader - "]
58pub type TXC_M_R = crate::BitReader<bool>;
59#[doc = "Field `TXC_M` writer - "]
60pub type TXC_M_W<'a, const O: u8> = crate::BitWriter<'a, u32, INT_MASK_SPEC, bool, O>;
61#[doc = "Field `RXC_M` reader - "]
62pub type RXC_M_R = crate::BitReader<bool>;
63#[doc = "Field `RXC_M` writer - "]
64pub type RXC_M_W<'a, const O: u8> = crate::BitWriter<'a, u32, INT_MASK_SPEC, bool, O>;
65impl R {
66    #[doc = "Bit 0"]
67    #[inline(always)]
68    pub fn txb_m(&self) -> TXB_M_R {
69        TXB_M_R::new((self.bits & 1) != 0)
70    }
71    #[doc = "Bit 1"]
72    #[inline(always)]
73    pub fn txe_m(&self) -> TXE_M_R {
74        TXE_M_R::new(((self.bits >> 1) & 1) != 0)
75    }
76    #[doc = "Bit 2"]
77    #[inline(always)]
78    pub fn rxb_m(&self) -> RXB_M_R {
79        RXB_M_R::new(((self.bits >> 2) & 1) != 0)
80    }
81    #[doc = "Bit 3"]
82    #[inline(always)]
83    pub fn rxe_m(&self) -> RXE_M_R {
84        RXE_M_R::new(((self.bits >> 3) & 1) != 0)
85    }
86    #[doc = "Bit 4"]
87    #[inline(always)]
88    pub fn busy_m(&self) -> BUSY_M_R {
89        BUSY_M_R::new(((self.bits >> 4) & 1) != 0)
90    }
91    #[doc = "Bit 5"]
92    #[inline(always)]
93    pub fn txc_m(&self) -> TXC_M_R {
94        TXC_M_R::new(((self.bits >> 5) & 1) != 0)
95    }
96    #[doc = "Bit 6"]
97    #[inline(always)]
98    pub fn rxc_m(&self) -> RXC_M_R {
99        RXC_M_R::new(((self.bits >> 6) & 1) != 0)
100    }
101}
102impl W {
103    #[doc = "Bit 0"]
104    #[inline(always)]
105    #[must_use]
106    pub fn txb_m(&mut self) -> TXB_M_W<0> {
107        TXB_M_W::new(self)
108    }
109    #[doc = "Bit 1"]
110    #[inline(always)]
111    #[must_use]
112    pub fn txe_m(&mut self) -> TXE_M_W<1> {
113        TXE_M_W::new(self)
114    }
115    #[doc = "Bit 2"]
116    #[inline(always)]
117    #[must_use]
118    pub fn rxb_m(&mut self) -> RXB_M_W<2> {
119        RXB_M_W::new(self)
120    }
121    #[doc = "Bit 3"]
122    #[inline(always)]
123    #[must_use]
124    pub fn rxe_m(&mut self) -> RXE_M_W<3> {
125        RXE_M_W::new(self)
126    }
127    #[doc = "Bit 4"]
128    #[inline(always)]
129    #[must_use]
130    pub fn busy_m(&mut self) -> BUSY_M_W<4> {
131        BUSY_M_W::new(self)
132    }
133    #[doc = "Bit 5"]
134    #[inline(always)]
135    #[must_use]
136    pub fn txc_m(&mut self) -> TXC_M_W<5> {
137        TXC_M_W::new(self)
138    }
139    #[doc = "Bit 6"]
140    #[inline(always)]
141    #[must_use]
142    pub fn rxc_m(&mut self) -> RXC_M_W<6> {
143        RXC_M_W::new(self)
144    }
145    #[doc = "Writes raw bits to the register."]
146    #[inline(always)]
147    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
148        self.0.bits(bits);
149        self
150    }
151}
152#[doc = "INT_MASK.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [int_mask](index.html) module"]
153pub struct INT_MASK_SPEC;
154impl crate::RegisterSpec for INT_MASK_SPEC {
155    type Ux = u32;
156}
157#[doc = "`read()` method returns [int_mask::R](R) reader structure"]
158impl crate::Readable for INT_MASK_SPEC {
159    type Reader = R;
160}
161#[doc = "`write(|w| ..)` method takes [int_mask::W](W) writer structure"]
162impl crate::Writable for INT_MASK_SPEC {
163    type Writer = W;
164    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
165    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
166}
167#[doc = "`reset()` method sets INT_MASK to value 0"]
168impl crate::Resettable for INT_MASK_SPEC {
169    const RESET_VALUE: Self::Ux = 0;
170}
bl702_pac/emac/int_mask.rs

bl702_pac/emac/
int_mask.rs
