bl702_pac/dma/
dma_c2config.rs

1#[doc = "Register `DMA_C2Config` reader"]
2pub struct R(crate::R<DMA_C2CONFIG_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<DMA_C2CONFIG_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<DMA_C2CONFIG_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<DMA_C2CONFIG_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `DMA_C2Config` writer"]
17pub struct W(crate::W<DMA_C2CONFIG_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<DMA_C2CONFIG_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<DMA_C2CONFIG_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<DMA_C2CONFIG_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `E` reader - "]
38pub type E_R = crate::BitReader<bool>;
39#[doc = "Field `E` writer - "]
40pub type E_W<'a, const O: u8> = crate::BitWriter<'a, u32, DMA_C2CONFIG_SPEC, bool, O>;
41#[doc = "Field `SrcPeripheral` reader - "]
42pub type SRC_PERIPHERAL_R = crate::FieldReader<u8, u8>;
43#[doc = "Field `SrcPeripheral` writer - "]
44pub type SRC_PERIPHERAL_W<'a, const O: u8> =
45    crate::FieldWriter<'a, u32, DMA_C2CONFIG_SPEC, u8, u8, 5, O>;
46#[doc = "Field `DstPeripheral` reader - "]
47pub type DST_PERIPHERAL_R = crate::FieldReader<u8, u8>;
48#[doc = "Field `DstPeripheral` writer - "]
49pub type DST_PERIPHERAL_W<'a, const O: u8> =
50    crate::FieldWriter<'a, u32, DMA_C2CONFIG_SPEC, u8, u8, 5, O>;
51#[doc = "Field `FlowCntrl` reader - "]
52pub type FLOW_CNTRL_R = crate::FieldReader<u8, u8>;
53#[doc = "Field `FlowCntrl` writer - "]
54pub type FLOW_CNTRL_W<'a, const O: u8> =
55    crate::FieldWriter<'a, u32, DMA_C2CONFIG_SPEC, u8, u8, 3, O>;
56#[doc = "Field `IE` reader - "]
57pub type IE_R = crate::BitReader<bool>;
58#[doc = "Field `IE` writer - "]
59pub type IE_W<'a, const O: u8> = crate::BitWriter<'a, u32, DMA_C2CONFIG_SPEC, bool, O>;
60#[doc = "Field `ITC` reader - "]
61pub type ITC_R = crate::BitReader<bool>;
62#[doc = "Field `ITC` writer - "]
63pub type ITC_W<'a, const O: u8> = crate::BitWriter<'a, u32, DMA_C2CONFIG_SPEC, bool, O>;
64#[doc = "Field `L` reader - "]
65pub type L_R = crate::BitReader<bool>;
66#[doc = "Field `L` writer - "]
67pub type L_W<'a, const O: u8> = crate::BitWriter<'a, u32, DMA_C2CONFIG_SPEC, bool, O>;
68#[doc = "Field `A` reader - "]
69pub type A_R = crate::BitReader<bool>;
70#[doc = "Field `A` writer - "]
71pub type A_W<'a, const O: u8> = crate::BitWriter<'a, u32, DMA_C2CONFIG_SPEC, bool, O>;
72#[doc = "Field `H` reader - "]
73pub type H_R = crate::BitReader<bool>;
74#[doc = "Field `H` writer - "]
75pub type H_W<'a, const O: u8> = crate::BitWriter<'a, u32, DMA_C2CONFIG_SPEC, bool, O>;
76impl R {
77    #[doc = "Bit 0"]
78    #[inline(always)]
79    pub fn e(&self) -> E_R {
80        E_R::new((self.bits & 1) != 0)
81    }
82    #[doc = "Bits 1:5"]
83    #[inline(always)]
84    pub fn src_peripheral(&self) -> SRC_PERIPHERAL_R {
85        SRC_PERIPHERAL_R::new(((self.bits >> 1) & 0x1f) as u8)
86    }
87    #[doc = "Bits 6:10"]
88    #[inline(always)]
89    pub fn dst_peripheral(&self) -> DST_PERIPHERAL_R {
90        DST_PERIPHERAL_R::new(((self.bits >> 6) & 0x1f) as u8)
91    }
92    #[doc = "Bits 11:13"]
93    #[inline(always)]
94    pub fn flow_cntrl(&self) -> FLOW_CNTRL_R {
95        FLOW_CNTRL_R::new(((self.bits >> 11) & 7) as u8)
96    }
97    #[doc = "Bit 14"]
98    #[inline(always)]
99    pub fn ie(&self) -> IE_R {
100        IE_R::new(((self.bits >> 14) & 1) != 0)
101    }
102    #[doc = "Bit 15"]
103    #[inline(always)]
104    pub fn itc(&self) -> ITC_R {
105        ITC_R::new(((self.bits >> 15) & 1) != 0)
106    }
107    #[doc = "Bit 16"]
108    #[inline(always)]
109    pub fn l(&self) -> L_R {
110        L_R::new(((self.bits >> 16) & 1) != 0)
111    }
112    #[doc = "Bit 17"]
113    #[inline(always)]
114    pub fn a(&self) -> A_R {
115        A_R::new(((self.bits >> 17) & 1) != 0)
116    }
117    #[doc = "Bit 18"]
118    #[inline(always)]
119    pub fn h(&self) -> H_R {
120        H_R::new(((self.bits >> 18) & 1) != 0)
121    }
122}
123impl W {
124    #[doc = "Bit 0"]
125    #[inline(always)]
126    #[must_use]
127    pub fn e(&mut self) -> E_W<0> {
128        E_W::new(self)
129    }
130    #[doc = "Bits 1:5"]
131    #[inline(always)]
132    #[must_use]
133    pub fn src_peripheral(&mut self) -> SRC_PERIPHERAL_W<1> {
134        SRC_PERIPHERAL_W::new(self)
135    }
136    #[doc = "Bits 6:10"]
137    #[inline(always)]
138    #[must_use]
139    pub fn dst_peripheral(&mut self) -> DST_PERIPHERAL_W<6> {
140        DST_PERIPHERAL_W::new(self)
141    }
142    #[doc = "Bits 11:13"]
143    #[inline(always)]
144    #[must_use]
145    pub fn flow_cntrl(&mut self) -> FLOW_CNTRL_W<11> {
146        FLOW_CNTRL_W::new(self)
147    }
148    #[doc = "Bit 14"]
149    #[inline(always)]
150    #[must_use]
151    pub fn ie(&mut self) -> IE_W<14> {
152        IE_W::new(self)
153    }
154    #[doc = "Bit 15"]
155    #[inline(always)]
156    #[must_use]
157    pub fn itc(&mut self) -> ITC_W<15> {
158        ITC_W::new(self)
159    }
160    #[doc = "Bit 16"]
161    #[inline(always)]
162    #[must_use]
163    pub fn l(&mut self) -> L_W<16> {
164        L_W::new(self)
165    }
166    #[doc = "Bit 17"]
167    #[inline(always)]
168    #[must_use]
169    pub fn a(&mut self) -> A_W<17> {
170        A_W::new(self)
171    }
172    #[doc = "Bit 18"]
173    #[inline(always)]
174    #[must_use]
175    pub fn h(&mut self) -> H_W<18> {
176        H_W::new(self)
177    }
178    #[doc = "Writes raw bits to the register."]
179    #[inline(always)]
180    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
181        self.0.bits(bits);
182        self
183    }
184}
185#[doc = "DMA_C2Config.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dma_c2config](index.html) module"]
186pub struct DMA_C2CONFIG_SPEC;
187impl crate::RegisterSpec for DMA_C2CONFIG_SPEC {
188    type Ux = u32;
189}
190#[doc = "`read()` method returns [dma_c2config::R](R) reader structure"]
191impl crate::Readable for DMA_C2CONFIG_SPEC {
192    type Reader = R;
193}
194#[doc = "`write(|w| ..)` method takes [dma_c2config::W](W) writer structure"]
195impl crate::Writable for DMA_C2CONFIG_SPEC {
196    type Writer = W;
197    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
198    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
199}
200#[doc = "`reset()` method sets DMA_C2Config to value 0"]
201impl crate::Resettable for DMA_C2CONFIG_SPEC {
202    const RESET_VALUE: Self::Ux = 0;
203}
bl702_pac/dma/dma_c2config.rs

bl702_pac/dma/
dma_c2config.rs
