1#[doc = "Register `DMA_C0Control` reader"]
2pub struct R(crate::R<DMA_C0CONTROL_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<DMA_C0CONTROL_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<DMA_C0CONTROL_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<DMA_C0CONTROL_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `DMA_C0Control` writer"]
17pub struct W(crate::W<DMA_C0CONTROL_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<DMA_C0CONTROL_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<DMA_C0CONTROL_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<DMA_C0CONTROL_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Field `TransferSize` reader - "]
38pub type TRANSFER_SIZE_R = crate::FieldReader<u16, u16>;
39#[doc = "Field `TransferSize` writer - "]
40pub type TRANSFER_SIZE_W<'a, const O: u8> =
41 crate::FieldWriter<'a, u32, DMA_C0CONTROL_SPEC, u16, u16, 12, O>;
42#[doc = "Field `SBSize` reader - "]
43pub type SBSIZE_R = crate::FieldReader<u8, u8>;
44#[doc = "Field `SBSize` writer - "]
45pub type SBSIZE_W<'a, const O: u8> = crate::FieldWriter<'a, u32, DMA_C0CONTROL_SPEC, u8, u8, 2, O>;
46#[doc = "Field `dst_min_mode` reader - "]
47pub type DST_MIN_MODE_R = crate::BitReader<bool>;
48#[doc = "Field `dst_min_mode` writer - "]
49pub type DST_MIN_MODE_W<'a, const O: u8> = crate::BitWriter<'a, u32, DMA_C0CONTROL_SPEC, bool, O>;
50#[doc = "Field `DBSize` reader - "]
51pub type DBSIZE_R = crate::FieldReader<u8, u8>;
52#[doc = "Field `DBSize` writer - "]
53pub type DBSIZE_W<'a, const O: u8> = crate::FieldWriter<'a, u32, DMA_C0CONTROL_SPEC, u8, u8, 2, O>;
54#[doc = "Field `dst_add_mode` reader - "]
55pub type DST_ADD_MODE_R = crate::BitReader<bool>;
56#[doc = "Field `dst_add_mode` writer - "]
57pub type DST_ADD_MODE_W<'a, const O: u8> = crate::BitWriter<'a, u32, DMA_C0CONTROL_SPEC, bool, O>;
58#[doc = "Field `SWidth` reader - "]
59pub type SWIDTH_R = crate::FieldReader<u8, u8>;
60#[doc = "Field `SWidth` writer - "]
61pub type SWIDTH_W<'a, const O: u8> = crate::FieldWriter<'a, u32, DMA_C0CONTROL_SPEC, u8, u8, 2, O>;
62#[doc = "Field `DWidth` reader - "]
63pub type DWIDTH_R = crate::FieldReader<u8, u8>;
64#[doc = "Field `DWidth` writer - "]
65pub type DWIDTH_W<'a, const O: u8> = crate::FieldWriter<'a, u32, DMA_C0CONTROL_SPEC, u8, u8, 2, O>;
66#[doc = "Field `fix_cnt` reader - "]
67pub type FIX_CNT_R = crate::FieldReader<u8, u8>;
68#[doc = "Field `fix_cnt` writer - "]
69pub type FIX_CNT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, DMA_C0CONTROL_SPEC, u8, u8, 2, O>;
70#[doc = "Field `SLargerD` reader - "]
71pub type SLARGER_D_R = crate::BitReader<bool>;
72#[doc = "Field `SLargerD` writer - "]
73pub type SLARGER_D_W<'a, const O: u8> = crate::BitWriter<'a, u32, DMA_C0CONTROL_SPEC, bool, O>;
74#[doc = "Field `SI` reader - "]
75pub type SI_R = crate::BitReader<bool>;
76#[doc = "Field `SI` writer - "]
77pub type SI_W<'a, const O: u8> = crate::BitWriter<'a, u32, DMA_C0CONTROL_SPEC, bool, O>;
78#[doc = "Field `DI` reader - "]
79pub type DI_R = crate::BitReader<bool>;
80#[doc = "Field `DI` writer - "]
81pub type DI_W<'a, const O: u8> = crate::BitWriter<'a, u32, DMA_C0CONTROL_SPEC, bool, O>;
82#[doc = "Field `Prot` reader - "]
83pub type PROT_R = crate::FieldReader<u8, u8>;
84#[doc = "Field `Prot` writer - "]
85pub type PROT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, DMA_C0CONTROL_SPEC, u8, u8, 3, O>;
86#[doc = "Field `I` reader - "]
87pub type I_R = crate::BitReader<bool>;
88#[doc = "Field `I` writer - "]
89pub type I_W<'a, const O: u8> = crate::BitWriter<'a, u32, DMA_C0CONTROL_SPEC, bool, O>;
90impl R {
91 #[doc = "Bits 0:11"]
92 #[inline(always)]
93 pub fn transfer_size(&self) -> TRANSFER_SIZE_R {
94 TRANSFER_SIZE_R::new((self.bits & 0x0fff) as u16)
95 }
96 #[doc = "Bits 12:13"]
97 #[inline(always)]
98 pub fn sbsize(&self) -> SBSIZE_R {
99 SBSIZE_R::new(((self.bits >> 12) & 3) as u8)
100 }
101 #[doc = "Bit 14"]
102 #[inline(always)]
103 pub fn dst_min_mode(&self) -> DST_MIN_MODE_R {
104 DST_MIN_MODE_R::new(((self.bits >> 14) & 1) != 0)
105 }
106 #[doc = "Bits 15:16"]
107 #[inline(always)]
108 pub fn dbsize(&self) -> DBSIZE_R {
109 DBSIZE_R::new(((self.bits >> 15) & 3) as u8)
110 }
111 #[doc = "Bit 17"]
112 #[inline(always)]
113 pub fn dst_add_mode(&self) -> DST_ADD_MODE_R {
114 DST_ADD_MODE_R::new(((self.bits >> 17) & 1) != 0)
115 }
116 #[doc = "Bits 18:19"]
117 #[inline(always)]
118 pub fn swidth(&self) -> SWIDTH_R {
119 SWIDTH_R::new(((self.bits >> 18) & 3) as u8)
120 }
121 #[doc = "Bits 21:22"]
122 #[inline(always)]
123 pub fn dwidth(&self) -> DWIDTH_R {
124 DWIDTH_R::new(((self.bits >> 21) & 3) as u8)
125 }
126 #[doc = "Bits 23:24"]
127 #[inline(always)]
128 pub fn fix_cnt(&self) -> FIX_CNT_R {
129 FIX_CNT_R::new(((self.bits >> 23) & 3) as u8)
130 }
131 #[doc = "Bit 25"]
132 #[inline(always)]
133 pub fn slarger_d(&self) -> SLARGER_D_R {
134 SLARGER_D_R::new(((self.bits >> 25) & 1) != 0)
135 }
136 #[doc = "Bit 26"]
137 #[inline(always)]
138 pub fn si(&self) -> SI_R {
139 SI_R::new(((self.bits >> 26) & 1) != 0)
140 }
141 #[doc = "Bit 27"]
142 #[inline(always)]
143 pub fn di(&self) -> DI_R {
144 DI_R::new(((self.bits >> 27) & 1) != 0)
145 }
146 #[doc = "Bits 28:30"]
147 #[inline(always)]
148 pub fn prot(&self) -> PROT_R {
149 PROT_R::new(((self.bits >> 28) & 7) as u8)
150 }
151 #[doc = "Bit 31"]
152 #[inline(always)]
153 pub fn i(&self) -> I_R {
154 I_R::new(((self.bits >> 31) & 1) != 0)
155 }
156}
157impl W {
158 #[doc = "Bits 0:11"]
159 #[inline(always)]
160 #[must_use]
161 pub fn transfer_size(&mut self) -> TRANSFER_SIZE_W<0> {
162 TRANSFER_SIZE_W::new(self)
163 }
164 #[doc = "Bits 12:13"]
165 #[inline(always)]
166 #[must_use]
167 pub fn sbsize(&mut self) -> SBSIZE_W<12> {
168 SBSIZE_W::new(self)
169 }
170 #[doc = "Bit 14"]
171 #[inline(always)]
172 #[must_use]
173 pub fn dst_min_mode(&mut self) -> DST_MIN_MODE_W<14> {
174 DST_MIN_MODE_W::new(self)
175 }
176 #[doc = "Bits 15:16"]
177 #[inline(always)]
178 #[must_use]
179 pub fn dbsize(&mut self) -> DBSIZE_W<15> {
180 DBSIZE_W::new(self)
181 }
182 #[doc = "Bit 17"]
183 #[inline(always)]
184 #[must_use]
185 pub fn dst_add_mode(&mut self) -> DST_ADD_MODE_W<17> {
186 DST_ADD_MODE_W::new(self)
187 }
188 #[doc = "Bits 18:19"]
189 #[inline(always)]
190 #[must_use]
191 pub fn swidth(&mut self) -> SWIDTH_W<18> {
192 SWIDTH_W::new(self)
193 }
194 #[doc = "Bits 21:22"]
195 #[inline(always)]
196 #[must_use]
197 pub fn dwidth(&mut self) -> DWIDTH_W<21> {
198 DWIDTH_W::new(self)
199 }
200 #[doc = "Bits 23:24"]
201 #[inline(always)]
202 #[must_use]
203 pub fn fix_cnt(&mut self) -> FIX_CNT_W<23> {
204 FIX_CNT_W::new(self)
205 }
206 #[doc = "Bit 25"]
207 #[inline(always)]
208 #[must_use]
209 pub fn slarger_d(&mut self) -> SLARGER_D_W<25> {
210 SLARGER_D_W::new(self)
211 }
212 #[doc = "Bit 26"]
213 #[inline(always)]
214 #[must_use]
215 pub fn si(&mut self) -> SI_W<26> {
216 SI_W::new(self)
217 }
218 #[doc = "Bit 27"]
219 #[inline(always)]
220 #[must_use]
221 pub fn di(&mut self) -> DI_W<27> {
222 DI_W::new(self)
223 }
224 #[doc = "Bits 28:30"]
225 #[inline(always)]
226 #[must_use]
227 pub fn prot(&mut self) -> PROT_W<28> {
228 PROT_W::new(self)
229 }
230 #[doc = "Bit 31"]
231 #[inline(always)]
232 #[must_use]
233 pub fn i(&mut self) -> I_W<31> {
234 I_W::new(self)
235 }
236 #[doc = "Writes raw bits to the register."]
237 #[inline(always)]
238 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
239 self.0.bits(bits);
240 self
241 }
242}
243#[doc = "DMA_C0Control.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dma_c0control](index.html) module"]
244pub struct DMA_C0CONTROL_SPEC;
245impl crate::RegisterSpec for DMA_C0CONTROL_SPEC {
246 type Ux = u32;
247}
248#[doc = "`read()` method returns [dma_c0control::R](R) reader structure"]
249impl crate::Readable for DMA_C0CONTROL_SPEC {
250 type Reader = R;
251}
252#[doc = "`write(|w| ..)` method takes [dma_c0control::W](W) writer structure"]
253impl crate::Writable for DMA_C0CONTROL_SPEC {
254 type Writer = W;
255 const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
256 const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
257}
258#[doc = "`reset()` method sets DMA_C0Control to value 0"]
259impl crate::Resettable for DMA_C0CONTROL_SPEC {
260 const RESET_VALUE: Self::Ux = 0;
261}