1#[doc = "Register `transmit_config` reader"]
2pub type R = crate::R<TRANSMIT_CONFIG_SPEC>;
3#[doc = "Register `transmit_config` writer"]
4pub type W = crate::W<TRANSMIT_CONFIG_SPEC>;
5#[doc = "Field `function` reader - Enable transmit function"]
6pub type FUNCTION_R = crate::BitReader<FUNCTION_A>;
7#[doc = "Enable transmit function\n\nValue on reset: 0"]
8#[derive(Clone, Copy, Debug, PartialEq, Eq)]
9pub enum FUNCTION_A {
10 #[doc = "1: Enable UART receive function signal"]
11 ENABLE = 1,
12 #[doc = "0: Disable UART receive function signal"]
13 DISABLE = 0,
14}
15impl From<FUNCTION_A> for bool {
16 #[inline(always)]
17 fn from(variant: FUNCTION_A) -> Self {
18 variant as u8 != 0
19 }
20}
21impl FUNCTION_R {
22 #[doc = "Get enumerated values variant"]
23 #[inline(always)]
24 pub const fn variant(&self) -> FUNCTION_A {
25 match self.bits {
26 true => FUNCTION_A::ENABLE,
27 false => FUNCTION_A::DISABLE,
28 }
29 }
30 #[doc = "Enable UART receive function signal"]
31 #[inline(always)]
32 pub fn is_enable(&self) -> bool {
33 *self == FUNCTION_A::ENABLE
34 }
35 #[doc = "Disable UART receive function signal"]
36 #[inline(always)]
37 pub fn is_disable(&self) -> bool {
38 *self == FUNCTION_A::DISABLE
39 }
40}
41#[doc = "Field `function` writer - Enable transmit function"]
42pub type FUNCTION_W<'a, REG> = crate::BitWriter<'a, REG, FUNCTION_A>;
43impl<'a, REG> FUNCTION_W<'a, REG>
44where
45 REG: crate::Writable + crate::RegisterSpec,
46{
47 #[doc = "Enable UART receive function signal"]
48 #[inline(always)]
49 pub fn enable(self) -> &'a mut crate::W<REG> {
50 self.variant(FUNCTION_A::ENABLE)
51 }
52 #[doc = "Disable UART receive function signal"]
53 #[inline(always)]
54 pub fn disable(self) -> &'a mut crate::W<REG> {
55 self.variant(FUNCTION_A::DISABLE)
56 }
57}
58#[doc = "Field `cts` reader - Enable Clear-to-Send flow control signal"]
59pub type CTS_R = crate::BitReader<CTS_A>;
60#[doc = "Enable Clear-to-Send flow control signal\n\nValue on reset: 0"]
61#[derive(Clone, Copy, Debug, PartialEq, Eq)]
62pub enum CTS_A {
63 #[doc = "1: Enable Clear-to-Send flow control signal"]
64 ENABLE = 1,
65 #[doc = "0: Disable Clear-to-Send flow control signal"]
66 DISABLE = 0,
67}
68impl From<CTS_A> for bool {
69 #[inline(always)]
70 fn from(variant: CTS_A) -> Self {
71 variant as u8 != 0
72 }
73}
74impl CTS_R {
75 #[doc = "Get enumerated values variant"]
76 #[inline(always)]
77 pub const fn variant(&self) -> CTS_A {
78 match self.bits {
79 true => CTS_A::ENABLE,
80 false => CTS_A::DISABLE,
81 }
82 }
83 #[doc = "Enable Clear-to-Send flow control signal"]
84 #[inline(always)]
85 pub fn is_enable(&self) -> bool {
86 *self == CTS_A::ENABLE
87 }
88 #[doc = "Disable Clear-to-Send flow control signal"]
89 #[inline(always)]
90 pub fn is_disable(&self) -> bool {
91 *self == CTS_A::DISABLE
92 }
93}
94#[doc = "Field `cts` writer - Enable Clear-to-Send flow control signal"]
95pub type CTS_W<'a, REG> = crate::BitWriter<'a, REG, CTS_A>;
96impl<'a, REG> CTS_W<'a, REG>
97where
98 REG: crate::Writable + crate::RegisterSpec,
99{
100 #[doc = "Enable Clear-to-Send flow control signal"]
101 #[inline(always)]
102 pub fn enable(self) -> &'a mut crate::W<REG> {
103 self.variant(CTS_A::ENABLE)
104 }
105 #[doc = "Disable Clear-to-Send flow control signal"]
106 #[inline(always)]
107 pub fn disable(self) -> &'a mut crate::W<REG> {
108 self.variant(CTS_A::DISABLE)
109 }
110}
111#[doc = "Field `freerun` reader - Enable freerun mode"]
112pub type FREERUN_R = crate::BitReader<FREERUN_A>;
113#[doc = "Enable freerun mode\n\nValue on reset: 0"]
114#[derive(Clone, Copy, Debug, PartialEq, Eq)]
115pub enum FREERUN_A {
116 #[doc = "1: Enable freerun mode"]
117 ENABLE = 1,
118 #[doc = "0: Disable freerun mode"]
119 DISABLE = 0,
120}
121impl From<FREERUN_A> for bool {
122 #[inline(always)]
123 fn from(variant: FREERUN_A) -> Self {
124 variant as u8 != 0
125 }
126}
127impl FREERUN_R {
128 #[doc = "Get enumerated values variant"]
129 #[inline(always)]
130 pub const fn variant(&self) -> FREERUN_A {
131 match self.bits {
132 true => FREERUN_A::ENABLE,
133 false => FREERUN_A::DISABLE,
134 }
135 }
136 #[doc = "Enable freerun mode"]
137 #[inline(always)]
138 pub fn is_enable(&self) -> bool {
139 *self == FREERUN_A::ENABLE
140 }
141 #[doc = "Disable freerun mode"]
142 #[inline(always)]
143 pub fn is_disable(&self) -> bool {
144 *self == FREERUN_A::DISABLE
145 }
146}
147#[doc = "Field `freerun` writer - Enable freerun mode"]
148pub type FREERUN_W<'a, REG> = crate::BitWriter<'a, REG, FREERUN_A>;
149impl<'a, REG> FREERUN_W<'a, REG>
150where
151 REG: crate::Writable + crate::RegisterSpec,
152{
153 #[doc = "Enable freerun mode"]
154 #[inline(always)]
155 pub fn enable(self) -> &'a mut crate::W<REG> {
156 self.variant(FREERUN_A::ENABLE)
157 }
158 #[doc = "Disable freerun mode"]
159 #[inline(always)]
160 pub fn disable(self) -> &'a mut crate::W<REG> {
161 self.variant(FREERUN_A::DISABLE)
162 }
163}
164#[doc = "Field `lin_transmit` reader - Local Interconnect Network protocol enable"]
165pub type LIN_TRANSMIT_R = crate::BitReader<LIN_TRANSMIT_A>;
166#[doc = "Local Interconnect Network protocol enable\n\nValue on reset: 0"]
167#[derive(Clone, Copy, Debug, PartialEq, Eq)]
168pub enum LIN_TRANSMIT_A {
169 #[doc = "1: Enable Local Interconnect Network protocol"]
170 ENABLE = 1,
171 #[doc = "0: Disable Local Interconnect Network protocol"]
172 DISABLE = 0,
173}
174impl From<LIN_TRANSMIT_A> for bool {
175 #[inline(always)]
176 fn from(variant: LIN_TRANSMIT_A) -> Self {
177 variant as u8 != 0
178 }
179}
180impl LIN_TRANSMIT_R {
181 #[doc = "Get enumerated values variant"]
182 #[inline(always)]
183 pub const fn variant(&self) -> LIN_TRANSMIT_A {
184 match self.bits {
185 true => LIN_TRANSMIT_A::ENABLE,
186 false => LIN_TRANSMIT_A::DISABLE,
187 }
188 }
189 #[doc = "Enable Local Interconnect Network protocol"]
190 #[inline(always)]
191 pub fn is_enable(&self) -> bool {
192 *self == LIN_TRANSMIT_A::ENABLE
193 }
194 #[doc = "Disable Local Interconnect Network protocol"]
195 #[inline(always)]
196 pub fn is_disable(&self) -> bool {
197 *self == LIN_TRANSMIT_A::DISABLE
198 }
199}
200#[doc = "Field `lin_transmit` writer - Local Interconnect Network protocol enable"]
201pub type LIN_TRANSMIT_W<'a, REG> = crate::BitWriter<'a, REG, LIN_TRANSMIT_A>;
202impl<'a, REG> LIN_TRANSMIT_W<'a, REG>
203where
204 REG: crate::Writable + crate::RegisterSpec,
205{
206 #[doc = "Enable Local Interconnect Network protocol"]
207 #[inline(always)]
208 pub fn enable(self) -> &'a mut crate::W<REG> {
209 self.variant(LIN_TRANSMIT_A::ENABLE)
210 }
211 #[doc = "Disable Local Interconnect Network protocol"]
212 #[inline(always)]
213 pub fn disable(self) -> &'a mut crate::W<REG> {
214 self.variant(LIN_TRANSMIT_A::DISABLE)
215 }
216}
217#[doc = "Field `parity_enable` reader - Enable transmit parity check"]
218pub type PARITY_ENABLE_R = crate::BitReader<PARITY_ENABLE_A>;
219#[doc = "Enable transmit parity check\n\nValue on reset: 0"]
220#[derive(Clone, Copy, Debug, PartialEq, Eq)]
221pub enum PARITY_ENABLE_A {
222 #[doc = "1: Enable transmit parity check"]
223 ENABLE = 1,
224 #[doc = "0: Disable transmit parity check"]
225 DISABLE = 0,
226}
227impl From<PARITY_ENABLE_A> for bool {
228 #[inline(always)]
229 fn from(variant: PARITY_ENABLE_A) -> Self {
230 variant as u8 != 0
231 }
232}
233impl PARITY_ENABLE_R {
234 #[doc = "Get enumerated values variant"]
235 #[inline(always)]
236 pub const fn variant(&self) -> PARITY_ENABLE_A {
237 match self.bits {
238 true => PARITY_ENABLE_A::ENABLE,
239 false => PARITY_ENABLE_A::DISABLE,
240 }
241 }
242 #[doc = "Enable transmit parity check"]
243 #[inline(always)]
244 pub fn is_enable(&self) -> bool {
245 *self == PARITY_ENABLE_A::ENABLE
246 }
247 #[doc = "Disable transmit parity check"]
248 #[inline(always)]
249 pub fn is_disable(&self) -> bool {
250 *self == PARITY_ENABLE_A::DISABLE
251 }
252}
253#[doc = "Field `parity_enable` writer - Enable transmit parity check"]
254pub type PARITY_ENABLE_W<'a, REG> = crate::BitWriter<'a, REG, PARITY_ENABLE_A>;
255impl<'a, REG> PARITY_ENABLE_W<'a, REG>
256where
257 REG: crate::Writable + crate::RegisterSpec,
258{
259 #[doc = "Enable transmit parity check"]
260 #[inline(always)]
261 pub fn enable(self) -> &'a mut crate::W<REG> {
262 self.variant(PARITY_ENABLE_A::ENABLE)
263 }
264 #[doc = "Disable transmit parity check"]
265 #[inline(always)]
266 pub fn disable(self) -> &'a mut crate::W<REG> {
267 self.variant(PARITY_ENABLE_A::DISABLE)
268 }
269}
270#[doc = "Field `parity_mode` reader - Select transmit parity mode if enabled"]
271pub type PARITY_MODE_R = crate::BitReader<PARITY_MODE_A>;
272#[doc = "Select transmit parity mode if enabled\n\nValue on reset: 0"]
273#[derive(Clone, Copy, Debug, PartialEq, Eq)]
274pub enum PARITY_MODE_A {
275 #[doc = "1: Odd parity if `parity_enable` is set"]
276 ODD = 1,
277 #[doc = "0: Even parity if `parity_enable` is set"]
278 EVEN = 0,
279}
280impl From<PARITY_MODE_A> for bool {
281 #[inline(always)]
282 fn from(variant: PARITY_MODE_A) -> Self {
283 variant as u8 != 0
284 }
285}
286impl PARITY_MODE_R {
287 #[doc = "Get enumerated values variant"]
288 #[inline(always)]
289 pub const fn variant(&self) -> PARITY_MODE_A {
290 match self.bits {
291 true => PARITY_MODE_A::ODD,
292 false => PARITY_MODE_A::EVEN,
293 }
294 }
295 #[doc = "Odd parity if `parity_enable` is set"]
296 #[inline(always)]
297 pub fn is_odd(&self) -> bool {
298 *self == PARITY_MODE_A::ODD
299 }
300 #[doc = "Even parity if `parity_enable` is set"]
301 #[inline(always)]
302 pub fn is_even(&self) -> bool {
303 *self == PARITY_MODE_A::EVEN
304 }
305}
306#[doc = "Field `parity_mode` writer - Select transmit parity mode if enabled"]
307pub type PARITY_MODE_W<'a, REG> = crate::BitWriter<'a, REG, PARITY_MODE_A>;
308impl<'a, REG> PARITY_MODE_W<'a, REG>
309where
310 REG: crate::Writable + crate::RegisterSpec,
311{
312 #[doc = "Odd parity if `parity_enable` is set"]
313 #[inline(always)]
314 pub fn odd(self) -> &'a mut crate::W<REG> {
315 self.variant(PARITY_MODE_A::ODD)
316 }
317 #[doc = "Even parity if `parity_enable` is set"]
318 #[inline(always)]
319 pub fn even(self) -> &'a mut crate::W<REG> {
320 self.variant(PARITY_MODE_A::EVEN)
321 }
322}
323#[doc = "Field `ir_transmit` reader - Enable IR transmit mode"]
324pub type IR_TRANSMIT_R = crate::BitReader<IR_TRANSMIT_A>;
325#[doc = "Enable IR transmit mode\n\nValue on reset: 0"]
326#[derive(Clone, Copy, Debug, PartialEq, Eq)]
327pub enum IR_TRANSMIT_A {
328 #[doc = "1: Enable IR transmit mode"]
329 ENABLE = 1,
330 #[doc = "0: Disable IR transmit mode"]
331 DISABLE = 0,
332}
333impl From<IR_TRANSMIT_A> for bool {
334 #[inline(always)]
335 fn from(variant: IR_TRANSMIT_A) -> Self {
336 variant as u8 != 0
337 }
338}
339impl IR_TRANSMIT_R {
340 #[doc = "Get enumerated values variant"]
341 #[inline(always)]
342 pub const fn variant(&self) -> IR_TRANSMIT_A {
343 match self.bits {
344 true => IR_TRANSMIT_A::ENABLE,
345 false => IR_TRANSMIT_A::DISABLE,
346 }
347 }
348 #[doc = "Enable IR transmit mode"]
349 #[inline(always)]
350 pub fn is_enable(&self) -> bool {
351 *self == IR_TRANSMIT_A::ENABLE
352 }
353 #[doc = "Disable IR transmit mode"]
354 #[inline(always)]
355 pub fn is_disable(&self) -> bool {
356 *self == IR_TRANSMIT_A::DISABLE
357 }
358}
359#[doc = "Field `ir_transmit` writer - Enable IR transmit mode"]
360pub type IR_TRANSMIT_W<'a, REG> = crate::BitWriter<'a, REG, IR_TRANSMIT_A>;
361impl<'a, REG> IR_TRANSMIT_W<'a, REG>
362where
363 REG: crate::Writable + crate::RegisterSpec,
364{
365 #[doc = "Enable IR transmit mode"]
366 #[inline(always)]
367 pub fn enable(self) -> &'a mut crate::W<REG> {
368 self.variant(IR_TRANSMIT_A::ENABLE)
369 }
370 #[doc = "Disable IR transmit mode"]
371 #[inline(always)]
372 pub fn disable(self) -> &'a mut crate::W<REG> {
373 self.variant(IR_TRANSMIT_A::DISABLE)
374 }
375}
376#[doc = "Field `ir_inverse` reader - Inverse transmit signal output in IR mode"]
377pub type IR_INVERSE_R = crate::BitReader<IR_INVERSE_A>;
378#[doc = "Inverse transmit signal output in IR mode\n\nValue on reset: 0"]
379#[derive(Clone, Copy, Debug, PartialEq, Eq)]
380pub enum IR_INVERSE_A {
381 #[doc = "1: Inverse transmit input in IR mode"]
382 INVERSE = 1,
383 #[doc = "0: Don't inverse transmit input in IR mode"]
384 NO_INVERSE = 0,
385}
386impl From<IR_INVERSE_A> for bool {
387 #[inline(always)]
388 fn from(variant: IR_INVERSE_A) -> Self {
389 variant as u8 != 0
390 }
391}
392impl IR_INVERSE_R {
393 #[doc = "Get enumerated values variant"]
394 #[inline(always)]
395 pub const fn variant(&self) -> IR_INVERSE_A {
396 match self.bits {
397 true => IR_INVERSE_A::INVERSE,
398 false => IR_INVERSE_A::NO_INVERSE,
399 }
400 }
401 #[doc = "Inverse transmit input in IR mode"]
402 #[inline(always)]
403 pub fn is_inverse(&self) -> bool {
404 *self == IR_INVERSE_A::INVERSE
405 }
406 #[doc = "Don't inverse transmit input in IR mode"]
407 #[inline(always)]
408 pub fn is_no_inverse(&self) -> bool {
409 *self == IR_INVERSE_A::NO_INVERSE
410 }
411}
412#[doc = "Field `ir_inverse` writer - Inverse transmit signal output in IR mode"]
413pub type IR_INVERSE_W<'a, REG> = crate::BitWriter<'a, REG, IR_INVERSE_A>;
414impl<'a, REG> IR_INVERSE_W<'a, REG>
415where
416 REG: crate::Writable + crate::RegisterSpec,
417{
418 #[doc = "Inverse transmit input in IR mode"]
419 #[inline(always)]
420 pub fn inverse(self) -> &'a mut crate::W<REG> {
421 self.variant(IR_INVERSE_A::INVERSE)
422 }
423 #[doc = "Don't inverse transmit input in IR mode"]
424 #[inline(always)]
425 pub fn no_inverse(self) -> &'a mut crate::W<REG> {
426 self.variant(IR_INVERSE_A::NO_INVERSE)
427 }
428}
429#[doc = "Field `word_length` reader - Bit count for each transmit data word"]
430pub type WORD_LENGTH_R = crate::FieldReader<WORD_LENGTH_A>;
431#[doc = "Bit count for each transmit data word\n\nValue on reset: 7"]
432#[derive(Clone, Copy, Debug, PartialEq, Eq)]
433#[repr(u8)]
434pub enum WORD_LENGTH_A {
435 #[doc = "4: Each word includes 5 bits"]
436 FIVE = 4,
437 #[doc = "5: Each word includes 6 bits"]
438 SIX = 5,
439 #[doc = "6: Each word includes 7 bits"]
440 SEVEN = 6,
441 #[doc = "7: Each word includes 8 bits"]
442 EIGHT = 7,
443}
444impl From<WORD_LENGTH_A> for u8 {
445 #[inline(always)]
446 fn from(variant: WORD_LENGTH_A) -> Self {
447 variant as _
448 }
449}
450impl crate::FieldSpec for WORD_LENGTH_A {
451 type Ux = u8;
452}
453impl WORD_LENGTH_R {
454 #[doc = "Get enumerated values variant"]
455 #[inline(always)]
456 pub const fn variant(&self) -> Option<WORD_LENGTH_A> {
457 match self.bits {
458 4 => Some(WORD_LENGTH_A::FIVE),
459 5 => Some(WORD_LENGTH_A::SIX),
460 6 => Some(WORD_LENGTH_A::SEVEN),
461 7 => Some(WORD_LENGTH_A::EIGHT),
462 _ => None,
463 }
464 }
465 #[doc = "Each word includes 5 bits"]
466 #[inline(always)]
467 pub fn is_five(&self) -> bool {
468 *self == WORD_LENGTH_A::FIVE
469 }
470 #[doc = "Each word includes 6 bits"]
471 #[inline(always)]
472 pub fn is_six(&self) -> bool {
473 *self == WORD_LENGTH_A::SIX
474 }
475 #[doc = "Each word includes 7 bits"]
476 #[inline(always)]
477 pub fn is_seven(&self) -> bool {
478 *self == WORD_LENGTH_A::SEVEN
479 }
480 #[doc = "Each word includes 8 bits"]
481 #[inline(always)]
482 pub fn is_eight(&self) -> bool {
483 *self == WORD_LENGTH_A::EIGHT
484 }
485}
486#[doc = "Field `word_length` writer - Bit count for each transmit data word"]
487pub type WORD_LENGTH_W<'a, REG> = crate::FieldWriter<'a, REG, 3, WORD_LENGTH_A>;
488impl<'a, REG> WORD_LENGTH_W<'a, REG>
489where
490 REG: crate::Writable + crate::RegisterSpec,
491 REG::Ux: From<u8>,
492{
493 #[doc = "Each word includes 5 bits"]
494 #[inline(always)]
495 pub fn five(self) -> &'a mut crate::W<REG> {
496 self.variant(WORD_LENGTH_A::FIVE)
497 }
498 #[doc = "Each word includes 6 bits"]
499 #[inline(always)]
500 pub fn six(self) -> &'a mut crate::W<REG> {
501 self.variant(WORD_LENGTH_A::SIX)
502 }
503 #[doc = "Each word includes 7 bits"]
504 #[inline(always)]
505 pub fn seven(self) -> &'a mut crate::W<REG> {
506 self.variant(WORD_LENGTH_A::SEVEN)
507 }
508 #[doc = "Each word includes 8 bits"]
509 #[inline(always)]
510 pub fn eight(self) -> &'a mut crate::W<REG> {
511 self.variant(WORD_LENGTH_A::EIGHT)
512 }
513}
514#[doc = "Field `stop_bits` reader - Number of stop bits"]
515pub type STOP_BITS_R = crate::FieldReader<STOP_BITS_A>;
516#[doc = "Number of stop bits\n\nValue on reset: 1"]
517#[derive(Clone, Copy, Debug, PartialEq, Eq)]
518#[repr(u8)]
519pub enum STOP_BITS_A {
520 #[doc = "0: 0.5 stop bits"]
521 ZERO_P_FIVE = 0,
522 #[doc = "1: 1 stop bit"]
523 ONE = 1,
524 #[doc = "2: 1.5 stop bits"]
525 ONE_P_FIVE = 2,
526 #[doc = "3: 2 stop bits"]
527 TWO = 3,
528}
529impl From<STOP_BITS_A> for u8 {
530 #[inline(always)]
531 fn from(variant: STOP_BITS_A) -> Self {
532 variant as _
533 }
534}
535impl crate::FieldSpec for STOP_BITS_A {
536 type Ux = u8;
537}
538impl STOP_BITS_R {
539 #[doc = "Get enumerated values variant"]
540 #[inline(always)]
541 pub const fn variant(&self) -> STOP_BITS_A {
542 match self.bits {
543 0 => STOP_BITS_A::ZERO_P_FIVE,
544 1 => STOP_BITS_A::ONE,
545 2 => STOP_BITS_A::ONE_P_FIVE,
546 3 => STOP_BITS_A::TWO,
547 _ => unreachable!(),
548 }
549 }
550 #[doc = "0.5 stop bits"]
551 #[inline(always)]
552 pub fn is_zero_p_five(&self) -> bool {
553 *self == STOP_BITS_A::ZERO_P_FIVE
554 }
555 #[doc = "1 stop bit"]
556 #[inline(always)]
557 pub fn is_one(&self) -> bool {
558 *self == STOP_BITS_A::ONE
559 }
560 #[doc = "1.5 stop bits"]
561 #[inline(always)]
562 pub fn is_one_p_five(&self) -> bool {
563 *self == STOP_BITS_A::ONE_P_FIVE
564 }
565 #[doc = "2 stop bits"]
566 #[inline(always)]
567 pub fn is_two(&self) -> bool {
568 *self == STOP_BITS_A::TWO
569 }
570}
571#[doc = "Field `stop_bits` writer - Number of stop bits"]
572pub type STOP_BITS_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, STOP_BITS_A>;
573impl<'a, REG> STOP_BITS_W<'a, REG>
574where
575 REG: crate::Writable + crate::RegisterSpec,
576 REG::Ux: From<u8>,
577{
578 #[doc = "0.5 stop bits"]
579 #[inline(always)]
580 pub fn zero_p_five(self) -> &'a mut crate::W<REG> {
581 self.variant(STOP_BITS_A::ZERO_P_FIVE)
582 }
583 #[doc = "1 stop bit"]
584 #[inline(always)]
585 pub fn one(self) -> &'a mut crate::W<REG> {
586 self.variant(STOP_BITS_A::ONE)
587 }
588 #[doc = "1.5 stop bits"]
589 #[inline(always)]
590 pub fn one_p_five(self) -> &'a mut crate::W<REG> {
591 self.variant(STOP_BITS_A::ONE_P_FIVE)
592 }
593 #[doc = "2 stop bits"]
594 #[inline(always)]
595 pub fn two(self) -> &'a mut crate::W<REG> {
596 self.variant(STOP_BITS_A::TWO)
597 }
598}
599#[doc = "Field `break_bits` reader - Number of break bits for LIN protocol"]
600pub type BREAK_BITS_R = crate::FieldReader;
601#[doc = "Field `break_bits` writer - Number of break bits for LIN protocol"]
602pub type BREAK_BITS_W<'a, REG> = crate::FieldWriter<'a, REG, 3>;
603#[doc = "Field `transfer_length` reader - Length of words per UART transmit transfer\n\n This field is ignored when `freerun` mode is enabled."]
604pub type TRANSFER_LENGTH_R = crate::FieldReader<u16>;
605#[doc = "Field `transfer_length` writer - Length of words per UART transmit transfer\n\n This field is ignored when `freerun` mode is enabled."]
606pub type TRANSFER_LENGTH_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>;
607impl R {
608 #[doc = "Bit 0 - Enable transmit function"]
609 #[inline(always)]
610 pub fn function(&self) -> FUNCTION_R {
611 FUNCTION_R::new((self.bits & 1) != 0)
612 }
613 #[doc = "Bit 1 - Enable Clear-to-Send flow control signal"]
614 #[inline(always)]
615 pub fn cts(&self) -> CTS_R {
616 CTS_R::new(((self.bits >> 1) & 1) != 0)
617 }
618 #[doc = "Bit 2 - Enable freerun mode"]
619 #[inline(always)]
620 pub fn freerun(&self) -> FREERUN_R {
621 FREERUN_R::new(((self.bits >> 2) & 1) != 0)
622 }
623 #[doc = "Bit 3 - Local Interconnect Network protocol enable"]
624 #[inline(always)]
625 pub fn lin_transmit(&self) -> LIN_TRANSMIT_R {
626 LIN_TRANSMIT_R::new(((self.bits >> 3) & 1) != 0)
627 }
628 #[doc = "Bit 4 - Enable transmit parity check"]
629 #[inline(always)]
630 pub fn parity_enable(&self) -> PARITY_ENABLE_R {
631 PARITY_ENABLE_R::new(((self.bits >> 4) & 1) != 0)
632 }
633 #[doc = "Bit 5 - Select transmit parity mode if enabled"]
634 #[inline(always)]
635 pub fn parity_mode(&self) -> PARITY_MODE_R {
636 PARITY_MODE_R::new(((self.bits >> 5) & 1) != 0)
637 }
638 #[doc = "Bit 6 - Enable IR transmit mode"]
639 #[inline(always)]
640 pub fn ir_transmit(&self) -> IR_TRANSMIT_R {
641 IR_TRANSMIT_R::new(((self.bits >> 6) & 1) != 0)
642 }
643 #[doc = "Bit 7 - Inverse transmit signal output in IR mode"]
644 #[inline(always)]
645 pub fn ir_inverse(&self) -> IR_INVERSE_R {
646 IR_INVERSE_R::new(((self.bits >> 7) & 1) != 0)
647 }
648 #[doc = "Bits 8:10 - Bit count for each transmit data word"]
649 #[inline(always)]
650 pub fn word_length(&self) -> WORD_LENGTH_R {
651 WORD_LENGTH_R::new(((self.bits >> 8) & 7) as u8)
652 }
653 #[doc = "Bits 11:12 - Number of stop bits"]
654 #[inline(always)]
655 pub fn stop_bits(&self) -> STOP_BITS_R {
656 STOP_BITS_R::new(((self.bits >> 11) & 3) as u8)
657 }
658 #[doc = "Bits 13:15 - Number of break bits for LIN protocol"]
659 #[inline(always)]
660 pub fn break_bits(&self) -> BREAK_BITS_R {
661 BREAK_BITS_R::new(((self.bits >> 13) & 7) as u8)
662 }
663 #[doc = "Bits 16:31 - Length of words per UART transmit transfer\n\n This field is ignored when `freerun` mode is enabled."]
664 #[inline(always)]
665 pub fn transfer_length(&self) -> TRANSFER_LENGTH_R {
666 TRANSFER_LENGTH_R::new(((self.bits >> 16) & 0xffff) as u16)
667 }
668}
669impl W {
670 #[doc = "Bit 0 - Enable transmit function"]
671 #[inline(always)]
672 #[must_use]
673 pub fn function(&mut self) -> FUNCTION_W<TRANSMIT_CONFIG_SPEC> {
674 FUNCTION_W::new(self, 0)
675 }
676 #[doc = "Bit 1 - Enable Clear-to-Send flow control signal"]
677 #[inline(always)]
678 #[must_use]
679 pub fn cts(&mut self) -> CTS_W<TRANSMIT_CONFIG_SPEC> {
680 CTS_W::new(self, 1)
681 }
682 #[doc = "Bit 2 - Enable freerun mode"]
683 #[inline(always)]
684 #[must_use]
685 pub fn freerun(&mut self) -> FREERUN_W<TRANSMIT_CONFIG_SPEC> {
686 FREERUN_W::new(self, 2)
687 }
688 #[doc = "Bit 3 - Local Interconnect Network protocol enable"]
689 #[inline(always)]
690 #[must_use]
691 pub fn lin_transmit(&mut self) -> LIN_TRANSMIT_W<TRANSMIT_CONFIG_SPEC> {
692 LIN_TRANSMIT_W::new(self, 3)
693 }
694 #[doc = "Bit 4 - Enable transmit parity check"]
695 #[inline(always)]
696 #[must_use]
697 pub fn parity_enable(&mut self) -> PARITY_ENABLE_W<TRANSMIT_CONFIG_SPEC> {
698 PARITY_ENABLE_W::new(self, 4)
699 }
700 #[doc = "Bit 5 - Select transmit parity mode if enabled"]
701 #[inline(always)]
702 #[must_use]
703 pub fn parity_mode(&mut self) -> PARITY_MODE_W<TRANSMIT_CONFIG_SPEC> {
704 PARITY_MODE_W::new(self, 5)
705 }
706 #[doc = "Bit 6 - Enable IR transmit mode"]
707 #[inline(always)]
708 #[must_use]
709 pub fn ir_transmit(&mut self) -> IR_TRANSMIT_W<TRANSMIT_CONFIG_SPEC> {
710 IR_TRANSMIT_W::new(self, 6)
711 }
712 #[doc = "Bit 7 - Inverse transmit signal output in IR mode"]
713 #[inline(always)]
714 #[must_use]
715 pub fn ir_inverse(&mut self) -> IR_INVERSE_W<TRANSMIT_CONFIG_SPEC> {
716 IR_INVERSE_W::new(self, 7)
717 }
718 #[doc = "Bits 8:10 - Bit count for each transmit data word"]
719 #[inline(always)]
720 #[must_use]
721 pub fn word_length(&mut self) -> WORD_LENGTH_W<TRANSMIT_CONFIG_SPEC> {
722 WORD_LENGTH_W::new(self, 8)
723 }
724 #[doc = "Bits 11:12 - Number of stop bits"]
725 #[inline(always)]
726 #[must_use]
727 pub fn stop_bits(&mut self) -> STOP_BITS_W<TRANSMIT_CONFIG_SPEC> {
728 STOP_BITS_W::new(self, 11)
729 }
730 #[doc = "Bits 13:15 - Number of break bits for LIN protocol"]
731 #[inline(always)]
732 #[must_use]
733 pub fn break_bits(&mut self) -> BREAK_BITS_W<TRANSMIT_CONFIG_SPEC> {
734 BREAK_BITS_W::new(self, 13)
735 }
736 #[doc = "Bits 16:31 - Length of words per UART transmit transfer\n\n This field is ignored when `freerun` mode is enabled."]
737 #[inline(always)]
738 #[must_use]
739 pub fn transfer_length(&mut self) -> TRANSFER_LENGTH_W<TRANSMIT_CONFIG_SPEC> {
740 TRANSFER_LENGTH_W::new(self, 16)
741 }
742 #[doc = r" Writes raw bits to the register."]
743 #[doc = r""]
744 #[doc = r" # Safety"]
745 #[doc = r""]
746 #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"]
747 #[inline(always)]
748 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
749 self.bits = bits;
750 self
751 }
752}
753#[doc = "Transmit configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`transmit_config::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`transmit_config::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
754pub struct TRANSMIT_CONFIG_SPEC;
755impl crate::RegisterSpec for TRANSMIT_CONFIG_SPEC {
756 type Ux = u32;
757}
758#[doc = "`read()` method returns [`transmit_config::R`](R) reader structure"]
759impl crate::Readable for TRANSMIT_CONFIG_SPEC {}
760#[doc = "`write(|w| ..)` method takes [`transmit_config::W`](W) writer structure"]
761impl crate::Writable for TRANSMIT_CONFIG_SPEC {
762 const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
763 const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
764}
765#[doc = "`reset()` method sets transmit_config to value 0x8f00"]
766impl crate::Resettable for TRANSMIT_CONFIG_SPEC {
767 const RESET_VALUE: Self::Ux = 0x8f00;
768}