1#[doc = "Register `global` reader"]
2pub type R = crate::R<GLOBAL_SPEC>;
3#[doc = "Register `global` writer"]
4pub type W = crate::W<GLOBAL_SPEC>;
5#[doc = "Field `hbn_root_clk_sel` reader - "]
6pub type HBN_ROOT_CLK_SEL_R = crate::FieldReader;
7#[doc = "Field `hbn_root_clk_sel` writer - "]
8pub type HBN_ROOT_CLK_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
9#[doc = "Field `hbn_uart_clk_sel` reader - "]
10pub type HBN_UART_CLK_SEL_R = crate::BitReader;
11#[doc = "Field `hbn_uart_clk_sel` writer - "]
12pub type HBN_UART_CLK_SEL_W<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Field `hbn_f32k_sel` reader - "]
14pub type HBN_F32K_SEL_R = crate::FieldReader;
15#[doc = "Field `hbn_f32k_sel` writer - "]
16pub type HBN_F32K_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
17#[doc = "Field `hbn_pu_rc32k` reader - "]
18pub type HBN_PU_RC32K_R = crate::BitReader;
19#[doc = "Field `hbn_pu_rc32k` writer - "]
20pub type HBN_PU_RC32K_W<'a, REG> = crate::BitWriter<'a, REG>;
21#[doc = "Field `hbn_reset_event` reader - "]
22pub type HBN_RESET_EVENT_R = crate::FieldReader;
23#[doc = "Field `hbn_reset_event` writer - "]
24pub type HBN_RESET_EVENT_W<'a, REG> = crate::FieldWriter<'a, REG, 5>;
25#[doc = "Field `hbn_uart_clk_sel2` reader - "]
26pub type HBN_UART_CLK_SEL2_R = crate::BitReader;
27#[doc = "Field `hbn_uart_clk_sel2` writer - "]
28pub type HBN_UART_CLK_SEL2_W<'a, REG> = crate::BitWriter<'a, REG>;
29#[doc = "Field `sw_ldo11soc_vout_sel_aon` reader - "]
30pub type SW_LDO11SOC_VOUT_SEL_AON_R = crate::FieldReader;
31#[doc = "Field `sw_ldo11soc_vout_sel_aon` writer - "]
32pub type SW_LDO11SOC_VOUT_SEL_AON_W<'a, REG> = crate::FieldWriter<'a, REG, 4>;
33#[doc = "Field `sw_ldo11_rt_vout_sel` reader - "]
34pub type SW_LDO11_RT_VOUT_SEL_R = crate::FieldReader;
35#[doc = "Field `sw_ldo11_rt_vout_sel` writer - "]
36pub type SW_LDO11_RT_VOUT_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 4>;
37#[doc = "Field `sw_ldo11_aon_vout_sel` reader - "]
38pub type SW_LDO11_AON_VOUT_SEL_R = crate::FieldReader;
39#[doc = "Field `sw_ldo11_aon_vout_sel` writer - "]
40pub type SW_LDO11_AON_VOUT_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 4>;
41impl R {
42 #[doc = "Bits 0:1"]
43 #[inline(always)]
44 pub fn hbn_root_clk_sel(&self) -> HBN_ROOT_CLK_SEL_R {
45 HBN_ROOT_CLK_SEL_R::new((self.bits & 3) as u8)
46 }
47 #[doc = "Bit 2"]
48 #[inline(always)]
49 pub fn hbn_uart_clk_sel(&self) -> HBN_UART_CLK_SEL_R {
50 HBN_UART_CLK_SEL_R::new(((self.bits >> 2) & 1) != 0)
51 }
52 #[doc = "Bits 3:4"]
53 #[inline(always)]
54 pub fn hbn_f32k_sel(&self) -> HBN_F32K_SEL_R {
55 HBN_F32K_SEL_R::new(((self.bits >> 3) & 3) as u8)
56 }
57 #[doc = "Bit 5"]
58 #[inline(always)]
59 pub fn hbn_pu_rc32k(&self) -> HBN_PU_RC32K_R {
60 HBN_PU_RC32K_R::new(((self.bits >> 5) & 1) != 0)
61 }
62 #[doc = "Bits 7:11"]
63 #[inline(always)]
64 pub fn hbn_reset_event(&self) -> HBN_RESET_EVENT_R {
65 HBN_RESET_EVENT_R::new(((self.bits >> 7) & 0x1f) as u8)
66 }
67 #[doc = "Bit 15"]
68 #[inline(always)]
69 pub fn hbn_uart_clk_sel2(&self) -> HBN_UART_CLK_SEL2_R {
70 HBN_UART_CLK_SEL2_R::new(((self.bits >> 15) & 1) != 0)
71 }
72 #[doc = "Bits 16:19"]
73 #[inline(always)]
74 pub fn sw_ldo11soc_vout_sel_aon(&self) -> SW_LDO11SOC_VOUT_SEL_AON_R {
75 SW_LDO11SOC_VOUT_SEL_AON_R::new(((self.bits >> 16) & 0x0f) as u8)
76 }
77 #[doc = "Bits 24:27"]
78 #[inline(always)]
79 pub fn sw_ldo11_rt_vout_sel(&self) -> SW_LDO11_RT_VOUT_SEL_R {
80 SW_LDO11_RT_VOUT_SEL_R::new(((self.bits >> 24) & 0x0f) as u8)
81 }
82 #[doc = "Bits 28:31"]
83 #[inline(always)]
84 pub fn sw_ldo11_aon_vout_sel(&self) -> SW_LDO11_AON_VOUT_SEL_R {
85 SW_LDO11_AON_VOUT_SEL_R::new(((self.bits >> 28) & 0x0f) as u8)
86 }
87}
88impl W {
89 #[doc = "Bits 0:1"]
90 #[inline(always)]
91 #[must_use]
92 pub fn hbn_root_clk_sel(&mut self) -> HBN_ROOT_CLK_SEL_W<GLOBAL_SPEC> {
93 HBN_ROOT_CLK_SEL_W::new(self, 0)
94 }
95 #[doc = "Bit 2"]
96 #[inline(always)]
97 #[must_use]
98 pub fn hbn_uart_clk_sel(&mut self) -> HBN_UART_CLK_SEL_W<GLOBAL_SPEC> {
99 HBN_UART_CLK_SEL_W::new(self, 2)
100 }
101 #[doc = "Bits 3:4"]
102 #[inline(always)]
103 #[must_use]
104 pub fn hbn_f32k_sel(&mut self) -> HBN_F32K_SEL_W<GLOBAL_SPEC> {
105 HBN_F32K_SEL_W::new(self, 3)
106 }
107 #[doc = "Bit 5"]
108 #[inline(always)]
109 #[must_use]
110 pub fn hbn_pu_rc32k(&mut self) -> HBN_PU_RC32K_W<GLOBAL_SPEC> {
111 HBN_PU_RC32K_W::new(self, 5)
112 }
113 #[doc = "Bits 7:11"]
114 #[inline(always)]
115 #[must_use]
116 pub fn hbn_reset_event(&mut self) -> HBN_RESET_EVENT_W<GLOBAL_SPEC> {
117 HBN_RESET_EVENT_W::new(self, 7)
118 }
119 #[doc = "Bit 15"]
120 #[inline(always)]
121 #[must_use]
122 pub fn hbn_uart_clk_sel2(&mut self) -> HBN_UART_CLK_SEL2_W<GLOBAL_SPEC> {
123 HBN_UART_CLK_SEL2_W::new(self, 15)
124 }
125 #[doc = "Bits 16:19"]
126 #[inline(always)]
127 #[must_use]
128 pub fn sw_ldo11soc_vout_sel_aon(&mut self) -> SW_LDO11SOC_VOUT_SEL_AON_W<GLOBAL_SPEC> {
129 SW_LDO11SOC_VOUT_SEL_AON_W::new(self, 16)
130 }
131 #[doc = "Bits 24:27"]
132 #[inline(always)]
133 #[must_use]
134 pub fn sw_ldo11_rt_vout_sel(&mut self) -> SW_LDO11_RT_VOUT_SEL_W<GLOBAL_SPEC> {
135 SW_LDO11_RT_VOUT_SEL_W::new(self, 24)
136 }
137 #[doc = "Bits 28:31"]
138 #[inline(always)]
139 #[must_use]
140 pub fn sw_ldo11_aon_vout_sel(&mut self) -> SW_LDO11_AON_VOUT_SEL_W<GLOBAL_SPEC> {
141 SW_LDO11_AON_VOUT_SEL_W::new(self, 28)
142 }
143 #[doc = r" Writes raw bits to the register."]
144 #[doc = r""]
145 #[doc = r" # Safety"]
146 #[doc = r""]
147 #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"]
148 #[inline(always)]
149 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
150 self.bits = bits;
151 self
152 }
153}
154#[doc = "Global hibernate configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`global::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`global::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
155pub struct GLOBAL_SPEC;
156impl crate::RegisterSpec for GLOBAL_SPEC {
157 type Ux = u32;
158}
159#[doc = "`read()` method returns [`global::R`](R) reader structure"]
160impl crate::Readable for GLOBAL_SPEC {}
161#[doc = "`write(|w| ..)` method takes [`global::W`](W) writer structure"]
162impl crate::Writable for GLOBAL_SPEC {
163 const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
164 const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
165}
166#[doc = "`reset()` method sets global to value 0"]
167impl crate::Resettable for GLOBAL_SPEC {
168 const RESET_VALUE: Self::Ux = 0;
169}