bl61x_pac/
cci.rs

1#[doc = r"Register block"]
2#[repr(C)]
3pub struct RegisterBlock {
4    cci_cfg: CCI_CFG,
5    cci_addr: CCI_ADDR,
6    cci_wdata: CCI_WDATA,
7    cci_rdata: CCI_RDATA,
8    cci_ctl: CCI_CTL,
9    _reserved5: [u8; 0x073c],
10    audio_pll_cfg0: AUDIO_PLL_CFG0,
11    audio_pll_cfg1: AUDIO_PLL_CFG1,
12    audio_pll_cfg2: AUDIO_PLL_CFG2,
13    audio_pll_cfg3: AUDIO_PLL_CFG3,
14    audio_pll_cfg4: AUDIO_PLL_CFG4,
15    audio_pll_cfg5: AUDIO_PLL_CFG5,
16    audio_pll_cfg6: AUDIO_PLL_CFG6,
17    audio_pll_cfg7: AUDIO_PLL_CFG7,
18    audio_pll_cfg8: AUDIO_PLL_CFG8,
19    audio_pll_cfg9: AUDIO_PLL_CFG9,
20    audio_pll_cfg10: AUDIO_PLL_CFG10,
21    audio_pll_cfg11: AUDIO_PLL_CFG11,
22}
23impl RegisterBlock {
24    #[doc = "0x00 - cci_cfg."]
25    #[inline(always)]
26    pub const fn cci_cfg(&self) -> &CCI_CFG {
27        &self.cci_cfg
28    }
29    #[doc = "0x04 - cci_addr."]
30    #[inline(always)]
31    pub const fn cci_addr(&self) -> &CCI_ADDR {
32        &self.cci_addr
33    }
34    #[doc = "0x08 - cci_wdata."]
35    #[inline(always)]
36    pub const fn cci_wdata(&self) -> &CCI_WDATA {
37        &self.cci_wdata
38    }
39    #[doc = "0x0c - cci_rdata."]
40    #[inline(always)]
41    pub const fn cci_rdata(&self) -> &CCI_RDATA {
42        &self.cci_rdata
43    }
44    #[doc = "0x10 - cci_ctl."]
45    #[inline(always)]
46    pub const fn cci_ctl(&self) -> &CCI_CTL {
47        &self.cci_ctl
48    }
49    #[doc = "0x750 - audio_pll_cfg0."]
50    #[inline(always)]
51    pub const fn audio_pll_cfg0(&self) -> &AUDIO_PLL_CFG0 {
52        &self.audio_pll_cfg0
53    }
54    #[doc = "0x754 - audio_pll_cfg1."]
55    #[inline(always)]
56    pub const fn audio_pll_cfg1(&self) -> &AUDIO_PLL_CFG1 {
57        &self.audio_pll_cfg1
58    }
59    #[doc = "0x758 - audio_pll_cfg2."]
60    #[inline(always)]
61    pub const fn audio_pll_cfg2(&self) -> &AUDIO_PLL_CFG2 {
62        &self.audio_pll_cfg2
63    }
64    #[doc = "0x75c - audio_pll_cfg3."]
65    #[inline(always)]
66    pub const fn audio_pll_cfg3(&self) -> &AUDIO_PLL_CFG3 {
67        &self.audio_pll_cfg3
68    }
69    #[doc = "0x760 - audio_pll_cfg4."]
70    #[inline(always)]
71    pub const fn audio_pll_cfg4(&self) -> &AUDIO_PLL_CFG4 {
72        &self.audio_pll_cfg4
73    }
74    #[doc = "0x764 - audio_pll_cfg5."]
75    #[inline(always)]
76    pub const fn audio_pll_cfg5(&self) -> &AUDIO_PLL_CFG5 {
77        &self.audio_pll_cfg5
78    }
79    #[doc = "0x768 - audio_pll_cfg6."]
80    #[inline(always)]
81    pub const fn audio_pll_cfg6(&self) -> &AUDIO_PLL_CFG6 {
82        &self.audio_pll_cfg6
83    }
84    #[doc = "0x76c - audio_pll_cfg7."]
85    #[inline(always)]
86    pub const fn audio_pll_cfg7(&self) -> &AUDIO_PLL_CFG7 {
87        &self.audio_pll_cfg7
88    }
89    #[doc = "0x770 - audio_pll_cfg8."]
90    #[inline(always)]
91    pub const fn audio_pll_cfg8(&self) -> &AUDIO_PLL_CFG8 {
92        &self.audio_pll_cfg8
93    }
94    #[doc = "0x774 - audio_pll_cfg9."]
95    #[inline(always)]
96    pub const fn audio_pll_cfg9(&self) -> &AUDIO_PLL_CFG9 {
97        &self.audio_pll_cfg9
98    }
99    #[doc = "0x778 - audio_pll_cfg10."]
100    #[inline(always)]
101    pub const fn audio_pll_cfg10(&self) -> &AUDIO_PLL_CFG10 {
102        &self.audio_pll_cfg10
103    }
104    #[doc = "0x77c - audio_pll_cfg11."]
105    #[inline(always)]
106    pub const fn audio_pll_cfg11(&self) -> &AUDIO_PLL_CFG11 {
107        &self.audio_pll_cfg11
108    }
109}
110#[doc = "cci_cfg (rw) register accessor: cci_cfg.\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cci_cfg::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cci_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cci_cfg`]
111module"]
112pub type CCI_CFG = crate::Reg<cci_cfg::CCI_CFG_SPEC>;
113#[doc = "cci_cfg."]
114pub mod cci_cfg;
115#[doc = "cci_addr (rw) register accessor: cci_addr.\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cci_addr::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cci_addr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cci_addr`]
116module"]
117pub type CCI_ADDR = crate::Reg<cci_addr::CCI_ADDR_SPEC>;
118#[doc = "cci_addr."]
119pub mod cci_addr;
120#[doc = "cci_wdata (rw) register accessor: cci_wdata.\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cci_wdata::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cci_wdata::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cci_wdata`]
121module"]
122pub type CCI_WDATA = crate::Reg<cci_wdata::CCI_WDATA_SPEC>;
123#[doc = "cci_wdata."]
124pub mod cci_wdata;
125#[doc = "cci_rdata (rw) register accessor: cci_rdata.\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cci_rdata::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cci_rdata::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cci_rdata`]
126module"]
127pub type CCI_RDATA = crate::Reg<cci_rdata::CCI_RDATA_SPEC>;
128#[doc = "cci_rdata."]
129pub mod cci_rdata;
130#[doc = "cci_ctl (rw) register accessor: cci_ctl.\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cci_ctl::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cci_ctl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cci_ctl`]
131module"]
132pub type CCI_CTL = crate::Reg<cci_ctl::CCI_CTL_SPEC>;
133#[doc = "cci_ctl."]
134pub mod cci_ctl;
135#[doc = "audio_pll_cfg0 (rw) register accessor: audio_pll_cfg0.\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`audio_pll_cfg0::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`audio_pll_cfg0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@audio_pll_cfg0`]
136module"]
137pub type AUDIO_PLL_CFG0 = crate::Reg<audio_pll_cfg0::AUDIO_PLL_CFG0_SPEC>;
138#[doc = "audio_pll_cfg0."]
139pub mod audio_pll_cfg0;
140#[doc = "audio_pll_cfg1 (rw) register accessor: audio_pll_cfg1.\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`audio_pll_cfg1::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`audio_pll_cfg1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@audio_pll_cfg1`]
141module"]
142pub type AUDIO_PLL_CFG1 = crate::Reg<audio_pll_cfg1::AUDIO_PLL_CFG1_SPEC>;
143#[doc = "audio_pll_cfg1."]
144pub mod audio_pll_cfg1;
145#[doc = "audio_pll_cfg2 (rw) register accessor: audio_pll_cfg2.\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`audio_pll_cfg2::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`audio_pll_cfg2::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@audio_pll_cfg2`]
146module"]
147pub type AUDIO_PLL_CFG2 = crate::Reg<audio_pll_cfg2::AUDIO_PLL_CFG2_SPEC>;
148#[doc = "audio_pll_cfg2."]
149pub mod audio_pll_cfg2;
150#[doc = "audio_pll_cfg3 (rw) register accessor: audio_pll_cfg3.\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`audio_pll_cfg3::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`audio_pll_cfg3::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@audio_pll_cfg3`]
151module"]
152pub type AUDIO_PLL_CFG3 = crate::Reg<audio_pll_cfg3::AUDIO_PLL_CFG3_SPEC>;
153#[doc = "audio_pll_cfg3."]
154pub mod audio_pll_cfg3;
155#[doc = "audio_pll_cfg4 (rw) register accessor: audio_pll_cfg4.\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`audio_pll_cfg4::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`audio_pll_cfg4::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@audio_pll_cfg4`]
156module"]
157pub type AUDIO_PLL_CFG4 = crate::Reg<audio_pll_cfg4::AUDIO_PLL_CFG4_SPEC>;
158#[doc = "audio_pll_cfg4."]
159pub mod audio_pll_cfg4;
160#[doc = "audio_pll_cfg5 (rw) register accessor: audio_pll_cfg5.\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`audio_pll_cfg5::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`audio_pll_cfg5::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@audio_pll_cfg5`]
161module"]
162pub type AUDIO_PLL_CFG5 = crate::Reg<audio_pll_cfg5::AUDIO_PLL_CFG5_SPEC>;
163#[doc = "audio_pll_cfg5."]
164pub mod audio_pll_cfg5;
165#[doc = "audio_pll_cfg6 (rw) register accessor: audio_pll_cfg6.\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`audio_pll_cfg6::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`audio_pll_cfg6::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@audio_pll_cfg6`]
166module"]
167pub type AUDIO_PLL_CFG6 = crate::Reg<audio_pll_cfg6::AUDIO_PLL_CFG6_SPEC>;
168#[doc = "audio_pll_cfg6."]
169pub mod audio_pll_cfg6;
170#[doc = "audio_pll_cfg7 (rw) register accessor: audio_pll_cfg7.\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`audio_pll_cfg7::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`audio_pll_cfg7::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@audio_pll_cfg7`]
171module"]
172pub type AUDIO_PLL_CFG7 = crate::Reg<audio_pll_cfg7::AUDIO_PLL_CFG7_SPEC>;
173#[doc = "audio_pll_cfg7."]
174pub mod audio_pll_cfg7;
175#[doc = "audio_pll_cfg8 (rw) register accessor: audio_pll_cfg8.\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`audio_pll_cfg8::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`audio_pll_cfg8::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@audio_pll_cfg8`]
176module"]
177pub type AUDIO_PLL_CFG8 = crate::Reg<audio_pll_cfg8::AUDIO_PLL_CFG8_SPEC>;
178#[doc = "audio_pll_cfg8."]
179pub mod audio_pll_cfg8;
180#[doc = "audio_pll_cfg9 (rw) register accessor: audio_pll_cfg9.\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`audio_pll_cfg9::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`audio_pll_cfg9::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@audio_pll_cfg9`]
181module"]
182pub type AUDIO_PLL_CFG9 = crate::Reg<audio_pll_cfg9::AUDIO_PLL_CFG9_SPEC>;
183#[doc = "audio_pll_cfg9."]
184pub mod audio_pll_cfg9;
185#[doc = "audio_pll_cfg10 (rw) register accessor: audio_pll_cfg10.\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`audio_pll_cfg10::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`audio_pll_cfg10::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@audio_pll_cfg10`]
186module"]
187pub type AUDIO_PLL_CFG10 = crate::Reg<audio_pll_cfg10::AUDIO_PLL_CFG10_SPEC>;
188#[doc = "audio_pll_cfg10."]
189pub mod audio_pll_cfg10;
190#[doc = "audio_pll_cfg11 (rw) register accessor: audio_pll_cfg11.\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`audio_pll_cfg11::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`audio_pll_cfg11::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@audio_pll_cfg11`]
191module"]
192pub type AUDIO_PLL_CFG11 = crate::Reg<audio_pll_cfg11::AUDIO_PLL_CFG11_SPEC>;
193#[doc = "audio_pll_cfg11."]
194pub mod audio_pll_cfg11;