bl61x_pac/pwm/group/
interrupt_clear.rs

1#[doc = "Register `interrupt_clear` writer"]
2pub type W = crate::W<INTERRUPT_CLEAR_SPEC>;
3#[doc = "Intenal counter for channel have exceeded low threshold\n\nValue on reset: 0"]
4#[derive(Clone, Copy, Debug, PartialEq, Eq)]
5pub enum INTERRUPT_CLEAR_AW {
6    #[doc = "1: Write 1 to clear interrupt state"]
7    CLEAR = 1,
8}
9impl From<INTERRUPT_CLEAR_AW> for bool {
10    #[inline(always)]
11    fn from(variant: INTERRUPT_CLEAR_AW) -> Self {
12        variant as u8 != 0
13    }
14}
15#[doc = "Field `threshold_low(0-3)` writer - Intenal counter for channel have exceeded low threshold"]
16pub type THRESHOLD_LOW_W<'a, REG> = crate::BitWriter<'a, REG, INTERRUPT_CLEAR_AW>;
17impl<'a, REG> THRESHOLD_LOW_W<'a, REG>
18where
19    REG: crate::Writable + crate::RegisterSpec,
20{
21    #[doc = "Write 1 to clear interrupt state"]
22    #[inline(always)]
23    pub fn clear(self) -> &'a mut crate::W<REG> {
24        self.variant(INTERRUPT_CLEAR_AW::CLEAR)
25    }
26}
27#[doc = "Field `threshold_high(0-3)` writer - Intenal counter for channel have exceeded high threshold"]
28pub use THRESHOLD_LOW_W as THRESHOLD_HIGH_W;
29#[doc = "Field `interrupt_period` writer - Intenal counter for channel have exceeded interrupt cycle threshold"]
30pub use THRESHOLD_LOW_W as INTERRUPT_PERIOD_W;
31#[doc = "Field `external_break` writer - External break signal occurred"]
32pub use THRESHOLD_LOW_W as EXTERNAL_BREAK_W;
33#[doc = "Field `repeat` writer - Peripheral group have completed one repeat cycle"]
34pub use THRESHOLD_LOW_W as REPEAT_W;
35impl W {
36    #[doc = "Intenal counter for channel have exceeded low threshold"]
37    #[doc = ""]
38    #[doc = "NOTE: `n` is number of field in register. `n == 0` corresponds to `threshold_low0` field"]
39    #[inline(always)]
40    #[must_use]
41    pub fn threshold_low(&mut self, n: u8) -> THRESHOLD_LOW_W<INTERRUPT_CLEAR_SPEC> {
42        #[allow(clippy::no_effect)]
43        [(); 4][n as usize];
44        THRESHOLD_LOW_W::new(self, n * 2)
45    }
46    #[doc = "Bit 0 - Intenal counter for channel have exceeded low threshold"]
47    #[inline(always)]
48    #[must_use]
49    pub fn threshold_low0(&mut self) -> THRESHOLD_LOW_W<INTERRUPT_CLEAR_SPEC> {
50        THRESHOLD_LOW_W::new(self, 0)
51    }
52    #[doc = "Bit 2 - Intenal counter for channel have exceeded low threshold"]
53    #[inline(always)]
54    #[must_use]
55    pub fn threshold_low1(&mut self) -> THRESHOLD_LOW_W<INTERRUPT_CLEAR_SPEC> {
56        THRESHOLD_LOW_W::new(self, 2)
57    }
58    #[doc = "Bit 4 - Intenal counter for channel have exceeded low threshold"]
59    #[inline(always)]
60    #[must_use]
61    pub fn threshold_low2(&mut self) -> THRESHOLD_LOW_W<INTERRUPT_CLEAR_SPEC> {
62        THRESHOLD_LOW_W::new(self, 4)
63    }
64    #[doc = "Bit 6 - Intenal counter for channel have exceeded low threshold"]
65    #[inline(always)]
66    #[must_use]
67    pub fn threshold_low3(&mut self) -> THRESHOLD_LOW_W<INTERRUPT_CLEAR_SPEC> {
68        THRESHOLD_LOW_W::new(self, 6)
69    }
70    #[doc = "Intenal counter for channel have exceeded high threshold"]
71    #[doc = ""]
72    #[doc = "NOTE: `n` is number of field in register. `n == 0` corresponds to `threshold_high0` field"]
73    #[inline(always)]
74    #[must_use]
75    pub fn threshold_high(&mut self, n: u8) -> THRESHOLD_HIGH_W<INTERRUPT_CLEAR_SPEC> {
76        #[allow(clippy::no_effect)]
77        [(); 4][n as usize];
78        THRESHOLD_HIGH_W::new(self, n * 2 + 1)
79    }
80    #[doc = "Bit 1 - Intenal counter for channel have exceeded high threshold"]
81    #[inline(always)]
82    #[must_use]
83    pub fn threshold_high0(&mut self) -> THRESHOLD_HIGH_W<INTERRUPT_CLEAR_SPEC> {
84        THRESHOLD_HIGH_W::new(self, 1)
85    }
86    #[doc = "Bit 3 - Intenal counter for channel have exceeded high threshold"]
87    #[inline(always)]
88    #[must_use]
89    pub fn threshold_high1(&mut self) -> THRESHOLD_HIGH_W<INTERRUPT_CLEAR_SPEC> {
90        THRESHOLD_HIGH_W::new(self, 3)
91    }
92    #[doc = "Bit 5 - Intenal counter for channel have exceeded high threshold"]
93    #[inline(always)]
94    #[must_use]
95    pub fn threshold_high2(&mut self) -> THRESHOLD_HIGH_W<INTERRUPT_CLEAR_SPEC> {
96        THRESHOLD_HIGH_W::new(self, 5)
97    }
98    #[doc = "Bit 7 - Intenal counter for channel have exceeded high threshold"]
99    #[inline(always)]
100    #[must_use]
101    pub fn threshold_high3(&mut self) -> THRESHOLD_HIGH_W<INTERRUPT_CLEAR_SPEC> {
102        THRESHOLD_HIGH_W::new(self, 7)
103    }
104    #[doc = "Bit 8 - Intenal counter for channel have exceeded interrupt cycle threshold"]
105    #[inline(always)]
106    #[must_use]
107    pub fn interrupt_period(&mut self) -> INTERRUPT_PERIOD_W<INTERRUPT_CLEAR_SPEC> {
108        INTERRUPT_PERIOD_W::new(self, 8)
109    }
110    #[doc = "Bit 9 - External break signal occurred"]
111    #[inline(always)]
112    #[must_use]
113    pub fn external_break(&mut self) -> EXTERNAL_BREAK_W<INTERRUPT_CLEAR_SPEC> {
114        EXTERNAL_BREAK_W::new(self, 9)
115    }
116    #[doc = "Bit 10 - Peripheral group have completed one repeat cycle"]
117    #[inline(always)]
118    #[must_use]
119    pub fn repeat(&mut self) -> REPEAT_W<INTERRUPT_CLEAR_SPEC> {
120        REPEAT_W::new(self, 10)
121    }
122    #[doc = r" Writes raw bits to the register."]
123    #[doc = r""]
124    #[doc = r" # Safety"]
125    #[doc = r""]
126    #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"]
127    #[inline(always)]
128    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
129        self.bits = bits;
130        self
131    }
132}
133#[doc = "Clear interrupt register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`interrupt_clear::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
134pub struct INTERRUPT_CLEAR_SPEC;
135impl crate::RegisterSpec for INTERRUPT_CLEAR_SPEC {
136    type Ux = u32;
137}
138#[doc = "`write(|w| ..)` method takes [`interrupt_clear::W`](W) writer structure"]
139impl crate::Writable for INTERRUPT_CLEAR_SPEC {
140    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
141    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
142}
143#[doc = "`reset()` method sets interrupt_clear to value 0"]
144impl crate::Resettable for INTERRUPT_CLEAR_SPEC {
145    const RESET_VALUE: Self::Ux = 0;
146}