1#[doc = "Register `xtal32k` reader"]
2pub type R = crate::R<XTAL32K_SPEC>;
3#[doc = "Register `xtal32k` writer"]
4pub type W = crate::W<XTAL32K_SPEC>;
5#[doc = "Field `xtal32k_ext_sel` reader - "]
6pub type XTAL32K_EXT_SEL_R = crate::BitReader;
7#[doc = "Field `xtal32k_ext_sel` writer - "]
8pub type XTAL32K_EXT_SEL_W<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `xtal32k_amp_ctrl` reader - "]
10pub type XTAL32K_AMP_CTRL_R = crate::FieldReader;
11#[doc = "Field `xtal32k_amp_ctrl` writer - "]
12pub type XTAL32K_AMP_CTRL_W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
13#[doc = "Field `xtal32k_reg` reader - "]
14pub type XTAL32K_REG_R = crate::FieldReader;
15#[doc = "Field `xtal32k_reg` writer - "]
16pub type XTAL32K_REG_W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
17#[doc = "Field `xtal32k_outbuf_stre` reader - "]
18pub type XTAL32K_OUTBUF_STRE_R = crate::BitReader;
19#[doc = "Field `xtal32k_outbuf_stre` writer - "]
20pub type XTAL32K_OUTBUF_STRE_W<'a, REG> = crate::BitWriter<'a, REG>;
21#[doc = "Field `xtal32k_otf_short` reader - "]
22pub type XTAL32K_OTF_SHORT_R = crate::BitReader;
23#[doc = "Field `xtal32k_otf_short` writer - "]
24pub type XTAL32K_OTF_SHORT_W<'a, REG> = crate::BitWriter<'a, REG>;
25#[doc = "Field `xtal32k_inv_stre` reader - "]
26pub type XTAL32K_INV_STRE_R = crate::FieldReader;
27#[doc = "Field `xtal32k_inv_stre` writer - "]
28pub type XTAL32K_INV_STRE_W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
29#[doc = "Field `xtal32k_capbank` reader - "]
30pub type XTAL32K_CAPBANK_R = crate::FieldReader;
31#[doc = "Field `xtal32k_capbank` writer - "]
32pub type XTAL32K_CAPBANK_W<'a, REG> = crate::FieldWriter<'a, REG, 6>;
33#[doc = "Field `xtal32k_ac_cap_short` reader - "]
34pub type XTAL32K_AC_CAP_SHORT_R = crate::BitReader;
35#[doc = "Field `xtal32k_ac_cap_short` writer - "]
36pub type XTAL32K_AC_CAP_SHORT_W<'a, REG> = crate::BitWriter<'a, REG>;
37#[doc = "Field `pu_xtal32k_buf` reader - "]
38pub type PU_XTAL32K_BUF_R = crate::BitReader;
39#[doc = "Field `pu_xtal32k_buf` writer - "]
40pub type PU_XTAL32K_BUF_W<'a, REG> = crate::BitWriter<'a, REG>;
41#[doc = "Field `pu_xtal32k` reader - "]
42pub type PU_XTAL32K_R = crate::BitReader;
43#[doc = "Field `pu_xtal32k` writer - "]
44pub type PU_XTAL32K_W<'a, REG> = crate::BitWriter<'a, REG>;
45#[doc = "Field `xtal32k_lowv_en` reader - "]
46pub type XTAL32K_LOWV_EN_R = crate::BitReader;
47#[doc = "Field `xtal32k_lowv_en` writer - "]
48pub type XTAL32K_LOWV_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
49#[doc = "Field `xtal32k_hiz_en` reader - "]
50pub type XTAL32K_HIZ_EN_R = crate::BitReader;
51#[doc = "Field `xtal32k_hiz_en` writer - "]
52pub type XTAL32K_HIZ_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
53#[doc = "Field `dten_xtal32k` reader - "]
54pub type DTEN_XTAL32K_R = crate::BitReader;
55#[doc = "Field `dten_xtal32k` writer - "]
56pub type DTEN_XTAL32K_W<'a, REG> = crate::BitWriter<'a, REG>;
57#[doc = "Field `ten_xtal32k` reader - "]
58pub type TEN_XTAL32K_R = crate::BitReader;
59#[doc = "Field `ten_xtal32k` writer - "]
60pub type TEN_XTAL32K_W<'a, REG> = crate::BitWriter<'a, REG>;
61impl R {
62 #[doc = "Bit 2"]
63 #[inline(always)]
64 pub fn xtal32k_ext_sel(&self) -> XTAL32K_EXT_SEL_R {
65 XTAL32K_EXT_SEL_R::new(((self.bits >> 2) & 1) != 0)
66 }
67 #[doc = "Bits 3:4"]
68 #[inline(always)]
69 pub fn xtal32k_amp_ctrl(&self) -> XTAL32K_AMP_CTRL_R {
70 XTAL32K_AMP_CTRL_R::new(((self.bits >> 3) & 3) as u8)
71 }
72 #[doc = "Bits 5:6"]
73 #[inline(always)]
74 pub fn xtal32k_reg(&self) -> XTAL32K_REG_R {
75 XTAL32K_REG_R::new(((self.bits >> 5) & 3) as u8)
76 }
77 #[doc = "Bit 7"]
78 #[inline(always)]
79 pub fn xtal32k_outbuf_stre(&self) -> XTAL32K_OUTBUF_STRE_R {
80 XTAL32K_OUTBUF_STRE_R::new(((self.bits >> 7) & 1) != 0)
81 }
82 #[doc = "Bit 8"]
83 #[inline(always)]
84 pub fn xtal32k_otf_short(&self) -> XTAL32K_OTF_SHORT_R {
85 XTAL32K_OTF_SHORT_R::new(((self.bits >> 8) & 1) != 0)
86 }
87 #[doc = "Bits 9:10"]
88 #[inline(always)]
89 pub fn xtal32k_inv_stre(&self) -> XTAL32K_INV_STRE_R {
90 XTAL32K_INV_STRE_R::new(((self.bits >> 9) & 3) as u8)
91 }
92 #[doc = "Bits 11:16"]
93 #[inline(always)]
94 pub fn xtal32k_capbank(&self) -> XTAL32K_CAPBANK_R {
95 XTAL32K_CAPBANK_R::new(((self.bits >> 11) & 0x3f) as u8)
96 }
97 #[doc = "Bit 17"]
98 #[inline(always)]
99 pub fn xtal32k_ac_cap_short(&self) -> XTAL32K_AC_CAP_SHORT_R {
100 XTAL32K_AC_CAP_SHORT_R::new(((self.bits >> 17) & 1) != 0)
101 }
102 #[doc = "Bit 18"]
103 #[inline(always)]
104 pub fn pu_xtal32k_buf(&self) -> PU_XTAL32K_BUF_R {
105 PU_XTAL32K_BUF_R::new(((self.bits >> 18) & 1) != 0)
106 }
107 #[doc = "Bit 19"]
108 #[inline(always)]
109 pub fn pu_xtal32k(&self) -> PU_XTAL32K_R {
110 PU_XTAL32K_R::new(((self.bits >> 19) & 1) != 0)
111 }
112 #[doc = "Bit 20"]
113 #[inline(always)]
114 pub fn xtal32k_lowv_en(&self) -> XTAL32K_LOWV_EN_R {
115 XTAL32K_LOWV_EN_R::new(((self.bits >> 20) & 1) != 0)
116 }
117 #[doc = "Bit 21"]
118 #[inline(always)]
119 pub fn xtal32k_hiz_en(&self) -> XTAL32K_HIZ_EN_R {
120 XTAL32K_HIZ_EN_R::new(((self.bits >> 21) & 1) != 0)
121 }
122 #[doc = "Bit 22"]
123 #[inline(always)]
124 pub fn dten_xtal32k(&self) -> DTEN_XTAL32K_R {
125 DTEN_XTAL32K_R::new(((self.bits >> 22) & 1) != 0)
126 }
127 #[doc = "Bit 23"]
128 #[inline(always)]
129 pub fn ten_xtal32k(&self) -> TEN_XTAL32K_R {
130 TEN_XTAL32K_R::new(((self.bits >> 23) & 1) != 0)
131 }
132}
133impl W {
134 #[doc = "Bit 2"]
135 #[inline(always)]
136 #[must_use]
137 pub fn xtal32k_ext_sel(&mut self) -> XTAL32K_EXT_SEL_W<XTAL32K_SPEC> {
138 XTAL32K_EXT_SEL_W::new(self, 2)
139 }
140 #[doc = "Bits 3:4"]
141 #[inline(always)]
142 #[must_use]
143 pub fn xtal32k_amp_ctrl(&mut self) -> XTAL32K_AMP_CTRL_W<XTAL32K_SPEC> {
144 XTAL32K_AMP_CTRL_W::new(self, 3)
145 }
146 #[doc = "Bits 5:6"]
147 #[inline(always)]
148 #[must_use]
149 pub fn xtal32k_reg(&mut self) -> XTAL32K_REG_W<XTAL32K_SPEC> {
150 XTAL32K_REG_W::new(self, 5)
151 }
152 #[doc = "Bit 7"]
153 #[inline(always)]
154 #[must_use]
155 pub fn xtal32k_outbuf_stre(&mut self) -> XTAL32K_OUTBUF_STRE_W<XTAL32K_SPEC> {
156 XTAL32K_OUTBUF_STRE_W::new(self, 7)
157 }
158 #[doc = "Bit 8"]
159 #[inline(always)]
160 #[must_use]
161 pub fn xtal32k_otf_short(&mut self) -> XTAL32K_OTF_SHORT_W<XTAL32K_SPEC> {
162 XTAL32K_OTF_SHORT_W::new(self, 8)
163 }
164 #[doc = "Bits 9:10"]
165 #[inline(always)]
166 #[must_use]
167 pub fn xtal32k_inv_stre(&mut self) -> XTAL32K_INV_STRE_W<XTAL32K_SPEC> {
168 XTAL32K_INV_STRE_W::new(self, 9)
169 }
170 #[doc = "Bits 11:16"]
171 #[inline(always)]
172 #[must_use]
173 pub fn xtal32k_capbank(&mut self) -> XTAL32K_CAPBANK_W<XTAL32K_SPEC> {
174 XTAL32K_CAPBANK_W::new(self, 11)
175 }
176 #[doc = "Bit 17"]
177 #[inline(always)]
178 #[must_use]
179 pub fn xtal32k_ac_cap_short(&mut self) -> XTAL32K_AC_CAP_SHORT_W<XTAL32K_SPEC> {
180 XTAL32K_AC_CAP_SHORT_W::new(self, 17)
181 }
182 #[doc = "Bit 18"]
183 #[inline(always)]
184 #[must_use]
185 pub fn pu_xtal32k_buf(&mut self) -> PU_XTAL32K_BUF_W<XTAL32K_SPEC> {
186 PU_XTAL32K_BUF_W::new(self, 18)
187 }
188 #[doc = "Bit 19"]
189 #[inline(always)]
190 #[must_use]
191 pub fn pu_xtal32k(&mut self) -> PU_XTAL32K_W<XTAL32K_SPEC> {
192 PU_XTAL32K_W::new(self, 19)
193 }
194 #[doc = "Bit 20"]
195 #[inline(always)]
196 #[must_use]
197 pub fn xtal32k_lowv_en(&mut self) -> XTAL32K_LOWV_EN_W<XTAL32K_SPEC> {
198 XTAL32K_LOWV_EN_W::new(self, 20)
199 }
200 #[doc = "Bit 21"]
201 #[inline(always)]
202 #[must_use]
203 pub fn xtal32k_hiz_en(&mut self) -> XTAL32K_HIZ_EN_W<XTAL32K_SPEC> {
204 XTAL32K_HIZ_EN_W::new(self, 21)
205 }
206 #[doc = "Bit 22"]
207 #[inline(always)]
208 #[must_use]
209 pub fn dten_xtal32k(&mut self) -> DTEN_XTAL32K_W<XTAL32K_SPEC> {
210 DTEN_XTAL32K_W::new(self, 22)
211 }
212 #[doc = "Bit 23"]
213 #[inline(always)]
214 #[must_use]
215 pub fn ten_xtal32k(&mut self) -> TEN_XTAL32K_W<XTAL32K_SPEC> {
216 TEN_XTAL32K_W::new(self, 23)
217 }
218 #[doc = r" Writes raw bits to the register."]
219 #[doc = r""]
220 #[doc = r" # Safety"]
221 #[doc = r""]
222 #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"]
223 #[inline(always)]
224 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
225 self.bits = bits;
226 self
227 }
228}
229#[doc = "External crystal oscillator control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`xtal32k::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`xtal32k::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
230pub struct XTAL32K_SPEC;
231impl crate::RegisterSpec for XTAL32K_SPEC {
232 type Ux = u32;
233}
234#[doc = "`read()` method returns [`xtal32k::R`](R) reader structure"]
235impl crate::Readable for XTAL32K_SPEC {}
236#[doc = "`write(|w| ..)` method takes [`xtal32k::W`](W) writer structure"]
237impl crate::Writable for XTAL32K_SPEC {
238 const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
239 const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
240}
241#[doc = "`reset()` method sets xtal32k to value 0"]
242impl crate::Resettable for XTAL32K_SPEC {
243 const RESET_VALUE: Self::Ux = 0;
244}